[PATCH 1/2] coresight-etm3x: Add ARM ETM-A5 peripheral ID

[PATCH 1/2] coresight-etm3x: Add ARM ETM-A5 peripheral ID

[Olivier Schonken]

Signed-off-by: Olivier Schonken <olivier.schonken@gmail.com>
---
 drivers/hwtracing/coresight/coresight-etm3x.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/drivers/hwtracing/coresight/coresight-etm3x.c b/drivers/hwtracing/coresight/coresight-etm3x.c
index d83ab82..2c6d4b4 100644
--- a/drivers/hwtracing/coresight/coresight-etm3x.c
+++ b/drivers/hwtracing/coresight/coresight-etm3x.c
@@ -885,6 +885,11 @@ static struct amba_id etm_ids[] = {
 		.mask	= 0x0003ffff,
 		.data	= "ETM 3.3",
 	},
+	{	/* ETM-A5 */
+		.id	= 0x0003b955,
+		.mask	= 0x0003ffff,
+		.data	= "ETM-A5",
+	},
 	{	/* ETM 3.5 */
 		.id	= 0x0003b956,
 		.mask	= 0x0003ffff,
-- 
1.9.1

[PATCH 2/2] ARM: dts: at91: sama5d2: add ETM, ETB and ETMCK node

[Olivier Schonken]

Add node to support SAMA5D2 Embedded Trace Macrocell and Embedded
Trace Buffer. Add a dummy clock node needed by drivers/amba/bus.c
for succesfull probe. The coresight clock is always present, and
can thus not be enabled/disabled by a register write.

This patch depends on coresight-etm3x: Add ARM ETM-A5 peripheral ID
for proper functionality.

Signed-off-by: Olivier Schonken <olivier.schonken@gmail.com>
---
 arch/arm/boot/dts/sama5d2.dtsi | 44 ++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 44 insertions(+)

diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi
index 5d63206..4a3a3fb 100644
--- a/arch/arm/boot/dts/sama5d2.dtsi
+++ b/arch/arm/boot/dts/sama5d2.dtsi
@@ -77,6 +77,37 @@
 		interrupts = <2 IRQ_TYPE_LEVEL_HIGH 0>;
 	};
 
+	etb: etb at 00740000 {
+		compatible = "arm,coresight-etb10", "arm,primecell";
+		reg = <0x740000 0x1000>;
+		status = "okay";
+
+		clocks = <&etmck>;
+		clock-names = "apb_pclk";
+
+		port {
+			etb_in: endpoint {
+				slave-mode;
+				remote-endpoint = <&etm_out>;
+			};
+		};
+	};
+
+	etm: etm at 0073C000 {
+		compatible = "arm,coresight-etm3x", "arm,primecell";
+		reg = <0x73C000 0x1000>;
+		status = "okay";
+
+		clocks = <&etmck>;
+		clock-names = "apb_pclk";
+
+		port {
+			etm_out: endpoint {
+				remote-endpoint = <&etb_in>;
+			};
+		};
+	};
+
 	memory {
 		reg = <0x20000000 0x20000000>;
 	};
@@ -474,6 +505,19 @@
 					};
 				};
 
+				/*
+				 * This is a dummy clock needed by
+				 * drivers/amba/bus.c when probing
+				 * for ETM/ETB. On SAMA5D2 the coresight
+				 * clock is always supplied.
+				*/
+
+				etmck: etmck {
+					#clock-cells = <0>;
+					compatible = "fixed-clock";
+					clock-frequency = <0>;
+				};
+
 				systemck {
 					compatible = "atmel,at91rm9200-clk-system";
 					#address-cells = <1>;
-- 
1.9.1

[PATCH 2/2] ARM: dts: at91: sama5d2: add ETM, ETB and ETMCK node

[Alexandre Belloni]

On 01/07/2016 at 16:37:11 +0200, Olivier Schonken wrote :
> Add node to support SAMA5D2 Embedded Trace Macrocell and Embedded
> Trace Buffer. Add a dummy clock node needed by drivers/amba/bus.c
> for succesfull probe. The coresight clock is always present, and
> can thus not be enabled/disabled by a register write.
> 
> This patch depends on coresight-etm3x: Add ARM ETM-A5 peripheral ID
> for proper functionality.
> 
> Signed-off-by: Olivier Schonken <olivier.schonken@gmail.com>
> ---
>  arch/arm/boot/dts/sama5d2.dtsi | 44 ++++++++++++++++++++++++++++++++++++++++++
>  1 file changed, 44 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi
> index 5d63206..4a3a3fb 100644
> --- a/arch/arm/boot/dts/sama5d2.dtsi
> +++ b/arch/arm/boot/dts/sama5d2.dtsi
> @@ -77,6 +77,37 @@
>  		interrupts = <2 IRQ_TYPE_LEVEL_HIGH 0>;
>  	};
>  
> +	etb: etb at 00740000 {
> +		compatible = "arm,coresight-etb10", "arm,primecell";
> +		reg = <0x740000 0x1000>;
> +		status = "okay";
> +
> +		clocks = <&etmck>;
> +		clock-names = "apb_pclk";
> +
> +		port {
> +			etb_in: endpoint {
> +				slave-mode;
> +				remote-endpoint = <&etm_out>;
> +			};
> +		};
> +	};
> +
> +	etm: etm at 0073C000 {
> +		compatible = "arm,coresight-etm3x", "arm,primecell";
> +		reg = <0x73C000 0x1000>;
> +		status = "okay";
> +
> +		clocks = <&etmck>;
> +		clock-names = "apb_pclk";
> +
> +		port {
> +			etm_out: endpoint {
> +				remote-endpoint = <&etb_in>;
> +			};
> +		};
> +	};
> +
>  	memory {
>  		reg = <0x20000000 0x20000000>;
>  	};
> @@ -474,6 +505,19 @@
>  					};
>  				};
>  
> +				/*
> +				 * This is a dummy clock needed by
> +				 * drivers/amba/bus.c when probing
> +				 * for ETM/ETB. On SAMA5D2 the coresight
> +				 * clock is always supplied.
> +				*/
> +
> +				etmck: etmck {
> +					#clock-cells = <0>;
> +					compatible = "fixed-clock";
> +					clock-frequency = <0>;
> +				};
> +

Hum, maybe you could take mck instead of adding a dummy clock in the
PCM.

Boris, do you have a better idea?

-- 
Alexandre Belloni, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

[PATCH 2/2] ARM: dts: at91: sama5d2: add ETM, ETB and ETMCK node

[Olivier Schonken]

Hi Alexandre

Resending this mail, the previous one was accidentally in html format,
thus rejected from the list.  My apologies.

I did try a couple of options regarding the clock, mck included, but
it would then hang when probing occurs in drivers/amba/bus.c when the
clock gets disabled. The dummy clock solved this issue, but I'm open
to better suggestions.

Regards
Olivier

On 01 Jul 2016 20:32, "Alexandre Belloni"
<alexandre.belloni@free-electrons.com> wrote:
>
> On 01/07/2016 at 16:37:11 +0200, Olivier Schonken wrote :
> > Add node to support SAMA5D2 Embedded Trace Macrocell and Embedded
> > Trace Buffer. Add a dummy clock node needed by drivers/amba/bus.c
> > for succesfull probe. The coresight clock is always present, and
> > can thus not be enabled/disabled by a register write.
> >
> > This patch depends on coresight-etm3x: Add ARM ETM-A5 peripheral ID
> > for proper functionality.
> >
> > Signed-off-by: Olivier Schonken <olivier.schonken@gmail.com>
> > ---
> >  arch/arm/boot/dts/sama5d2.dtsi | 44 ++++++++++++++++++++++++++++++++++++++++++
> >  1 file changed, 44 insertions(+)
> >
> > diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi
> > index 5d63206..4a3a3fb 100644
> > --- a/arch/arm/boot/dts/sama5d2.dtsi
> > +++ b/arch/arm/boot/dts/sama5d2.dtsi
> > @@ -77,6 +77,37 @@
> >               interrupts = <2 IRQ_TYPE_LEVEL_HIGH 0>;
> >       };
> >
> > +     etb: etb at 00740000 {
> > +             compatible = "arm,coresight-etb10", "arm,primecell";
> > +             reg = <0x740000 0x1000>;
> > +             status = "okay";
> > +
> > +             clocks = <&etmck>;
> > +             clock-names = "apb_pclk";
> > +
> > +             port {
> > +                     etb_in: endpoint {
> > +                             slave-mode;
> > +                             remote-endpoint = <&etm_out>;
> > +                     };
> > +             };
> > +     };
> > +
> > +     etm: etm at 0073C000 {
> > +             compatible = "arm,coresight-etm3x", "arm,primecell";
> > +             reg = <0x73C000 0x1000>;
> > +             status = "okay";
> > +
> > +             clocks = <&etmck>;
> > +             clock-names = "apb_pclk";
> > +
> > +             port {
> > +                     etm_out: endpoint {
> > +                             remote-endpoint = <&etb_in>;
> > +                     };
> > +             };
> > +     };
> > +
> >       memory {
> >               reg = <0x20000000 0x20000000>;
> >       };
> > @@ -474,6 +505,19 @@
> >                                       };
> >                               };
> >
> > +                             /*
> > +                              * This is a dummy clock needed by
> > +                              * drivers/amba/bus.c when probing
> > +                              * for ETM/ETB. On SAMA5D2 the coresight
> > +                              * clock is always supplied.
> > +                             */
> > +
> > +                             etmck: etmck {
> > +                                     #clock-cells = <0>;
> > +                                     compatible = "fixed-clock";
> > +                                     clock-frequency = <0>;
> > +                             };
> > +
>
> Hum, maybe you could take mck instead of adding a dummy clock in the
> PCM.
>
> Boris, do you have a better idea?
>
> --
> Alexandre Belloni, Free Electrons
> Embedded Linux and Kernel engineering
> http://free-electrons.com

[PATCH 2/2] ARM: dts: at91: sama5d2: add ETM, ETB and ETMCK node

[Boris Brezillon]

Hi Olivier,

On Fri, 1 Jul 2016 22:07:53 +0200
Olivier Schonken <olivier.schonken@gmail.com> wrote:

> Hi Alexandre
> 
> Resending this mail, the previous one was accidentally in html format,
> thus rejected from the list.  My apologies.
> 
> I did try a couple of options regarding the clock, mck included, but
> it would then hang when probing occurs in drivers/amba/bus.c when the
> clock gets disabled. The dummy clock solved this issue, but I'm open
> to better suggestions.

Hm, that's really weird. Is the AMBA bus driver probed before the PIT
driver?
Anyway, I agree that this dummy clock approach is not ideal. Could we
make the apb_pclk clock optional in the AMBA bus driver?

The other approach would be to have someone claim the mck clock before
the AMBA bus driver, and keep it enabled.

Regards,

Boris

[PATCH 2/2] ARM: dts: at91: sama5d2: add ETM, ETB and ETMCK node

[Olivier Schonken]

Hi Boris

The amba bus is probed after the PIT driver.  I have today found pck0
- pck2 to work as well.  Would this be good enough to use?

Regards

On 2 July 2016 at 20:46, Boris Brezillon
<boris.brezillon@free-electrons.com> wrote:
> Hi Olivier,
>
> On Fri, 1 Jul 2016 22:07:53 +0200
> Olivier Schonken <olivier.schonken@gmail.com> wrote:
>
>> Hi Alexandre
>>
>> Resending this mail, the previous one was accidentally in html format,
>> thus rejected from the list.  My apologies.
>>
>> I did try a couple of options regarding the clock, mck included, but
>> it would then hang when probing occurs in drivers/amba/bus.c when the
>> clock gets disabled. The dummy clock solved this issue, but I'm open
>> to better suggestions.
>
> Hm, that's really weird. Is the AMBA bus driver probed before the PIT
> driver?
> Anyway, I agree that this dummy clock approach is not ideal. Could we
> make the apb_pclk clock optional in the AMBA bus driver?
>
> The other approach would be to have someone claim the mck clock before
> the AMBA bus driver, and keep it enabled.
>
> Regards,
>
> Boris

[PATCH 2/2] ARM: dts: at91: sama5d2: add ETM, ETB and ETMCK node

[Boris Brezillon]

On Mon, 4 Jul 2016 10:47:21 +0200
Olivier Schonken <olivier.schonken@gmail.com> wrote:

> Hi Boris
> 
> The amba bus is probed after the PIT driver. 

So we clearly have a problem in there...

> I have today found pck0 -
> pck2 to work as well.  Would this be good enough to use?

But why would we reference one of the programmable clock? AFAICT, the
coresight-etb10 block does not depend on any of the programmable clock.

> 
> Regards
> 
> Olivier
> 
> On 2 July 2016 at 20:46, Boris Brezillon <boris.brezillon@free-electrons.com
> > wrote:  
> 
> > Hi Olivier,
> >
> > On Fri, 1 Jul 2016 22:07:53 +0200
> > Olivier Schonken <olivier.schonken@gmail.com> wrote:
> >  
> > > Hi Alexandre
> > >
> > > Resending this mail, the previous one was accidentally in html format,
> > > thus rejected from the list.  My apologies.
> > >
> > > I did try a couple of options regarding the clock, mck included, but
> > > it would then hang when probing occurs in drivers/amba/bus.c when the
> > > clock gets disabled. The dummy clock solved this issue, but I'm open
> > > to better suggestions.  
> >
> > Hm, that's really weird. Is the AMBA bus driver probed before the PIT
> > driver?
> > Anyway, I agree that this dummy clock approach is not ideal. Could we
> > make the apb_pclk clock optional in the AMBA bus driver?
> >
> > The other approach would be to have someone claim the mck clock before
> > the AMBA bus driver, and keep it enabled.
> >
> > Regards,
> >
> > Boris
> >  

[PATCH 2/2] ARM: dts: at91: sama5d2: add ETM, ETB and ETMCK node

[Olivier Schonken]

That is the dilemma I face with the structure.  What is the least
invasive option to include the coresight functionality, without
breaking the amba probe for other architectures that rely on it having
a clock to enable/disable, and not break the processor startup by
messing with stable clocks for the sake of giving the ETB/ETM a clock
it doesn't need.
That is why in the end I decided on a dummy clock driver.  To keep
with the convention of having a clock specific to the ETM, and leaving
the rest of the clocks as is.

Regards

Olivier

On 4 July 2016 at 11:00, Boris Brezillon
<boris.brezillon@free-electrons.com> wrote:
> On Mon, 4 Jul 2016 10:47:21 +0200
> Olivier Schonken <olivier.schonken@gmail.com> wrote:
>
>> Hi Boris
>>
>> The amba bus is probed after the PIT driver.
>
> So we clearly have a problem in there...
>
>> I have today found pck0 -
>> pck2 to work as well.  Would this be good enough to use?
>
> But why would we reference one of the programmable clock? AFAICT, the
> coresight-etb10 block does not depend on any of the programmable clock.
>
>>
>> Regards
>>
>> Olivier
>>
>> On 2 July 2016 at 20:46, Boris Brezillon <boris.brezillon@free-electrons.com
>> > wrote:
>>
>> > Hi Olivier,
>> >
>> > On Fri, 1 Jul 2016 22:07:53 +0200
>> > Olivier Schonken <olivier.schonken@gmail.com> wrote:
>> >
>> > > Hi Alexandre
>> > >
>> > > Resending this mail, the previous one was accidentally in html format,
>> > > thus rejected from the list.  My apologies.
>> > >
>> > > I did try a couple of options regarding the clock, mck included, but
>> > > it would then hang when probing occurs in drivers/amba/bus.c when the
>> > > clock gets disabled. The dummy clock solved this issue, but I'm open
>> > > to better suggestions.
>> >
>> > Hm, that's really weird. Is the AMBA bus driver probed before the PIT
>> > driver?
>> > Anyway, I agree that this dummy clock approach is not ideal. Could we
>> > make the apb_pclk clock optional in the AMBA bus driver?
>> >
>> > The other approach would be to have someone claim the mck clock before
>> > the AMBA bus driver, and keep it enabled.
>> >
>> > Regards,
>> >
>> > Boris
>> >
>

[PATCH 2/2] ARM: dts: at91: sama5d2: add ETM, ETB and ETMCK node

[Alexandre Belloni]

On 04/07/2016 at 11:08:42 +0200, Olivier Schonken wrote :
> That is the dilemma I face with the structure.  What is the least
> invasive option to include the coresight functionality, without
> breaking the amba probe for other architectures that rely on it having
> a clock to enable/disable, and not break the processor startup by
> messing with stable clocks for the sake of giving the ETB/ETM a clock
> it doesn't need.
> That is why in the end I decided on a dummy clock driver.  To keep
> with the convention of having a clock specific to the ETM, and leaving
> the rest of the clocks as is.
> 

Well, the issue is in the pit driver, see the patch I just sent. With
both of your patches, I got my sama5d2 xplained botting fine.

-- 
Alexandre Belloni, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

[PATCH 2/2] ARM: dts: at91: sama5d2: add ETM, ETB and ETMCK node

[Boris Brezillon]

On Mon, 4 Jul 2016 18:02:03 +0200
Alexandre Belloni <alexandre.belloni@free-electrons.com> wrote:

> On 04/07/2016 at 11:08:42 +0200, Olivier Schonken wrote :
> > That is the dilemma I face with the structure.  What is the least
> > invasive option to include the coresight functionality, without
> > breaking the amba probe for other architectures that rely on it having
> > a clock to enable/disable, and not break the processor startup by
> > messing with stable clocks for the sake of giving the ETB/ETM a clock
> > it doesn't need.
> > That is why in the end I decided on a dummy clock driver.  To keep
> > with the convention of having a clock specific to the ETM, and leaving
> > the rest of the clocks as is.
> >   
> 
> Well, the issue is in the pit driver, see the patch I just sent. With
> both of your patches, I got my sama5d2 xplained botting fine.
> 

You mean, replacing the reference to the dummy clk by a reference to
mck, right?

[PATCH 2/2] ARM: dts: at91: sama5d2: add ETM, ETB and ETMCK node

[Alexandre Belloni]

On 04/07/2016 at 22:26:48 +0200, Boris Brezillon wrote :
> On Mon, 4 Jul 2016 18:02:03 +0200
> Alexandre Belloni <alexandre.belloni@free-electrons.com> wrote:
> 
> > On 04/07/2016 at 11:08:42 +0200, Olivier Schonken wrote :
> > > That is the dilemma I face with the structure.  What is the least
> > > invasive option to include the coresight functionality, without
> > > breaking the amba probe for other architectures that rely on it having
> > > a clock to enable/disable, and not break the processor startup by
> > > messing with stable clocks for the sake of giving the ETB/ETM a clock
> > > it doesn't need.
> > > That is why in the end I decided on a dummy clock driver.  To keep
> > > with the convention of having a clock specific to the ETM, and leaving
> > > the rest of the clocks as is.
> > >   
> > 
> > Well, the issue is in the pit driver, see the patch I just sent. With
> > both of your patches, I got my sama5d2 xplained botting fine.
> > 
> 
> You mean, replacing the reference to the dummy clk by a reference to
> mck, right?

Absolutely!

-- 
Alexandre Belloni, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

[PATCH 2/2] ARM: dts: at91: sama5d2: add ETM, ETB and ETMCK node

[Boris Brezillon]

On Mon, 4 Jul 2016 22:47:42 +0200
Alexandre Belloni <alexandre.belloni@free-electrons.com> wrote:

> On 04/07/2016 at 22:26:48 +0200, Boris Brezillon wrote :
> > On Mon, 4 Jul 2016 18:02:03 +0200
> > Alexandre Belloni <alexandre.belloni@free-electrons.com> wrote:
> >   
> > > On 04/07/2016 at 11:08:42 +0200, Olivier Schonken wrote :  
> > > > That is the dilemma I face with the structure.  What is the least
> > > > invasive option to include the coresight functionality, without
> > > > breaking the amba probe for other architectures that rely on it having
> > > > a clock to enable/disable, and not break the processor startup by
> > > > messing with stable clocks for the sake of giving the ETB/ETM a clock
> > > > it doesn't need.
> > > > That is why in the end I decided on a dummy clock driver.  To keep
> > > > with the convention of having a clock specific to the ETM, and leaving
> > > > the rest of the clocks as is.
> > > >     
> > > 
> > > Well, the issue is in the pit driver, see the patch I just sent. With
> > > both of your patches, I got my sama5d2 xplained botting fine.
> > >   
> > 
> > You mean, replacing the reference to the dummy clk by a reference to
> > mck, right?  
> 
> Absolutely!
> 

Okay. Olivier, can you send a new version of this patch and use mck
instead of this dummy etm clk?

Thanks,

Boris

[PATCH 2/2] ARM: dts: at91: sama5d2: add ETM, ETB and ETMCK node

[Mathieu Poirier]

On 1 July 2016 at 08:37, Olivier Schonken <olivier.schonken@gmail.com> wrote:
> Add node to support SAMA5D2 Embedded Trace Macrocell and Embedded
> Trace Buffer. Add a dummy clock node needed by drivers/amba/bus.c
> for succesfull probe. The coresight clock is always present, and
> can thus not be enabled/disabled by a register write.
>
> This patch depends on coresight-etm3x: Add ARM ETM-A5 peripheral ID
> for proper functionality.
>
> Signed-off-by: Olivier Schonken <olivier.schonken@gmail.com>
> ---
>  arch/arm/boot/dts/sama5d2.dtsi | 44 ++++++++++++++++++++++++++++++++++++++++++
>  1 file changed, 44 insertions(+)
>
> diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi
> index 5d63206..4a3a3fb 100644
> --- a/arch/arm/boot/dts/sama5d2.dtsi
> +++ b/arch/arm/boot/dts/sama5d2.dtsi
> @@ -77,6 +77,37 @@
>                 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 0>;
>         };
>
> +       etb: etb at 00740000 {

What do you need the label for?

> +               compatible = "arm,coresight-etb10", "arm,primecell";
> +               reg = <0x740000 0x1000>;
> +               status = "okay";

"status" is not part of the CoreSight node properties.

> +
> +               clocks = <&etmck>;
> +               clock-names = "apb_pclk";
> +
> +               port {
> +                       etb_in: endpoint {
> +                               slave-mode;
> +                               remote-endpoint = <&etm_out>;
> +                       };
> +               };
> +       };
> +
> +       etm: etm at 0073C000 {
> +               compatible = "arm,coresight-etm3x", "arm,primecell";
> +               reg = <0x73C000 0x1000>;
> +               status = "okay";
> +
> +               clocks = <&etmck>;
> +               clock-names = "apb_pclk";
> +
> +               port {
> +                       etm_out: endpoint {
> +                               remote-endpoint = <&etb_in>;
> +                       };
> +               };
> +       };
> +
>         memory {
>                 reg = <0x20000000 0x20000000>;
>         };
> @@ -474,6 +505,19 @@
>                                         };
>                                 };
>
> +                               /*
> +                                * This is a dummy clock needed by
> +                                * drivers/amba/bus.c when probing
> +                                * for ETM/ETB. On SAMA5D2 the coresight
> +                                * clock is always supplied.
> +                               */
> +
> +                               etmck: etmck {
> +                                       #clock-cells = <0>;
> +                                       compatible = "fixed-clock";
> +                                       clock-frequency = <0>;
> +                               };
> +
>                                 systemck {
>                                         compatible = "atmel,at91rm9200-clk-system";
>                                         #address-cells = <1>;
> --
> 1.9.1
>

[PATCH 1/2] coresight-etm3x: Add ARM ETM-A5 peripheral ID

[Mathieu Poirier]

On 1 July 2016 at 08:37, Olivier Schonken <olivier.schonken@gmail.com> wrote:
> Signed-off-by: Olivier Schonken <olivier.schonken@gmail.com>
> ---
>  drivers/hwtracing/coresight/coresight-etm3x.c | 5 +++++
>  1 file changed, 5 insertions(+)
>
> diff --git a/drivers/hwtracing/coresight/coresight-etm3x.c b/drivers/hwtracing/coresight/coresight-etm3x.c
> index d83ab82..2c6d4b4 100644
> --- a/drivers/hwtracing/coresight/coresight-etm3x.c
> +++ b/drivers/hwtracing/coresight/coresight-etm3x.c
> @@ -885,6 +885,11 @@ static struct amba_id etm_ids[] = {
>                 .mask   = 0x0003ffff,
>                 .data   = "ETM 3.3",
>         },
> +       {       /* ETM-A5 */
> +               .id     = 0x0003b955,
> +               .mask   = 0x0003ffff,
> +               .data   = "ETM-A5",
> +       },

Hello,

>From what I see in the documentation A5 and A7 processors have the
same ETM engine.  As such the comment above should be "ETM 3.5 -
Cortex-A5" and the .data field "ETM 3.5".  Get back to me if this
really doesn't mach your architecture.

Thanks,
Mathieu

>         {       /* ETM 3.5 */
>                 .id     = 0x0003b956,
>                 .mask   = 0x0003ffff,
> --
> 1.9.1
>