From: boris.brezillon@free-electrons.com (Boris Brezillon)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 2/2] ARM: dts: at91: sama5d2: add ETM, ETB and ETMCK node
Date: Sat, 2 Jul 2016 20:46:08 +0200 [thread overview]
Message-ID: <20160702204608.257b8bc6@bbrezillon> (raw)
In-Reply-To: <CALdGsk+KwPMVKXhKtcmoUFqfj6aQRvQSY74F31fSvZhV+QvjAA@mail.gmail.com>
Hi Olivier,
On Fri, 1 Jul 2016 22:07:53 +0200
Olivier Schonken <olivier.schonken@gmail.com> wrote:
> Hi Alexandre
>
> Resending this mail, the previous one was accidentally in html format,
> thus rejected from the list. My apologies.
>
> I did try a couple of options regarding the clock, mck included, but
> it would then hang when probing occurs in drivers/amba/bus.c when the
> clock gets disabled. The dummy clock solved this issue, but I'm open
> to better suggestions.
Hm, that's really weird. Is the AMBA bus driver probed before the PIT
driver?
Anyway, I agree that this dummy clock approach is not ideal. Could we
make the apb_pclk clock optional in the AMBA bus driver?
The other approach would be to have someone claim the mck clock before
the AMBA bus driver, and keep it enabled.
Regards,
Boris
next prev parent reply other threads:[~2016-07-02 18:46 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-07-01 14:37 [PATCH 1/2] coresight-etm3x: Add ARM ETM-A5 peripheral ID Olivier Schonken
2016-07-01 14:37 ` [PATCH 2/2] ARM: dts: at91: sama5d2: add ETM, ETB and ETMCK node Olivier Schonken
2016-07-01 18:32 ` Alexandre Belloni
2016-07-01 20:07 ` Olivier Schonken
2016-07-02 18:46 ` Boris Brezillon [this message]
2016-07-04 8:49 ` Olivier Schonken
[not found] ` <CALdGsk+RO_cxfcTLVyKHP3aVMkSTtzEzQXz2G4ARX7vqxRazSA@mail.gmail.com>
2016-07-04 9:00 ` Boris Brezillon
2016-07-04 9:08 ` Olivier Schonken
2016-07-04 16:02 ` Alexandre Belloni
2016-07-04 20:26 ` Boris Brezillon
2016-07-04 20:47 ` Alexandre Belloni
2016-07-04 20:51 ` Boris Brezillon
2016-07-04 15:38 ` Mathieu Poirier
2016-07-04 15:33 ` [PATCH 1/2] coresight-etm3x: Add ARM ETM-A5 peripheral ID Mathieu Poirier
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