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* [PATCH 0/3] ARM: dts: pinctrl-imx: some cleanups and fixes
@ 2016-07-05 20:19 Uwe Kleine-König
  2016-07-05 20:19 ` [PATCH 2/3] ARM: dts: imx25: don't configure reserved pad settings Uwe Kleine-König
                   ` (3 more replies)
  0 siblings, 4 replies; 6+ messages in thread
From: Uwe Kleine-König @ 2016-07-05 20:19 UTC (permalink / raw)
  To: linux-arm-kernel

Hello,

when I asked Andreas F?rber to drop the function device nodes in his
patch that added support for the Udoo Neo boards, he rightfully said:
"OK, will do. Adopted from imx6sx-sdb.dtsi and imx6sx-sabreauto.dts -
please update the existing files to be like you expect new ones to be.".
This is done in patch 1. While the short stat for this patch is

	87 files changed, 7717 insertions(+), 7899 deletions(-)

it was really easier, because most of the changes are indention, and
with -b I just get:

	87 files changed, 182 deletions(-)

which matches reality much better.

After that I noticed (with a tool I wrote for a customer) that some
pinctrl settings in the i.MX25 device trees are broken. (That doesn't
mean all others are ok, my tool just understands i.MX25 pinmuxing. :-)
These are fixed in patch 2.

Then in the third patch I substituted most occurrences of 0x80000000 in
the pad config values by the reset default value. (Just pads that don't
have a pad config register must stay with 0x80000000.)

I admit the patches don't fit together to justify putting them in a
series, but as they conflict each other I still put them together.

Testing is very welcome as I don't have access to (most of) the affected
machines.

These patches base on 4.7-rc6. Please advise if I should rebase to a
different version.

Best regards
Uwe

Uwe Kleine-K?nig (3):
  ARM: dts: drop function device nodes for pinctrl-imx nodes
  ARM: dts: imx25: don't configure reserved pad settings
  ARM: dts: imx25: substitute NO_PAD_CTL by the respective reset value

 arch/arm/boot/dts/imx1-ads.dts                     | 100 ++--
 arch/arm/boot/dts/imx1-apf9328.dts                 |  92 ++--
 arch/arm/boot/dts/imx25-eukrea-cpuimx25.dtsi       |  38 +-
 .../imx25-eukrea-mbimxsd25-baseboard-cmo-qvga.dts  |   6 +-
 .../boot/dts/imx25-eukrea-mbimxsd25-baseboard.dts  | 134 +++---
 arch/arm/boot/dts/imx25-karo-tx25.dts              |  50 +-
 arch/arm/boot/dts/imx25-pdk.dts                    | 190 ++++----
 arch/arm/boot/dts/imx27-apf27.dts                  |  56 ++-
 arch/arm/boot/dts/imx27-apf27dev.dts               | 194 ++++----
 arch/arm/boot/dts/imx27-eukrea-cpuimx27.dtsi       | 228 +++++-----
 .../boot/dts/imx27-eukrea-mbimxsd27-baseboard.dts  | 194 ++++----
 arch/arm/boot/dts/imx27-pdk.dts                    | 132 +++---
 arch/arm/boot/dts/imx27-phytec-phycard-s-rdk.dts   |  92 ++--
 arch/arm/boot/dts/imx27-phytec-phycard-s-som.dtsi  |  78 ++--
 arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts     | 206 +++++----
 arch/arm/boot/dts/imx27-phytec-phycore-som.dtsi    | 154 ++++---
 arch/arm/boot/dts/imx35-eukrea-cpuimx35.dtsi       |  62 ++-
 .../boot/dts/imx35-eukrea-mbimxsd35-baseboard.dts  |  88 ++--
 arch/arm/boot/dts/imx35-pdk.dts                    |  36 +-
 arch/arm/boot/dts/imx50-evk.dts                    |  62 ++-
 arch/arm/boot/dts/imx51-apf51.dts                  |  56 ++-
 arch/arm/boot/dts/imx51-apf51dev.dts               | 176 ++++---
 arch/arm/boot/dts/imx51-babbage.dts                | 418 +++++++++--------
 arch/arm/boot/dts/imx51-digi-connectcore-jsk.dts   |  78 ++--
 arch/arm/boot/dts/imx51-digi-connectcore-som.dtsi  | 266 ++++++-----
 arch/arm/boot/dts/imx51-eukrea-cpuimx51.dtsi       |  68 ++-
 .../boot/dts/imx51-eukrea-mbimxsd51-baseboard.dts  | 192 ++++----
 arch/arm/boot/dts/imx53-ard.dts                    | 116 +++--
 arch/arm/boot/dts/imx53-m53.dtsi                   |  64 ++-
 arch/arm/boot/dts/imx53-m53evk.dts                 | 268 ++++++-----
 arch/arm/boot/dts/imx53-mba53.dts                  | 114 +++--
 arch/arm/boot/dts/imx53-qsb-common.dtsi            | 244 +++++-----
 arch/arm/boot/dts/imx53-qsrb.dts                   |  10 +-
 arch/arm/boot/dts/imx53-smd.dts                    | 196 ++++----
 arch/arm/boot/dts/imx53-tqma53.dtsi                | 246 +++++-----
 arch/arm/boot/dts/imx53-tx53-x03x.dts              | 112 +++--
 arch/arm/boot/dts/imx53-tx53-x13x.dts              |  74 ++-
 arch/arm/boot/dts/imx53-tx53.dtsi                  | 436 +++++++++---------
 arch/arm/boot/dts/imx53-voipac-bsb.dts             | 106 +++--
 arch/arm/boot/dts/imx53-voipac-dmm-668.dtsi        | 124 +++--
 arch/arm/boot/dts/imx6dl-riotboard.dts             | 360 ++++++++-------
 arch/arm/boot/dts/imx6q-arm2.dts                   | 198 ++++----
 arch/arm/boot/dts/imx6q-cm-fx6.dts                 |  94 ++--
 arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts            | 232 +++++-----
 arch/arm/boot/dts/imx6q-gk802.dts                  |  92 ++--
 arch/arm/boot/dts/imx6q-gw5400-a.dts               | 215 +++++----
 arch/arm/boot/dts/imx6q-marsboard.dts              |   1 -
 arch/arm/boot/dts/imx6q-sbc6x.dts                  |  82 ++--
 arch/arm/boot/dts/imx6qdl-apf6.dtsi                | 112 +++--
 arch/arm/boot/dts/imx6qdl-apf6dev.dtsi             | 306 +++++++------
 arch/arm/boot/dts/imx6qdl-aristainetos.dtsi        | 404 ++++++++--------
 arch/arm/boot/dts/imx6qdl-cubox-i.dtsi             | 136 +++---
 arch/arm/boot/dts/imx6qdl-dfi-fs700-m60.dtsi       | 176 ++++---
 arch/arm/boot/dts/imx6qdl-gw51xx.dtsi              | 238 +++++-----
 arch/arm/boot/dts/imx6qdl-gw52xx.dtsi              | 348 +++++++-------
 arch/arm/boot/dts/imx6qdl-gw53xx.dtsi              | 334 +++++++-------
 arch/arm/boot/dts/imx6qdl-gw54xx.dtsi              | 356 +++++++--------
 arch/arm/boot/dts/imx6qdl-gw551x.dtsi              | 162 ++++---
 arch/arm/boot/dts/imx6qdl-gw552x.dtsi              | 154 ++++---
 arch/arm/boot/dts/imx6qdl-hummingboard.dtsi        | 152 +++----
 arch/arm/boot/dts/imx6qdl-microsom-ar8035.dtsi     |  84 ++--
 arch/arm/boot/dts/imx6qdl-microsom.dtsi            |  98 ++--
 arch/arm/boot/dts/imx6qdl-nit6xlite.dtsi           | 378 ++++++++-------
 arch/arm/boot/dts/imx6qdl-nitrogen6_max.dtsi       | 506 ++++++++++-----------
 arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi          | 398 ++++++++--------
 arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi       | 288 ++++++------
 arch/arm/boot/dts/imx6qdl-rex.dtsi                 | 264 ++++++-----
 arch/arm/boot/dts/imx6qdl-sabreauto.dtsi           | 412 +++++++++--------
 arch/arm/boot/dts/imx6qdl-sabrelite.dtsi           | 360 ++++++++-------
 arch/arm/boot/dts/imx6qdl-sabresd.dtsi             | 294 ++++++------
 arch/arm/boot/dts/imx6qdl-udoo.dtsi                | 186 ++++----
 arch/arm/boot/dts/imx6qdl-wandboard-revb1.dtsi     |  32 +-
 arch/arm/boot/dts/imx6qdl-wandboard-revc1.dtsi     |  32 +-
 arch/arm/boot/dts/imx6qdl-wandboard.dtsi           | 191 ++++----
 arch/arm/boot/dts/imx6qp-sabreauto.dts             |  40 +-
 arch/arm/boot/dts/imx6qp-sabresd.dts               |  56 ++-
 arch/arm/boot/dts/imx6sl-evk.dts                   | 460 ++++++++++---------
 arch/arm/boot/dts/imx6sl-warp.dts                  | 208 +++++----
 arch/arm/boot/dts/imx6sx-sabreauto.dts             | 134 +++---
 arch/arm/boot/dts/imx6sx-sdb.dtsi                  | 482 ++++++++++----------
 arch/arm/boot/dts/imx7d-sdb.dts                    | 351 +++++++-------
 arch/arm/boot/dts/vf-colibri-eval-v3.dtsi          |  10 +-
 arch/arm/boot/dts/vf-colibri.dtsi                  | 334 +++++++-------
 arch/arm/boot/dts/vf500-colibri.dtsi               |  44 +-
 arch/arm/boot/dts/vf610-cosmic.dts                 |  60 ++-
 arch/arm/boot/dts/vf610-twr.dts                    | 228 +++++-----
 arch/arm/boot/dts/vf610m4-colibri.dts              |  16 +-
 arch/arm/boot/dts/vf610m4-cosmic.dts               |  12 +-
 88 files changed, 7742 insertions(+), 7924 deletions(-)

-- 
2.8.1

^ permalink raw reply	[flat|nested] 6+ messages in thread

* [PATCH 2/3] ARM: dts: imx25: don't configure reserved pad settings
  2016-07-05 20:19 [PATCH 0/3] ARM: dts: pinctrl-imx: some cleanups and fixes Uwe Kleine-König
@ 2016-07-05 20:19 ` Uwe Kleine-König
  2016-07-05 20:19 ` [PATCH 3/3] ARM: dts: imx25: substitute NO_PAD_CTL by the respective reset value Uwe Kleine-König
                   ` (2 subsequent siblings)
  3 siblings, 0 replies; 6+ messages in thread
From: Uwe Kleine-König @ 2016-07-05 20:19 UTC (permalink / raw)
  To: linux-arm-kernel

Two dts files specified reserved bits in their pad setting value for
some pins. This commit just unsets the reserved bits, which matches the
hardware behaviour when writing a 1 to a reserved bit.

Signed-off-by: Uwe Kleine-K?nig <u.kleine-koenig@pengutronix.de>
---
 .../boot/dts/imx25-eukrea-mbimxsd25-baseboard.dts  | 24 +++++++++++-----------
 arch/arm/boot/dts/imx25-pdk.dts                    | 16 +++++++--------
 2 files changed, 20 insertions(+), 20 deletions(-)

diff --git a/arch/arm/boot/dts/imx25-eukrea-mbimxsd25-baseboard.dts b/arch/arm/boot/dts/imx25-eukrea-mbimxsd25-baseboard.dts
index 9efcdad20e73..1a4b08df061c 100644
--- a/arch/arm/boot/dts/imx25-eukrea-mbimxsd25-baseboard.dts
+++ b/arch/arm/boot/dts/imx25-eukrea-mbimxsd25-baseboard.dts
@@ -78,10 +78,10 @@
 &iomuxc {
 	pinctrl_audmux: audmuxgrp {
 		fsl,pins = <
-			MX25_PAD_KPP_COL3__AUD5_TXFS		0xe0
-			MX25_PAD_KPP_COL2__AUD5_TXC		0xe0
-			MX25_PAD_KPP_COL1__AUD5_RXD		0xe0
-			MX25_PAD_KPP_COL0__AUD5_TXD		0xe0
+			MX25_PAD_KPP_COL3__AUD5_TXFS		0x000000a0
+			MX25_PAD_KPP_COL2__AUD5_TXC		0x000000a0
+			MX25_PAD_KPP_COL1__AUD5_RXD		0x000000a0
+			MX25_PAD_KPP_COL0__AUD5_TXD		0x000000a0
 		>;
 	};
 
@@ -106,10 +106,10 @@
 
 	pinctrl_lcdc: lcdcgrp {
 		fsl,pins = <
-			MX25_PAD_LD0__LD0			0x1
-			MX25_PAD_LD1__LD1			0x1
+			MX25_PAD_LD0__LD0			0x0
+			MX25_PAD_LD1__LD1			0x0
 			MX25_PAD_LD2__LD2			0x1
-			MX25_PAD_LD3__LD3			0x1
+			MX25_PAD_LD3__LD3			0x0
 			MX25_PAD_LD4__LD4			0x1
 			MX25_PAD_LD5__LD5			0x1
 			MX25_PAD_LD6__LD6			0x1
@@ -120,10 +120,10 @@
 			MX25_PAD_LD11__LD11			0x1
 			MX25_PAD_LD12__LD12			0x1
 			MX25_PAD_LD13__LD13			0x1
-			MX25_PAD_LD14__LD14			0x1
-			MX25_PAD_LD15__LD15			0x1
-			MX25_PAD_GPIO_E__LD16			0x1
-			MX25_PAD_GPIO_F__LD17			0x1
+			MX25_PAD_LD14__LD14			0x0
+			MX25_PAD_LD15__LD15			0x0
+			MX25_PAD_GPIO_E__LD16			0x0
+			MX25_PAD_GPIO_F__LD17			0x0
 			MX25_PAD_HSYNC__HSYNC			0x80000000
 			MX25_PAD_VSYNC__VSYNC			0x80000000
 			MX25_PAD_LSCLK__LSCLK			0x80000000
@@ -137,7 +137,7 @@
 			MX25_PAD_UART1_RTS__UART1_RTS		0xe0
 			MX25_PAD_UART1_CTS__UART1_CTS		0xe0
 			MX25_PAD_UART1_TXD__UART1_TXD		0x80000000
-			MX25_PAD_UART1_RXD__UART1_RXD		0xc0
+			MX25_PAD_UART1_RXD__UART1_RXD		0x00000080
 		>;
 	};
 
diff --git a/arch/arm/boot/dts/imx25-pdk.dts b/arch/arm/boot/dts/imx25-pdk.dts
index 8b00cfca18ea..c823e45a7a01 100644
--- a/arch/arm/boot/dts/imx25-pdk.dts
+++ b/arch/arm/boot/dts/imx25-pdk.dts
@@ -147,10 +147,10 @@
 &iomuxc {
 	pinctrl_audmux: audmuxgrp {
 		fsl,pins = <
-			MX25_PAD_RW__AUD4_TXFS			0xe0
-			MX25_PAD_OE__AUD4_TXC			0xe0
-			MX25_PAD_EB0__AUD4_TXD			0xe0
-			MX25_PAD_EB1__AUD4_RXD			0xe0
+			MX25_PAD_RW__AUD4_TXFS			0x80
+			MX25_PAD_OE__AUD4_TXC			0x80
+			MX25_PAD_EB0__AUD4_TXD			0x80
+			MX25_PAD_EB1__AUD4_RXD			0x80
 		>;
 	};
 
@@ -227,10 +227,10 @@
 			MX25_PAD_LD11__LD11		0xe0
 			MX25_PAD_LD12__LD12		0xe0
 			MX25_PAD_LD13__LD13		0xe0
-			MX25_PAD_LD14__LD14		0xe0
+			MX25_PAD_LD14__LD14		0xa0
 			MX25_PAD_LD15__LD15		0xe0
-			MX25_PAD_GPIO_E__LD16		0xe0
-			MX25_PAD_GPIO_F__LD17		0xe0
+			MX25_PAD_GPIO_E__LD16		0xa0
+			MX25_PAD_GPIO_F__LD17		0xa0
 			MX25_PAD_HSYNC__HSYNC		0xe0
 			MX25_PAD_VSYNC__VSYNC		0xe0
 			MX25_PAD_LSCLK__LSCLK		0xe0
@@ -244,7 +244,7 @@
 			MX25_PAD_UART1_RTS__UART1_RTS		0xe0
 			MX25_PAD_UART1_CTS__UART1_CTS		0xe0
 			MX25_PAD_UART1_TXD__UART1_TXD		0x80000000
-			MX25_PAD_UART1_RXD__UART1_RXD		0xc0
+			MX25_PAD_UART1_RXD__UART1_RXD		0x80
 		>;
 	};
 };
-- 
2.8.1

^ permalink raw reply related	[flat|nested] 6+ messages in thread

* [PATCH 3/3] ARM: dts: imx25: substitute NO_PAD_CTL by the respective reset value
  2016-07-05 20:19 [PATCH 0/3] ARM: dts: pinctrl-imx: some cleanups and fixes Uwe Kleine-König
  2016-07-05 20:19 ` [PATCH 2/3] ARM: dts: imx25: don't configure reserved pad settings Uwe Kleine-König
@ 2016-07-05 20:19 ` Uwe Kleine-König
       [not found] ` <1467749993-14533-2-git-send-email-u.kleine-koenig@pengutronix.de>
  2016-08-09  3:09 ` [PATCH 0/3] ARM: dts: pinctrl-imx: some cleanups and fixes Shawn Guo
  3 siblings, 0 replies; 6+ messages in thread
From: Uwe Kleine-König @ 2016-07-05 20:19 UTC (permalink / raw)
  To: linux-arm-kernel

When 0x80000000 (aka NO_PAD_CTL) is used as pad config value, the
SW_PAD_CTL register isn't modified. Instead be more explicit here and
specify the reset default value.

If the machines don't depend on bootloader modifications to these
registers (and my table doesn't have a bug) this commit doesn't
result in different behaviour of the affected machines.

Signed-off-by: Uwe Kleine-K?nig <u.kleine-koenig@pengutronix.de>
---
 arch/arm/boot/dts/imx25-eukrea-cpuimx25.dtsi       | 18 +++----
 .../imx25-eukrea-mbimxsd25-baseboard-cmo-qvga.dts  |  2 +-
 .../boot/dts/imx25-eukrea-mbimxsd25-baseboard.dts  | 24 ++++-----
 arch/arm/boot/dts/imx25-karo-tx25.dts              | 50 +++++++++---------
 arch/arm/boot/dts/imx25-pdk.dts                    | 60 +++++++++++-----------
 5 files changed, 77 insertions(+), 77 deletions(-)

diff --git a/arch/arm/boot/dts/imx25-eukrea-cpuimx25.dtsi b/arch/arm/boot/dts/imx25-eukrea-cpuimx25.dtsi
index f024a84bd37b..5ba6351d55cf 100644
--- a/arch/arm/boot/dts/imx25-eukrea-cpuimx25.dtsi
+++ b/arch/arm/boot/dts/imx25-eukrea-cpuimx25.dtsi
@@ -43,22 +43,22 @@
 &iomuxc {
 	pinctrl_fec: fecgrp {
 		fsl,pins = <
-			MX25_PAD_FEC_MDC__FEC_MDC		0x80000000
+			MX25_PAD_FEC_MDC__FEC_MDC		0x00000060
 			MX25_PAD_FEC_MDIO__FEC_MDIO		0x400001e0
-			MX25_PAD_FEC_TDATA0__FEC_TDATA0		0x80000000
-			MX25_PAD_FEC_TDATA1__FEC_TDATA1		0x80000000
-			MX25_PAD_FEC_TX_EN__FEC_TX_EN		0x80000000
-			MX25_PAD_FEC_RDATA0__FEC_RDATA0		0x80000000
-			MX25_PAD_FEC_RDATA1__FEC_RDATA1		0x80000000
-			MX25_PAD_FEC_RX_DV__FEC_RX_DV		0x80000000
+			MX25_PAD_FEC_TDATA0__FEC_TDATA0		0x00000060
+			MX25_PAD_FEC_TDATA1__FEC_TDATA1		0x00000060
+			MX25_PAD_FEC_TX_EN__FEC_TX_EN		0x00000060
+			MX25_PAD_FEC_RDATA0__FEC_RDATA0		0x000000c1
+			MX25_PAD_FEC_RDATA1__FEC_RDATA1		0x000000c0
+			MX25_PAD_FEC_RX_DV__FEC_RX_DV		0x000000c0
 			MX25_PAD_FEC_TX_CLK__FEC_TX_CLK		0x1c0
 		>;
 	};
 
 	pinctrl_i2c1: i2c1grp {
 		fsl,pins = <
-			MX25_PAD_I2C1_CLK__I2C1_CLK		0x80000000
-			MX25_PAD_I2C1_DAT__I2C1_DAT		0x80000000
+			MX25_PAD_I2C1_CLK__I2C1_CLK		0x000000a8
+			MX25_PAD_I2C1_DAT__I2C1_DAT		0x000000a8
 		>;
 	};
 };
diff --git a/arch/arm/boot/dts/imx25-eukrea-mbimxsd25-baseboard-cmo-qvga.dts b/arch/arm/boot/dts/imx25-eukrea-mbimxsd25-baseboard-cmo-qvga.dts
index 184778f4335f..f773690da909 100644
--- a/arch/arm/boot/dts/imx25-eukrea-mbimxsd25-baseboard-cmo-qvga.dts
+++ b/arch/arm/boot/dts/imx25-eukrea-mbimxsd25-baseboard-cmo-qvga.dts
@@ -59,7 +59,7 @@
 
 &iomuxc {
 	pinctrl_reg_lcd_3v3: reg_lcd_3v3 {
-		fsl,pins = <MX25_PAD_PWM__GPIO_1_26 0x80000000>;
+		fsl,pins = <MX25_PAD_PWM__GPIO_1_26 0x000000c0>;
 	};
 };
 
diff --git a/arch/arm/boot/dts/imx25-eukrea-mbimxsd25-baseboard.dts b/arch/arm/boot/dts/imx25-eukrea-mbimxsd25-baseboard.dts
index 1a4b08df061c..d6681966ee9c 100644
--- a/arch/arm/boot/dts/imx25-eukrea-mbimxsd25-baseboard.dts
+++ b/arch/arm/boot/dts/imx25-eukrea-mbimxsd25-baseboard.dts
@@ -97,11 +97,11 @@
 	};
 
 	pinctrl_gpiokeys: gpiokeysgrp {
-		fsl,pins = <MX25_PAD_VSTBY_ACK__GPIO_3_18 0x80000000>;
+		fsl,pins = <MX25_PAD_VSTBY_ACK__GPIO_3_18 0x00000080>;
 	};
 
 	pinctrl_gpioled: gpioledgrp {
-		fsl,pins = <MX25_PAD_POWER_FAIL__GPIO_3_19 0x80000000>;
+		fsl,pins = <MX25_PAD_POWER_FAIL__GPIO_3_19 0x00000080>;
 	};
 
 	pinctrl_lcdc: lcdcgrp {
@@ -124,11 +124,11 @@
 			MX25_PAD_LD15__LD15			0x0
 			MX25_PAD_GPIO_E__LD16			0x0
 			MX25_PAD_GPIO_F__LD17			0x0
-			MX25_PAD_HSYNC__HSYNC			0x80000000
-			MX25_PAD_VSYNC__VSYNC			0x80000000
-			MX25_PAD_LSCLK__LSCLK			0x80000000
-			MX25_PAD_OE_ACD__OE_ACD			0x80000000
-			MX25_PAD_CONTRAST__CONTRAST		0x80000000
+			MX25_PAD_HSYNC__HSYNC			0x00000060
+			MX25_PAD_VSYNC__VSYNC			0x00000060
+			MX25_PAD_LSCLK__LSCLK			0x00000061
+			MX25_PAD_OE_ACD__OE_ACD			0x00000060
+			MX25_PAD_CONTRAST__CONTRAST		0x00000060
 		>;
 	};
 
@@ -136,17 +136,17 @@
 		fsl,pins = <
 			MX25_PAD_UART1_RTS__UART1_RTS		0xe0
 			MX25_PAD_UART1_CTS__UART1_CTS		0xe0
-			MX25_PAD_UART1_TXD__UART1_TXD		0x80000000
+			MX25_PAD_UART1_TXD__UART1_TXD		0x00000020
 			MX25_PAD_UART1_RXD__UART1_RXD		0x00000080
 		>;
 	};
 
 	pinctrl_uart2: uart2grp {
 		fsl,pins = <
-			MX25_PAD_UART2_RXD__UART2_RXD		0x80000000
-			MX25_PAD_UART2_TXD__UART2_TXD		0x80000000
-			MX25_PAD_UART2_RTS__UART2_RTS		0x80000000
-			MX25_PAD_UART2_CTS__UART2_CTS		0x80000000
+			MX25_PAD_UART2_RXD__UART2_RXD		0x000000e0
+			MX25_PAD_UART2_TXD__UART2_TXD		0x00000060
+			MX25_PAD_UART2_RTS__UART2_RTS		0x000000e0
+			MX25_PAD_UART2_CTS__UART2_CTS		0x00000060
 		>;
 	};
 };
diff --git a/arch/arm/boot/dts/imx25-karo-tx25.dts b/arch/arm/boot/dts/imx25-karo-tx25.dts
index 9b31faa96377..c622c342efa0 100644
--- a/arch/arm/boot/dts/imx25-karo-tx25.dts
+++ b/arch/arm/boot/dts/imx25-karo-tx25.dts
@@ -44,46 +44,46 @@
 &iomuxc {
 	pinctrl_uart1: uart1grp {
 		fsl,pins = <
-			MX25_PAD_UART1_TXD__UART1_TXD 0x80000000
-			MX25_PAD_UART1_RXD__UART1_RXD 0x80000000
-			MX25_PAD_UART1_CTS__UART1_CTS 0x80000000
-			MX25_PAD_UART1_RTS__UART1_RTS 0x80000000
+			MX25_PAD_UART1_TXD__UART1_TXD 0x00000020
+			MX25_PAD_UART1_RXD__UART1_RXD 0x000000a0
+			MX25_PAD_UART1_CTS__UART1_CTS 0x00000060
+			MX25_PAD_UART1_RTS__UART1_RTS 0x000000e0
 		>;
 	};
 
 	pinctrl_fec: fecgrp {
 		fsl,pins = <
-			MX25_PAD_D11__GPIO_4_9		0x80000000 /* FEC PHY power on pin */
-			MX25_PAD_D13__GPIO_4_7		0x80000000 /* FEC reset */
-			MX25_PAD_FEC_MDC__FEC_MDC	0x80000000
-			MX25_PAD_FEC_MDIO__FEC_MDIO	0x80000000
-			MX25_PAD_FEC_TDATA0__FEC_TDATA0	0x80000000
-			MX25_PAD_FEC_TDATA1__FEC_TDATA1	0x80000000
-			MX25_PAD_FEC_TX_EN__FEC_TX_EN	0x80000000
-			MX25_PAD_FEC_RDATA0__FEC_RDATA0	0x80000000
-			MX25_PAD_FEC_RDATA1__FEC_RDATA1	0x80000000
-			MX25_PAD_FEC_RX_DV__FEC_RX_DV	0x80000000
-			MX25_PAD_FEC_TX_CLK__FEC_TX_CLK	0x80000000
+			MX25_PAD_D11__GPIO_4_9		0x00000021 /* FEC PHY power on pin */
+			MX25_PAD_D13__GPIO_4_7		0x000000a1 /* FEC reset */
+			MX25_PAD_FEC_MDC__FEC_MDC	0x00000060
+			MX25_PAD_FEC_MDIO__FEC_MDIO	0x000001f0
+			MX25_PAD_FEC_TDATA0__FEC_TDATA0	0x00000060
+			MX25_PAD_FEC_TDATA1__FEC_TDATA1	0x00000060
+			MX25_PAD_FEC_TX_EN__FEC_TX_EN	0x00000060
+			MX25_PAD_FEC_RDATA0__FEC_RDATA0	0x000000c1
+			MX25_PAD_FEC_RDATA1__FEC_RDATA1	0x000000c0
+			MX25_PAD_FEC_RX_DV__FEC_RX_DV	0x000000c0
+			MX25_PAD_FEC_TX_CLK__FEC_TX_CLK	0x000000c0
 		>;
 	};
 
 	pinctrl_nfc: nfcgrp {
 		fsl,pins = <
-			MX25_PAD_NF_CE0__NF_CE0		0x80000000
+			MX25_PAD_NF_CE0__NF_CE0		0x00000001
 			MX25_PAD_NFWE_B__NFWE_B		0x80000000
 			MX25_PAD_NFRE_B__NFRE_B		0x80000000
 			MX25_PAD_NFALE__NFALE		0x80000000
 			MX25_PAD_NFCLE__NFCLE		0x80000000
 			MX25_PAD_NFWP_B__NFWP_B		0x80000000
-			MX25_PAD_NFRB__NFRB		0x80000000
-			MX25_PAD_D7__D7			0x80000000
-			MX25_PAD_D6__D6			0x80000000
-			MX25_PAD_D5__D5			0x80000000
-			MX25_PAD_D4__D4			0x80000000
-			MX25_PAD_D3__D3			0x80000000
-			MX25_PAD_D2__D2			0x80000000
-			MX25_PAD_D1__D1			0x80000000
-			MX25_PAD_D0__D0			0x80000000
+			MX25_PAD_NFRB__NFRB		0x00000080
+			MX25_PAD_D7__D7			0x00000000
+			MX25_PAD_D6__D6			0x00000000
+			MX25_PAD_D5__D5			0x00000000
+			MX25_PAD_D4__D4			0x00000000
+			MX25_PAD_D3__D3			0x00000000
+			MX25_PAD_D2__D2			0x00000000
+			MX25_PAD_D1__D1			0x00000000
+			MX25_PAD_D0__D0			0x00000000
 		>;
 	};
 };
diff --git a/arch/arm/boot/dts/imx25-pdk.dts b/arch/arm/boot/dts/imx25-pdk.dts
index c823e45a7a01..643d083951ef 100644
--- a/arch/arm/boot/dts/imx25-pdk.dts
+++ b/arch/arm/boot/dts/imx25-pdk.dts
@@ -158,56 +158,56 @@
 		fsl,pins = <
 			MX25_PAD_GPIO_A__CAN1_TX		0x0
 			MX25_PAD_GPIO_B__CAN1_RX		0x0
-			MX25_PAD_D14__GPIO_4_6 			0x80000000
+			MX25_PAD_D14__GPIO_4_6 			0x000000a1
 		>;
 	};
 
 	pinctrl_esdhc1: esdhc1grp {
 		fsl,pins = <
-			MX25_PAD_SD1_CMD__SD1_CMD		0x80000000
-			MX25_PAD_SD1_CLK__SD1_CLK		0x80000000
-			MX25_PAD_SD1_DATA0__SD1_DATA0		0x80000000
-			MX25_PAD_SD1_DATA1__SD1_DATA1		0x80000000
-			MX25_PAD_SD1_DATA2__SD1_DATA2		0x80000000
-			MX25_PAD_SD1_DATA3__SD1_DATA3		0x80000000
-			MX25_PAD_A14__GPIO_2_0			0x80000000
-			MX25_PAD_A15__GPIO_2_1			0x80000000
+			MX25_PAD_SD1_CMD__SD1_CMD		0x000000d1
+			MX25_PAD_SD1_CLK__SD1_CLK		0x000000d1
+			MX25_PAD_SD1_DATA0__SD1_DATA0		0x000000d1
+			MX25_PAD_SD1_DATA1__SD1_DATA1		0x000000d1
+			MX25_PAD_SD1_DATA2__SD1_DATA2		0x000000d1
+			MX25_PAD_SD1_DATA3__SD1_DATA3		0x000000d1
+			MX25_PAD_A14__GPIO_2_0			0x00000080
+			MX25_PAD_A15__GPIO_2_1			0x00000080
 		>;
 	};
 
 	pinctrl_fec: fecgrp {
 		fsl,pins = <
-			MX25_PAD_FEC_MDC__FEC_MDC		0x80000000
+			MX25_PAD_FEC_MDC__FEC_MDC		0x00000060
 			MX25_PAD_FEC_MDIO__FEC_MDIO		0x400001e0
-			MX25_PAD_FEC_TDATA0__FEC_TDATA0		0x80000000
-			MX25_PAD_FEC_TDATA1__FEC_TDATA1		0x80000000
-			MX25_PAD_FEC_TX_EN__FEC_TX_EN		0x80000000
-			MX25_PAD_FEC_RDATA0__FEC_RDATA0		0x80000000
-			MX25_PAD_FEC_RDATA1__FEC_RDATA1		0x80000000
-			MX25_PAD_FEC_RX_DV__FEC_RX_DV		0x80000000
-			MX25_PAD_FEC_TX_CLK__FEC_TX_CLK		0x1c0
-			MX25_PAD_A17__GPIO_2_3			0x80000000
-			MX25_PAD_D12__GPIO_4_8			0x80000000
+			MX25_PAD_FEC_TDATA0__FEC_TDATA0		0x00000060
+			MX25_PAD_FEC_TDATA1__FEC_TDATA1		0x00000060
+			MX25_PAD_FEC_TX_EN__FEC_TX_EN		0x00000060
+			MX25_PAD_FEC_RDATA0__FEC_RDATA0		0x000000c1
+			MX25_PAD_FEC_RDATA1__FEC_RDATA1		0x000000c0
+			MX25_PAD_FEC_RX_DV__FEC_RX_DV		0x000000c0
+			MX25_PAD_FEC_TX_CLK__FEC_TX_CLK		0x000001c0
+			MX25_PAD_A17__GPIO_2_3			0x00000000
+			MX25_PAD_D12__GPIO_4_8			0x000000a1
 		>;
 	};
 
 	pinctrl_i2c1: i2c1grp {
 		fsl,pins = <
-			MX25_PAD_I2C1_CLK__I2C1_CLK		0x80000000
-			MX25_PAD_I2C1_DAT__I2C1_DAT		0x80000000
+			MX25_PAD_I2C1_CLK__I2C1_CLK		0x000000a8
+			MX25_PAD_I2C1_DAT__I2C1_DAT		0x000000a8
 		>;
 	};
 
 	pinctrl_kpp: kppgrp {
 		fsl,pins = <
-			MX25_PAD_KPP_ROW0__KPP_ROW0	0x80000000
-			MX25_PAD_KPP_ROW1__KPP_ROW1	0x80000000
-			MX25_PAD_KPP_ROW2__KPP_ROW2	0x80000000
-			MX25_PAD_KPP_ROW3__KPP_ROW3	0x80000000
-			MX25_PAD_KPP_COL0__KPP_COL0	0x80000000
-			MX25_PAD_KPP_COL1__KPP_COL1	0x80000000
-			MX25_PAD_KPP_COL2__KPP_COL2	0x80000000
-			MX25_PAD_KPP_COL3__KPP_COL3	0x80000000
+			MX25_PAD_KPP_ROW0__KPP_ROW0		0x000000a0
+			MX25_PAD_KPP_ROW1__KPP_ROW1		0x000000a0
+			MX25_PAD_KPP_ROW2__KPP_ROW2		0x000000e0
+			MX25_PAD_KPP_ROW3__KPP_ROW3		0x000000e0
+			MX25_PAD_KPP_COL0__KPP_COL0		0x000000a8
+			MX25_PAD_KPP_COL1__KPP_COL1		0x000000a8
+			MX25_PAD_KPP_COL2__KPP_COL2		0x000000a8
+			MX25_PAD_KPP_COL3__KPP_COL3		0x000000a8
 		>;
 	};
 
@@ -243,7 +243,7 @@
 		fsl,pins = <
 			MX25_PAD_UART1_RTS__UART1_RTS		0xe0
 			MX25_PAD_UART1_CTS__UART1_CTS		0xe0
-			MX25_PAD_UART1_TXD__UART1_TXD		0x80000000
+			MX25_PAD_UART1_TXD__UART1_TXD		0x00000020
 			MX25_PAD_UART1_RXD__UART1_RXD		0x80
 		>;
 	};
-- 
2.8.1

^ permalink raw reply related	[flat|nested] 6+ messages in thread

* [PATCH 1/3] ARM: dts: drop function device nodes for pinctrl-imx nodes
       [not found] ` <1467749993-14533-2-git-send-email-u.kleine-koenig@pengutronix.de>
@ 2016-07-05 20:30   ` Uwe Kleine-König
  0 siblings, 0 replies; 6+ messages in thread
From: Uwe Kleine-König @ 2016-07-05 20:30 UTC (permalink / raw)
  To: linux-arm-kernel

Hello,

On Tue, Jul 05, 2016 at 10:19:51PM +0200, Uwe Kleine-K?nig wrote:
> Since commit v4.2-rc1~128^2~88 ("pinctrl: imx: Allow parsing DT without
> function nodes") the imx pinctrl driver supports the more sensible
> format without function device nodes. It's time to switch all
> devicetrees to this easier format.

This patch hit a filter because it's to big. For reference here is the
diff with whitespace changes ignored (git diff -b):

diff --git a/arch/arm/boot/dts/imx1-ads.dts b/arch/arm/boot/dts/imx1-ads.dts
index af4eee5794aa..c4883138e79d 100644
--- a/arch/arm/boot/dts/imx1-ads.dts
+++ b/arch/arm/boot/dts/imx1-ads.dts
@@ -93,7 +93,6 @@
 };
 
 &iomuxc {
-	imx1-ads {
 	pinctrl_cspi1: cspi1grp {
 		fsl,pins = <
 			MX1_PAD_SPI1_MISO__SPI1_MISO	0x0
@@ -148,5 +147,4 @@
 			MX1_PAD_LBA__LBA		0x0
 		>;
 	};
-	};
 };
diff --git a/arch/arm/boot/dts/imx1-apf9328.dts b/arch/arm/boot/dts/imx1-apf9328.dts
index 07d92fb40e6f..d30ed3b90603 100644
--- a/arch/arm/boot/dts/imx1-apf9328.dts
+++ b/arch/arm/boot/dts/imx1-apf9328.dts
@@ -74,7 +74,6 @@
 };
 
 &iomuxc {
-	imx1-apf9328 {
 	pinctrl_eth: ethgrp {
 		fsl,pins = <
 			MX1_PAD_SIM_SVEN__GPIO2_14	0x0
@@ -125,5 +124,4 @@
 			MX1_PAD_LBA__LBA		0x0
 		>;
 	};
-	};
 };
diff --git a/arch/arm/boot/dts/imx25-eukrea-cpuimx25.dtsi b/arch/arm/boot/dts/imx25-eukrea-cpuimx25.dtsi
index d6f27641c0ef..f024a84bd37b 100644
--- a/arch/arm/boot/dts/imx25-eukrea-cpuimx25.dtsi
+++ b/arch/arm/boot/dts/imx25-eukrea-cpuimx25.dtsi
@@ -41,7 +41,6 @@
 };
 
 &iomuxc {
-	imx25-eukrea-cpuimx25 {
 	pinctrl_fec: fecgrp {
 		fsl,pins = <
 			MX25_PAD_FEC_MDC__FEC_MDC		0x80000000
@@ -62,7 +61,6 @@
 			MX25_PAD_I2C1_DAT__I2C1_DAT		0x80000000
 		>;
 	};
-	};
 };
 
 &nfc {
diff --git a/arch/arm/boot/dts/imx25-eukrea-mbimxsd25-baseboard-cmo-qvga.dts b/arch/arm/boot/dts/imx25-eukrea-mbimxsd25-baseboard-cmo-qvga.dts
index 68d0834a2d1e..184778f4335f 100644
--- a/arch/arm/boot/dts/imx25-eukrea-mbimxsd25-baseboard-cmo-qvga.dts
+++ b/arch/arm/boot/dts/imx25-eukrea-mbimxsd25-baseboard-cmo-qvga.dts
@@ -58,11 +58,9 @@
 };
 
 &iomuxc {
-	imx25-eukrea-mbimxsd25-baseboard-cmo-qvga {
 	pinctrl_reg_lcd_3v3: reg_lcd_3v3 {
 		fsl,pins = <MX25_PAD_PWM__GPIO_1_26 0x80000000>;
 	};
-	};
 };
 
 &lcdc {
diff --git a/arch/arm/boot/dts/imx25-eukrea-mbimxsd25-baseboard.dts b/arch/arm/boot/dts/imx25-eukrea-mbimxsd25-baseboard.dts
index cda6907a27b9..9efcdad20e73 100644
--- a/arch/arm/boot/dts/imx25-eukrea-mbimxsd25-baseboard.dts
+++ b/arch/arm/boot/dts/imx25-eukrea-mbimxsd25-baseboard.dts
@@ -76,7 +76,6 @@
 };
 
 &iomuxc {
-	imx25-eukrea-mbimxsd25-baseboard {
 	pinctrl_audmux: audmuxgrp {
 		fsl,pins = <
 			MX25_PAD_KPP_COL3__AUD5_TXFS		0xe0
@@ -150,7 +149,6 @@
 			MX25_PAD_UART2_CTS__UART2_CTS		0x80000000
 		>;
 	};
-	};
 };
 
 &ssi1 {
diff --git a/arch/arm/boot/dts/imx25-pdk.dts b/arch/arm/boot/dts/imx25-pdk.dts
index 9351296356dc..8b00cfca18ea 100644
--- a/arch/arm/boot/dts/imx25-pdk.dts
+++ b/arch/arm/boot/dts/imx25-pdk.dts
@@ -145,7 +145,6 @@
 };
 
 &iomuxc {
-	imx25-pdk {
 	pinctrl_audmux: audmuxgrp {
 		fsl,pins = <
 			MX25_PAD_RW__AUD4_TXFS			0xe0
@@ -248,7 +247,6 @@
 			MX25_PAD_UART1_RXD__UART1_RXD		0xc0
 		>;
 	};
-	};
 };
 
 &lcdc {
diff --git a/arch/arm/boot/dts/imx27-apf27.dts b/arch/arm/boot/dts/imx27-apf27.dts
index 73aae4f5e539..7037777646d1 100644
--- a/arch/arm/boot/dts/imx27-apf27.dts
+++ b/arch/arm/boot/dts/imx27-apf27.dts
@@ -36,7 +36,6 @@
 };
 
 &iomuxc {
-	imx27-apf27 {
 	pinctrl_fec1: fec1grp {
 		fsl,pins = <
 			MX27_PAD_SD3_CMD__FEC_TXD0 0x0
@@ -66,7 +65,6 @@
 			MX27_PAD_UART1_RXD__UART1_RXD 0x0
 		>;
 	};
-	};
 };
 
 &uart1 {
diff --git a/arch/arm/boot/dts/imx27-apf27dev.dts b/arch/arm/boot/dts/imx27-apf27dev.dts
index bba3f41b89ef..cda7b3ee21bc 100644
--- a/arch/arm/boot/dts/imx27-apf27dev.dts
+++ b/arch/arm/boot/dts/imx27-apf27dev.dts
@@ -137,7 +137,6 @@
 };
 
 &iomuxc {
-	imx27-apf27dev {
 	pinctrl_cspi1: cspi1grp {
 		fsl,pins = <
 			MX27_PAD_CSPI1_MISO__CSPI1_MISO 0x0
@@ -247,7 +246,6 @@
 	pinctrl_sdhc2_cd: sdhc2cdgrp {
 		fsl,pins = <MX27_PAD_TOUT__GPIO3_14 0x0>;
 	};
-	};
 };
 
 &sdhci2 {
diff --git a/arch/arm/boot/dts/imx27-eukrea-cpuimx27.dtsi b/arch/arm/boot/dts/imx27-eukrea-cpuimx27.dtsi
index e2242638ea0b..a1d1b138974f 100644
--- a/arch/arm/boot/dts/imx27-eukrea-cpuimx27.dtsi
+++ b/arch/arm/boot/dts/imx27-eukrea-cpuimx27.dtsi
@@ -166,7 +166,6 @@
 };
 
 &iomuxc {
-	imx27-eukrea-cpuimx27 {
 	pinctrl_fec: fecgrp {
 		fsl,pins = <
 			MX27_PAD_SD3_CMD__FEC_TXD0		0x0
@@ -292,5 +291,4 @@
 			MX27_PAD_USBOTG_DATA7__USBOTG_DATA7	0x0
 		>;
 	};
-	};
 };
diff --git a/arch/arm/boot/dts/imx27-eukrea-mbimxsd27-baseboard.dts b/arch/arm/boot/dts/imx27-eukrea-mbimxsd27-baseboard.dts
index 2ab65fc4c1e1..585699775f24 100644
--- a/arch/arm/boot/dts/imx27-eukrea-mbimxsd27-baseboard.dts
+++ b/arch/arm/boot/dts/imx27-eukrea-mbimxsd27-baseboard.dts
@@ -161,7 +161,6 @@
 };
 
 &iomuxc {
-	imx27-eukrea-cpuimx27-baseboard {
 	pinctrl_cspi1: cspi1grp {
 		fsl,pins = <
 			MX27_PAD_CSPI1_MISO__CSPI1_MISO	0x0
@@ -269,5 +268,4 @@
 			MX27_PAD_UART3_RTS__UART3_RTS	0x0
 		>;
 	};
-	};
 };
diff --git a/arch/arm/boot/dts/imx27-pdk.dts b/arch/arm/boot/dts/imx27-pdk.dts
index 49450dbbcab8..b82432357621 100644
--- a/arch/arm/boot/dts/imx27-pdk.dts
+++ b/arch/arm/boot/dts/imx27-pdk.dts
@@ -122,7 +122,6 @@
 };
 
 &iomuxc {
-	imx27-pdk {
 	pinctrl_cspi2: cspi2grp {
 		fsl,pins = <
 			MX27_PAD_CSPI2_MISO__CSPI2_MISO 0x0
@@ -193,5 +192,4 @@
 			MX27_PAD_USBOTG_DATA7__USBOTG_DATA7 0x0
 		>;
 	};
-	};
 };
diff --git a/arch/arm/boot/dts/imx27-phytec-phycard-s-rdk.dts b/arch/arm/boot/dts/imx27-phytec-phycard-s-rdk.dts
index 7c869fe3c30b..ef5370d7bbf9 100644
--- a/arch/arm/boot/dts/imx27-phytec-phycard-s-rdk.dts
+++ b/arch/arm/boot/dts/imx27-phytec-phycard-s-rdk.dts
@@ -78,7 +78,6 @@
 };
 
 &iomuxc {
-	imx27-phycard-s-rdk {
 	pinctrl_i2c1: i2c1grp {
 		fsl,pins = <
 			MX27_PAD_I2C2_SDA__I2C2_SDA 0x0
@@ -130,7 +129,6 @@
 			MX27_PAD_UART3_RTS__UART3_RTS 0x0
 		>;
 	};
-	};
 };
 
 &owire {
diff --git a/arch/arm/boot/dts/imx27-phytec-phycard-s-som.dtsi b/arch/arm/boot/dts/imx27-phytec-phycard-s-som.dtsi
index 1b6248079682..27315828f534 100644
--- a/arch/arm/boot/dts/imx27-phytec-phycard-s-som.dtsi
+++ b/arch/arm/boot/dts/imx27-phytec-phycard-s-som.dtsi
@@ -48,7 +48,6 @@
 };
 
 &iomuxc {
-	imx27-phycard-s-som {
 	pinctrl_fec1: fec1grp {
 		fsl,pins = <
 			MX27_PAD_SD3_CMD__FEC_TXD0 0x0
@@ -90,7 +89,6 @@
 			MX27_PAD_NFWE_B__NFWE_B 0x0
 		>;
 	};
-	};
 };
 
 &nfc {
diff --git a/arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts b/arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts
index 538568b0de26..133c511f27bb 100644
--- a/arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts
+++ b/arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts
@@ -100,7 +100,6 @@
 };
 
 &iomuxc {
-	imx27_phycore_rdk {
 	pinctrl_csien: csiengrp {
 		fsl,pins = <
 			MX27_PAD_USB_OC_B__GPIO2_24 0x0
@@ -213,7 +212,6 @@
 			MX27_PAD_SD1_D1__GPIO5_19	0x0 /* CAN IRQ */
 		>;
 	};
-	};
 };
 
 &owire {
diff --git a/arch/arm/boot/dts/imx27-phytec-phycore-som.dtsi b/arch/arm/boot/dts/imx27-phytec-phycore-som.dtsi
index b4e955e3be8d..49b0e30cafc8 100644
--- a/arch/arm/boot/dts/imx27-phytec-phycore-som.dtsi
+++ b/arch/arm/boot/dts/imx27-phytec-phycore-som.dtsi
@@ -211,7 +211,6 @@
 };
 
 &iomuxc {
-	imx27_phycore_som {
 	pinctrl_cspi1: cspi1grp {
 		fsl,pins = <
 			MX27_PAD_CSPI1_MISO__CSPI1_MISO 0x0
@@ -295,7 +294,6 @@
 			MX27_PAD_USBOTG_DATA7__USBOTG_DATA7 0x0
 		>;
 	};
-	};
 };
 
 &nfc {
diff --git a/arch/arm/boot/dts/imx35-eukrea-cpuimx35.dtsi b/arch/arm/boot/dts/imx35-eukrea-cpuimx35.dtsi
index 9c2b715ab8bf..4524391cd5bc 100644
--- a/arch/arm/boot/dts/imx35-eukrea-cpuimx35.dtsi
+++ b/arch/arm/boot/dts/imx35-eukrea-cpuimx35.dtsi
@@ -51,7 +51,6 @@
 };
 
 &iomuxc {
-	imx35-eukrea {
 	pinctrl_fec: fecgrp {
 		fsl,pins = <
 			MX35_PAD_FEC_TX_CLK__FEC_TX_CLK		0x80000000
@@ -85,7 +84,6 @@
 	pinctrl_tsc2007_1: tsc2007grp-1 {
 		fsl,pins = <MX35_PAD_ATA_DA2__GPIO3_2 0x80000000>;
 	};
-	};
 };
 
 &nfc {
diff --git a/arch/arm/boot/dts/imx35-eukrea-mbimxsd35-baseboard.dts b/arch/arm/boot/dts/imx35-eukrea-mbimxsd35-baseboard.dts
index 4727bbb804e1..3f41b13cbfd4 100644
--- a/arch/arm/boot/dts/imx35-eukrea-mbimxsd35-baseboard.dts
+++ b/arch/arm/boot/dts/imx35-eukrea-mbimxsd35-baseboard.dts
@@ -77,7 +77,6 @@
 };
 
 &iomuxc {
-	imx35-eukrea {
 	pinctrl_audmux: audmuxgrp {
 		fsl,pins = <
 			MX35_PAD_STXFS4__AUDMUX_AUD4_TXFS	0x80000000
@@ -128,7 +127,6 @@
 			MX35_PAD_CTS2__UART2_CTS		0x1c5
 		>;
 	};
-	};
 };
 
 &ssi1 {
diff --git a/arch/arm/boot/dts/imx35-pdk.dts b/arch/arm/boot/dts/imx35-pdk.dts
index 8d715523708f..369016f78a98 100644
--- a/arch/arm/boot/dts/imx35-pdk.dts
+++ b/arch/arm/boot/dts/imx35-pdk.dts
@@ -30,7 +30,6 @@
 };
 
 &iomuxc {
-	imx35-pdk {
 	pinctrl_esdhc1: esdhc1grp {
 		fsl,pins = <
 			MX35_PAD_SD1_CMD__ESDHC1_CMD		0x80000000
@@ -50,7 +49,6 @@
 			MX35_PAD_RTS1__UART1_RTS		0x1c5
 		>;
 	};
-	};
 };
 
 &nfc {
diff --git a/arch/arm/boot/dts/imx50-evk.dts b/arch/arm/boot/dts/imx50-evk.dts
index 27d763c7a307..04cefa7c950f 100644
--- a/arch/arm/boot/dts/imx50-evk.dts
+++ b/arch/arm/boot/dts/imx50-evk.dts
@@ -59,7 +59,6 @@
 };
 
 &iomuxc {
-	imx50-evk {
 	pinctrl_cspi: cspigrp {
 		fsl,pins = <
 			MX50_PAD_CSPI_SCLK__CSPI_SCLK		0x00
@@ -93,7 +92,6 @@
 			MX50_PAD_UART1_CTS__UART1_CTS		0x1e4
 		>;
 	};
-	};
 };
 
 &uart1 {
diff --git a/arch/arm/boot/dts/imx51-apf51.dts b/arch/arm/boot/dts/imx51-apf51.dts
index e88b2a6be079..aa5861610834 100644
--- a/arch/arm/boot/dts/imx51-apf51.dts
+++ b/arch/arm/boot/dts/imx51-apf51.dts
@@ -42,7 +42,6 @@
 };
 
 &iomuxc {
-	imx51-apf51 {
 	pinctrl_fec: fecgrp {
 		fsl,pins = <
 			MX51_PAD_DI_GP3__FEC_TX_ER		0x80000000
@@ -72,7 +71,6 @@
 			MX51_PAD_UART3_TXD__UART3_TXD		0x1c5
 		>;
 	};
-	};
 };
 
 &nfc {
diff --git a/arch/arm/boot/dts/imx51-apf51dev.dts b/arch/arm/boot/dts/imx51-apf51dev.dts
index 0f3fe29b816e..d43843220c9a 100644
--- a/arch/arm/boot/dts/imx51-apf51dev.dts
+++ b/arch/arm/boot/dts/imx51-apf51dev.dts
@@ -121,7 +121,6 @@
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_hog>;
 
-	imx51-apf51dev {
 	pinctrl_backlight: bl1grp {
 		fsl,pins = <
 			MX51_PAD_DI1_D1_CS__GPIO3_4 0x1F5
@@ -217,7 +216,6 @@
 			MX51_PAD_DI1_PIN3__DI1_PIN3		0x5
 		>;
 	};
-	};
 };
 
 &ipu_di0_disp0 {
diff --git a/arch/arm/boot/dts/imx51-babbage.dts b/arch/arm/boot/dts/imx51-babbage.dts
index 018d24eb9965..636a61491e5f 100644
--- a/arch/arm/boot/dts/imx51-babbage.dts
+++ b/arch/arm/boot/dts/imx51-babbage.dts
@@ -422,7 +422,6 @@
 };
 
 &iomuxc {
-	imx51-babbage {
 	pinctrl_audmux: audmuxgrp {
 		fsl,pins = <
 			MX51_PAD_AUD3_BB_TXD__AUD3_TXD		0x80000000
@@ -651,5 +650,4 @@
 			MX51_PAD_GPIO1_7__GPIO1_7		0x85
 		>;
 	};
-	};
 };
diff --git a/arch/arm/boot/dts/imx51-digi-connectcore-jsk.dts b/arch/arm/boot/dts/imx51-digi-connectcore-jsk.dts
index 1db517d3d497..b72b63406a47 100644
--- a/arch/arm/boot/dts/imx51-digi-connectcore-jsk.dts
+++ b/arch/arm/boot/dts/imx51-digi-connectcore-jsk.dts
@@ -60,7 +60,6 @@
 };
 
 &iomuxc {
-	imx51-digi-connectcore-jsk {
 	pinctrl_owire: owiregrp {
 		fsl,pins = <
 			MX51_PAD_OWIRE_LINE__OWIRE_LINE		0x40000000
@@ -104,5 +103,4 @@
 			MX51_PAD_USBH1_STP__USBH1_STP		0x1e5
 		>;
 	};
-	};
 };
diff --git a/arch/arm/boot/dts/imx51-digi-connectcore-som.dtsi b/arch/arm/boot/dts/imx51-digi-connectcore-som.dtsi
index 16fc69c69ab2..deb6b560cb85 100644
--- a/arch/arm/boot/dts/imx51-digi-connectcore-som.dtsi
+++ b/arch/arm/boot/dts/imx51-digi-connectcore-som.dtsi
@@ -231,7 +231,6 @@
 };
 
 &iomuxc {
-	imx51-digi-connectcore-som {
 	pinctrl_ecspi1: ecspi1grp {
 		fsl,pins = <
 			MX51_PAD_CSPI1_MISO__ECSPI1_MISO	0x185
@@ -373,5 +372,4 @@
 			MX51_PAD_EIM_CS5__EIM_CS5		0x80000000 /* CS5 */
 		>;
 	};
-	};
 };
diff --git a/arch/arm/boot/dts/imx51-eukrea-cpuimx51.dtsi b/arch/arm/boot/dts/imx51-eukrea-cpuimx51.dtsi
index 63164266af83..5aa9e95e2ba0 100644
--- a/arch/arm/boot/dts/imx51-eukrea-cpuimx51.dtsi
+++ b/arch/arm/boot/dts/imx51-eukrea-cpuimx51.dtsi
@@ -56,7 +56,6 @@
 };
 
 &iomuxc {
-	imx51-eukrea {
 	pinctrl_tsc2007_1: tsc2007grp-1 {
 		fsl,pins = <
 			MX51_PAD_GPIO_NAND__GPIO_NAND 0x1f5
@@ -93,7 +92,6 @@
 			MX51_PAD_SD2_CLK__I2C1_SDA		0x400001ed
 		>;
 	};
-	};
 };
 
 &nfc {
diff --git a/arch/arm/boot/dts/imx51-eukrea-mbimxsd51-baseboard.dts b/arch/arm/boot/dts/imx51-eukrea-mbimxsd51-baseboard.dts
index d270df3e5891..7002a66d51e0 100644
--- a/arch/arm/boot/dts/imx51-eukrea-mbimxsd51-baseboard.dts
+++ b/arch/arm/boot/dts/imx51-eukrea-mbimxsd51-baseboard.dts
@@ -139,7 +139,6 @@
 };
 
 &iomuxc {
-	imx51-eukrea {
 	pinctrl_audmux: audmuxgrp {
 		fsl,pins = <
 			MX51_PAD_AUD3_BB_TXD__AUD3_TXD		0x80000000
@@ -250,7 +249,6 @@
 			MX51_PAD_EIM_CS3__GPIO2_28 0x1f5
 		>;
 	};
-	};
 };
 
 &ssi2 {
diff --git a/arch/arm/boot/dts/imx53-ard.dts b/arch/arm/boot/dts/imx53-ard.dts
index 4486bc47d140..f41e6f91b0c3 100644
--- a/arch/arm/boot/dts/imx53-ard.dts
+++ b/arch/arm/boot/dts/imx53-ard.dts
@@ -112,7 +112,6 @@
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_hog>;
 
-	imx53-ard {
 	pinctrl_hog: hoggrp {
 		fsl,pins = <
 			MX53_PAD_GPIO_1__GPIO1_1             0x80000000
@@ -173,7 +172,6 @@
 			MX53_PAD_PATA_DMACK__UART1_RXD_MUX	0x1e4
 		>;
 	};
-	};
 };
 
 &uart1 {
diff --git a/arch/arm/boot/dts/imx53-m53.dtsi b/arch/arm/boot/dts/imx53-m53.dtsi
index 87a7fc709c2d..443f6eccace8 100644
--- a/arch/arm/boot/dts/imx53-m53.dtsi
+++ b/arch/arm/boot/dts/imx53-m53.dtsi
@@ -93,7 +93,6 @@
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_hog>;
 
-	imx53-m53evk {
 	pinctrl_hog: hoggrp {
 		fsl,pins = <
 			MX53_PAD_GPIO_0__CCM_SSI_EXT1_CLK	0x80000000
@@ -128,7 +127,6 @@
 			MX53_PAD_PATA_DATA7__EMI_NANDF_D_7	0xa4
 		>;
 	};
-	};
 };
 
 &nfc {
diff --git a/arch/arm/boot/dts/imx53-m53evk.dts b/arch/arm/boot/dts/imx53-m53evk.dts
index dcee1e0f968f..bd33bd60ebc8 100644
--- a/arch/arm/boot/dts/imx53-m53evk.dts
+++ b/arch/arm/boot/dts/imx53-m53evk.dts
@@ -169,7 +169,6 @@
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_hog>;
 
-	imx53-m53evk {
 	pinctrl_usb: usbgrp {
 		fsl,pins = <
 			MX53_PAD_GPIO_2__GPIO1_2		0x80000000
@@ -318,7 +317,6 @@
 			MX53_PAD_PATA_DA_2__UART3_RTS		0x1e4
 		>;
 	};
-	};
 };
 
 &ipu_di1_disp1 {
diff --git a/arch/arm/boot/dts/imx53-mba53.dts b/arch/arm/boot/dts/imx53-mba53.dts
index 2e44d2aba14e..fa6438141747 100644
--- a/arch/arm/boot/dts/imx53-mba53.dts
+++ b/arch/arm/boot/dts/imx53-mba53.dts
@@ -89,7 +89,6 @@
 };
 
 &iomuxc {
-	lvds1 {
 	pinctrl_lvds1_1: lvds1-grp1 {
 		fsl,pins = <
 			MX53_PAD_LVDS0_TX3_P__LDB_LVDS0_TX3 0x80000000
@@ -109,9 +108,7 @@
 			MX53_PAD_LVDS1_TX0_P__LDB_LVDS1_TX0 0x80000000
 		>;
 	};
-	};
 
-	disp1 {
 	pinctrl_disp1_1: disp1-grp1 {
 		fsl,pins = <
 			MX53_PAD_EIM_A16__IPU_DI1_DISP_CLK 0x80000000 /* DISP1_CLK */
@@ -144,9 +141,7 @@
 			MX53_PAD_EIM_DA9__IPU_DISP1_DAT_0  0x80000000
 		>;
 	};
-	};
 
-	tve {
 	pinctrl_vga_sync_1: vgasync-grp1 {
 		fsl,pins = <
 			/* VGA_VSYNC, HSYNC with max drive strength */
@@ -154,7 +149,6 @@
 			MX53_PAD_EIM_DA15__IPU_DI1_PIN4	   0xe6
 		>;
 	};
-	};
 };
 
 &ipu_di1_disp1 {
diff --git a/arch/arm/boot/dts/imx53-qsb-common.dtsi b/arch/arm/boot/dts/imx53-qsb-common.dtsi
index c05e7cfd0cbc..baebcd3a0515 100644
--- a/arch/arm/boot/dts/imx53-qsb-common.dtsi
+++ b/arch/arm/boot/dts/imx53-qsb-common.dtsi
@@ -157,7 +157,6 @@
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_hog>;
 
-	imx53-qsb {
 	pinctrl_hog: hoggrp {
 		fsl,pins = <
 			MX53_PAD_GPIO_0__CCM_SSI_EXT1_CLK 0x80000000
@@ -290,7 +289,6 @@
 			MX53_PAD_CSI0_DAT11__UART1_RXD_MUX	0x1e4
 		>;
 	};
-	};
 };
 
 &tve {
diff --git a/arch/arm/boot/dts/imx53-qsrb.dts b/arch/arm/boot/dts/imx53-qsrb.dts
index 96d7eede412e..0bda292893e0 100644
--- a/arch/arm/boot/dts/imx53-qsrb.dts
+++ b/arch/arm/boot/dts/imx53-qsrb.dts
@@ -20,13 +20,11 @@
 };
 
 &iomuxc {
-	imx53-qsrb {
 	pinctrl_pmic: pmicgrp {
 		fsl,pins = <
 			MX53_PAD_CSI0_DAT5__GPIO5_23	0x1e4 /* IRQ */
 		>;
 	};
-	};
 };
 
 &i2c1 {
diff --git a/arch/arm/boot/dts/imx53-smd.dts b/arch/arm/boot/dts/imx53-smd.dts
index 542ab9e697fb..105b5e0972ff 100644
--- a/arch/arm/boot/dts/imx53-smd.dts
+++ b/arch/arm/boot/dts/imx53-smd.dts
@@ -104,7 +104,6 @@
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_hog>;
 
-	imx53-smd {
 	pinctrl_hog: hoggrp {
 		fsl,pins = <
 			MX53_PAD_PATA_DATA14__GPIO2_14 0x80000000
@@ -213,7 +212,6 @@
 			MX53_PAD_PATA_DA_2__UART3_RTS		0x1e4
 		>;
 	};
-	};
 };
 
 &uart1 {
diff --git a/arch/arm/boot/dts/imx53-tqma53.dtsi b/arch/arm/boot/dts/imx53-tqma53.dtsi
index e03373a58760..244842e8152a 100644
--- a/arch/arm/boot/dts/imx53-tqma53.dtsi
+++ b/arch/arm/boot/dts/imx53-tqma53.dtsi
@@ -74,7 +74,6 @@
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_hog>;
 
-	imx53-tqma53 {
 	pinctrl_hog: hoggrp {
 		fsl,pins = <
 			 MX53_PAD_GPIO_0__CCM_SSI_EXT1_CLK 0x80000000 /* SSI_MCLK */
@@ -212,7 +211,6 @@
 			MX53_PAD_PATA_CS_1__UART3_RXD_MUX	0x1e4
 		>;
 	};
-	};
 };
 
 &uart1 {
diff --git a/arch/arm/boot/dts/imx53-tx53-x03x.dts b/arch/arm/boot/dts/imx53-tx53-x03x.dts
index 0ecb43d88522..bc799aa896b3 100644
--- a/arch/arm/boot/dts/imx53-tx53-x03x.dts
+++ b/arch/arm/boot/dts/imx53-tx53-x03x.dts
@@ -236,7 +236,6 @@
 };
 
 &iomuxc {
-	imx53-tx53-x03x {
 	pinctrl_edt_ft5x06_1: edt-ft5x06grp-1 {
 		fsl,pins = <
 			MX53_PAD_NANDF_CS2__GPIO6_15 0x1f0 /* Interrupt */
@@ -296,7 +295,6 @@
 			MX53_PAD_EIM_D26__GPIO3_26 0x1f0 /* Interrupt */
 		>;
 	};
-	};
 };
 
 &ipu_di0_disp0 {
diff --git a/arch/arm/boot/dts/imx53-tx53-x13x.dts b/arch/arm/boot/dts/imx53-tx53-x13x.dts
index 3cf682a681f4..73487c4b49b0 100644
--- a/arch/arm/boot/dts/imx53-tx53-x13x.dts
+++ b/arch/arm/boot/dts/imx53-tx53-x13x.dts
@@ -131,7 +131,6 @@
 };
 
 &iomuxc {
-	imx53-tx53-x13x {
 	pinctrl_i2c2: i2c2-grp1 {
 		fsl,pins = <
 			MX53_PAD_KEY_ROW3__I2C2_SDA		0xc0000000
@@ -174,7 +173,6 @@
 			MX53_PAD_EIM_D23__GPIO3_23 0x1f0 /* Interrupt */
 		>;
 	};
-	};
 };
 
 &ldb {
diff --git a/arch/arm/boot/dts/imx53-tx53.dtsi b/arch/arm/boot/dts/imx53-tx53.dtsi
index bd3dfefa5778..13deaa664eb8 100644
--- a/arch/arm/boot/dts/imx53-tx53.dtsi
+++ b/arch/arm/boot/dts/imx53-tx53.dtsi
@@ -234,7 +234,6 @@
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_hog>;
 
-	imx53-tx53 {
 	pinctrl_hog: hoggrp {
 		/* pins not in use by any device on the Starterkit board series */
 		fsl,pins = <
@@ -475,7 +474,6 @@
 			MX53_PAD_GPIO_8__GPIO1_8 0x100 /* OC */
 		>;
 	};
-	};
 };
 
 &ipu {
diff --git a/arch/arm/boot/dts/imx53-voipac-bsb.dts b/arch/arm/boot/dts/imx53-voipac-bsb.dts
index fc51b87ad208..bf06e659436f 100644
--- a/arch/arm/boot/dts/imx53-voipac-bsb.dts
+++ b/arch/arm/boot/dts/imx53-voipac-bsb.dts
@@ -48,7 +48,6 @@
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_hog>;
 
-	imx53-voipac {
 	pinctrl_hog: hoggrp {
 		fsl,pins = <
 			/* SD2_CD */
@@ -107,7 +106,6 @@
 			MX53_PAD_GPIO_6__I2C3_SDA		0xc0000000
 		>;
 	};
-	};
 };
 
 &audmux {
diff --git a/arch/arm/boot/dts/imx53-voipac-dmm-668.dtsi b/arch/arm/boot/dts/imx53-voipac-dmm-668.dtsi
index ba689fbd0e41..1ad10374b3c5 100644
--- a/arch/arm/boot/dts/imx53-voipac-dmm-668.dtsi
+++ b/arch/arm/boot/dts/imx53-voipac-dmm-668.dtsi
@@ -55,7 +55,6 @@
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_hog>;
 
-	imx53-voipac {
 	pinctrl_hog: hoggrp {
 		fsl,pins = <
 			/* Make DA9053 regulator functional */
@@ -123,7 +122,6 @@
 			MX53_PAD_PATA_DATA7__EMI_NANDF_D_7	0xa4
 		>;
 	};
-	};
 };
 
 &ecspi1 {
diff --git a/arch/arm/boot/dts/imx6dl-riotboard.dts b/arch/arm/boot/dts/imx6dl-riotboard.dts
index bfbed52ce1bd..2309b050525f 100644
--- a/arch/arm/boot/dts/imx6dl-riotboard.dts
+++ b/arch/arm/boot/dts/imx6dl-riotboard.dts
@@ -331,7 +331,6 @@
 &iomuxc {
 	pinctrl-names = "default";
 
-	imx6-riotboard {
 	pinctrl_audmux: audmuxgrp {
 		fsl,pins = <
 			MX6QDL_PAD_CSI0_DAT7__AUD3_RXD		0x130b0
@@ -534,5 +533,4 @@
 			MX6QDL_PAD_NANDF_ALE__GPIO6_IO08	0x17059	/* SD4 RST (eMMC) */
 		>;
 	};
-	};
 };
diff --git a/arch/arm/boot/dts/imx6q-arm2.dts b/arch/arm/boot/dts/imx6q-arm2.dts
index d6515f7a56c4..1ef2ca4251b0 100644
--- a/arch/arm/boot/dts/imx6q-arm2.dts
+++ b/arch/arm/boot/dts/imx6q-arm2.dts
@@ -68,7 +68,6 @@
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_hog>;
 
-	imx6q-arm2 {
 	pinctrl_hog: hoggrp {
 		fsl,pins = <
 			MX6QDL_PAD_EIM_D25__GPIO3_IO25 0x80000000
@@ -176,7 +175,6 @@
 			MX6QDL_PAD_SD4_DAT7__SD4_DATA7		0x17059
 		>;
 	};
-	};
 };
 
 &fec {
diff --git a/arch/arm/boot/dts/imx6q-cm-fx6.dts b/arch/arm/boot/dts/imx6q-cm-fx6.dts
index 99b46f8030ad..21c513f6980e 100644
--- a/arch/arm/boot/dts/imx6q-cm-fx6.dts
+++ b/arch/arm/boot/dts/imx6q-cm-fx6.dts
@@ -47,7 +47,6 @@
 };
 
 &iomuxc {
-	imx6q-cm-fx6 {
 	pinctrl_enet: enetgrp {
 		fsl,pins = <
 			MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b0b0
@@ -97,7 +96,6 @@
 			MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA	0x1b0b1
 		>;
 	};
-	};
 };
 
 &uart4 {
diff --git a/arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts b/arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts
index 364578d707a5..84046ad7ab16 100644
--- a/arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts
+++ b/arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts
@@ -298,7 +298,6 @@
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_hog>;
 
-	imx6q-dmo-edmqmx6 {
 	pinctrl_hog: hoggrp {
 		fsl,pins = <
 			MX6QDL_PAD_EIM_A16__GPIO2_IO22 0x80000000
@@ -430,7 +429,6 @@
 			MX6QDL_PAD_SD4_DAT7__SD4_DATA7		0x17059
 		>;
 	};
-	};
 };
 
 &pcie {
diff --git a/arch/arm/boot/dts/imx6q-gk802.dts b/arch/arm/boot/dts/imx6q-gk802.dts
index b715deb4ea46..46a6a7d2df34 100644
--- a/arch/arm/boot/dts/imx6q-gk802.dts
+++ b/arch/arm/boot/dts/imx6q-gk802.dts
@@ -80,7 +80,6 @@
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_hog>;
 
-	imx6q-gk802 {
 	pinctrl_hog: hoggrp {
 		fsl,pins = <
 			/* Recovery button, active-low */
@@ -132,7 +131,6 @@
 			MX6QDL_PAD_SD4_DAT3__SD4_DATA3		0x17059
 		>;
 	};
-	};
 };
 
 &uart2 {
diff --git a/arch/arm/boot/dts/imx6q-gw5400-a.dts b/arch/arm/boot/dts/imx6q-gw5400-a.dts
index 0511137d1e23..2e40c7e2f870 100644
--- a/arch/arm/boot/dts/imx6q-gw5400-a.dts
+++ b/arch/arm/boot/dts/imx6q-gw5400-a.dts
@@ -398,8 +398,6 @@
 };
 
 &iomuxc {
-	imx6q-gw5400-a {
-
 	pinctrl_audmux: audmuxgrp {
 		fsl,pins = <
 			MX6QDL_PAD_SD2_DAT0__AUD4_RXD		0x130b0
@@ -520,5 +518,4 @@
 			MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x17059
 		>;
 	};
-	};
 };
diff --git a/arch/arm/boot/dts/imx6q-marsboard.dts b/arch/arm/boot/dts/imx6q-marsboard.dts
index 3f8013c85fb9..bc22cc31119c 100644
--- a/arch/arm/boot/dts/imx6q-marsboard.dts
+++ b/arch/arm/boot/dts/imx6q-marsboard.dts
@@ -228,7 +228,6 @@
 };
 
 &iomuxc {
-
 	pinctrl_audmux: audmuxgrp {
 		fsl,pins = <
 			MX6QDL_PAD_CSI0_DAT7__AUD3_RXD		0x130b0
diff --git a/arch/arm/boot/dts/imx6q-sbc6x.dts b/arch/arm/boot/dts/imx6q-sbc6x.dts
index 86cf09364664..60277d75b207 100644
--- a/arch/arm/boot/dts/imx6q-sbc6x.dts
+++ b/arch/arm/boot/dts/imx6q-sbc6x.dts
@@ -26,7 +26,6 @@
 };
 
 &iomuxc {
-	imx6q-sbc6x {
 	pinctrl_enet: enetgrp {
 		fsl,pins = <
 			MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b0b0
@@ -71,7 +70,6 @@
 			MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x17059
 		>;
 	};
-	};
 };
 
 &uart1 {
diff --git a/arch/arm/boot/dts/imx6qdl-apf6.dtsi b/arch/arm/boot/dts/imx6qdl-apf6.dtsi
index 1ebf29f43a24..82387f72005f 100644
--- a/arch/arm/boot/dts/imx6qdl-apf6.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-apf6.dtsi
@@ -94,7 +94,6 @@
 };
 
 &iomuxc {
-	apf6 {
 	pinctrl_enet: enetgrp {
 		fsl,pins = <
 			MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b8b0
@@ -154,5 +153,4 @@
 			MX6QDL_PAD_SD3_DAT7__SD3_DATA7	0x17059
 		>;
 	};
-	};
 };
diff --git a/arch/arm/boot/dts/imx6qdl-apf6dev.dtsi b/arch/arm/boot/dts/imx6qdl-apf6dev.dtsi
index 865c9a264a43..e289a30b7872 100644
--- a/arch/arm/boot/dts/imx6qdl-apf6dev.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-apf6dev.dtsi
@@ -302,7 +302,6 @@
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_gpios>;
 
-	apf6dev {
 	pinctrl_audmux: audmuxgrp {
 		fsl,pins = <
 			MX6QDL_PAD_CSI0_DAT4__AUD3_TXC  0x1b0b0
@@ -475,5 +474,4 @@
 			MX6QDL_PAD_CSI0_DAT17__GPIO6_IO03 0x1b0b0
 		>;
 	};
-	};
 };
diff --git a/arch/arm/boot/dts/imx6qdl-aristainetos.dtsi b/arch/arm/boot/dts/imx6qdl-aristainetos.dtsi
index ecbc6eba6a2c..f7e6803992ee 100644
--- a/arch/arm/boot/dts/imx6qdl-aristainetos.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-aristainetos.dtsi
@@ -189,7 +189,6 @@
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_hog &pinctrl_gpio>;
 
-	imx6qdl-aristainetos {
 	pinctrl_aristainetos_usbh1_vbus: aristainetos-usbh1-vbus {
 		fsl,pins = <MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x130b0>;
 	};
@@ -414,5 +413,4 @@
 			MX6QDL_PAD_KEY_COL1__GPIO4_IO08 0x1b0b0
 		>;
 	};
-	};
 };
diff --git a/arch/arm/boot/dts/imx6qdl-cubox-i.dtsi b/arch/arm/boot/dts/imx6qdl-cubox-i.dtsi
index ff41f83551de..a238420015cb 100644
--- a/arch/arm/boot/dts/imx6qdl-cubox-i.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-cubox-i.dtsi
@@ -146,7 +146,6 @@
 };
 
 &iomuxc {
-	cubox_i {
 	pinctrl_cubox_i_hdmi: cubox-i-hdmi {
 		fsl,pins = <
 			MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE 0x1f8b0
@@ -227,7 +226,6 @@
 			MX6QDL_PAD_EIM_DA8__GPIO3_IO08	0x17059
 		>;
 	};
-	};
 };
 
 &pwm1 {
diff --git a/arch/arm/boot/dts/imx6qdl-dfi-fs700-m60.dtsi b/arch/arm/boot/dts/imx6qdl-dfi-fs700-m60.dtsi
index da1341d47b14..80682d506f8f 100644
--- a/arch/arm/boot/dts/imx6qdl-dfi-fs700-m60.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-dfi-fs700-m60.dtsi
@@ -55,7 +55,6 @@
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_hog>;
 
-	imx6qdl-dfi-fs700-m60 {
 	pinctrl_hog: hoggrp {
 		fsl,pins = <
 			MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x80000000
@@ -152,7 +151,6 @@
 			MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24 0x80000000 /* SPI NOR chipselect */
 		>;
 	};
-	};
 };
 
 &i2c2 {
diff --git a/arch/arm/boot/dts/imx6qdl-gw51xx.dtsi b/arch/arm/boot/dts/imx6qdl-gw51xx.dtsi
index 9d7ab6cdc9a6..5e829c650a56 100644
--- a/arch/arm/boot/dts/imx6qdl-gw51xx.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-gw51xx.dtsi
@@ -229,7 +229,6 @@
 };
 
 &iomuxc {
-	imx6qdl-gw51xx {
 	pinctrl_enet: enetgrp {
 		fsl,pins = <
 			MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b0b0
@@ -364,5 +363,4 @@
 			MX6QDL_PAD_EIM_D22__GPIO3_IO22		0x1b0b0 /* OTG_PWR_EN */
 		>;
 	};
-	};
 };
diff --git a/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi b/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi
index 7191b84770b9..78b53ff4aa17 100644
--- a/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi
@@ -354,7 +354,6 @@
 };
 
 &iomuxc {
-	imx6qdl-gw52xx {
 	pinctrl_audmux: audmuxgrp {
 		fsl,pins = <
 			MX6QDL_PAD_SD2_DAT0__AUD4_RXD		0x130b0
@@ -549,5 +548,4 @@
 			MX6QDL_PAD_NANDF_CS1__SD3_VSELECT	0x170f9
 		>;
 	};
-	};
 };
diff --git a/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi b/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi
index 40d06b09deba..8788afc25709 100644
--- a/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi
@@ -352,7 +352,6 @@
 };
 
 &iomuxc {
-	imx6qdl-gw53xx {
 	pinctrl_audmux: audmuxgrp {
 		fsl,pins = <
 			MX6QDL_PAD_SD2_DAT0__AUD4_RXD		0x130b0
@@ -539,5 +538,4 @@
 			MX6QDL_PAD_NANDF_CS1__SD3_VSELECT	0x170f9
 		>;
 	};
-	};
 };
diff --git a/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi b/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi
index d6dbe2a88ee6..8ceaf527b58e 100644
--- a/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi
@@ -454,7 +454,6 @@
 };
 
 &iomuxc {
-	imx6qdl-gw54xx {
 	pinctrl_audmux: audmuxgrp {
 		fsl,pins = <
 			MX6QDL_PAD_SD2_DAT0__AUD4_RXD		0x130b0
@@ -654,5 +653,4 @@
 			MX6QDL_PAD_NANDF_CS1__SD3_VSELECT	0x170f9
 		>;
 	};
-	};
 };
diff --git a/arch/arm/boot/dts/imx6qdl-gw551x.dtsi b/arch/arm/boot/dts/imx6qdl-gw551x.dtsi
index 118bea524dab..51307ae3dbc0 100644
--- a/arch/arm/boot/dts/imx6qdl-gw551x.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-gw551x.dtsi
@@ -240,7 +240,6 @@
 };
 
 &iomuxc {
-	imx6qdl-gw51xx {
 	pinctrl_flexcan1: flexcan1grp {
 		fsl,pins = <
 			MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX	0x1b0b1
@@ -333,5 +332,4 @@
 			MX6QDL_PAD_GPIO_1__USB_OTG_ID		0x17059
 		>;
 	};
-	};
 };
diff --git a/arch/arm/boot/dts/imx6qdl-gw552x.dtsi b/arch/arm/boot/dts/imx6qdl-gw552x.dtsi
index f27f184558fb..623b6e6037b5 100644
--- a/arch/arm/boot/dts/imx6qdl-gw552x.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-gw552x.dtsi
@@ -198,7 +198,6 @@
 };
 
 &iomuxc {
-	imx6qdl-gw552x {
 	pinctrl_gpio_leds: gpioledsgrp {
 		fsl,pins = <
 			MX6QDL_PAD_KEY_COL0__GPIO4_IO06		0x1b0b0
@@ -286,5 +285,4 @@
 			MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA	0x1b0b1
 		>;
 	};
-	};
 };
diff --git a/arch/arm/boot/dts/imx6qdl-hummingboard.dtsi b/arch/arm/boot/dts/imx6qdl-hummingboard.dtsi
index d6c2358ffad4..3c5f268b6c37 100644
--- a/arch/arm/boot/dts/imx6qdl-hummingboard.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-hummingboard.dtsi
@@ -157,7 +157,6 @@
 };
 
 &iomuxc {
-	hummingboard {
 	pinctrl_hummingboard_flexcan1: hummingboard-flexcan1 {
 		fsl,pins = <
 			MX6QDL_PAD_SD3_CLK__FLEXCAN1_RX 0x80000000
@@ -247,7 +246,6 @@
 			MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x13059
 		>;
 	};
-	};
 };
 
 &pcie {
diff --git a/arch/arm/boot/dts/imx6qdl-microsom-ar8035.dtsi b/arch/arm/boot/dts/imx6qdl-microsom-ar8035.dtsi
index 469ef58ce4bc..631fa6eacc79 100644
--- a/arch/arm/boot/dts/imx6qdl-microsom-ar8035.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-microsom-ar8035.dtsi
@@ -51,7 +51,6 @@
 };
 
 &iomuxc {
-	enet {
 	pinctrl_microsom_enet_ar8035: microsom-enet-ar8035 {
 		fsl,pins = <
 			MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b8b0
@@ -95,5 +94,4 @@
 			MX6QDL_PAD_ENET_RXD1__GPIO1_IO26	0x03000
 		>;
 	};
-	};
 };
diff --git a/arch/arm/boot/dts/imx6qdl-microsom.dtsi b/arch/arm/boot/dts/imx6qdl-microsom.dtsi
index 86460e46d055..d26626c842c4 100644
--- a/arch/arm/boot/dts/imx6qdl-microsom.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-microsom.dtsi
@@ -74,7 +74,6 @@
 };
 
 &iomuxc {
-	microsom {
 	pinctrl_microsom_brcm_bt: microsom-brcm-bt {
 		fsl,pins = <
 			MX6QDL_PAD_CSI0_DAT14__GPIO6_IO00	0x40013070
@@ -130,7 +129,6 @@
 			MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17059
 		>;
 	};
-	};
 };
 
 &uart1 {
diff --git a/arch/arm/boot/dts/imx6qdl-nit6xlite.dtsi b/arch/arm/boot/dts/imx6qdl-nit6xlite.dtsi
index e456b5cc1b03..1a4a244c31f9 100644
--- a/arch/arm/boot/dts/imx6qdl-nit6xlite.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-nit6xlite.dtsi
@@ -317,7 +317,6 @@
 	pinctrl-0 = <&pinctrl_j10>;
 	pinctrl-1 = <&pinctrl_j28>;
 
-	imx6dl-nit6xlite {
 	pinctrl_audmux: audmuxgrp {
 		fsl,pins = <
 			MX6QDL_PAD_CSI0_DAT7__AUD3_RXD		0x130b0
@@ -529,7 +528,6 @@
 			MX6QDL_PAD_SD3_DAT5__GPIO7_IO00		0x1b0b0
 		>;
 	};
-	};
 };
 
 &ldb {
diff --git a/arch/arm/boot/dts/imx6qdl-nitrogen6_max.dtsi b/arch/arm/boot/dts/imx6qdl-nitrogen6_max.dtsi
index 657da6b6ccd2..762b2a934978 100644
--- a/arch/arm/boot/dts/imx6qdl-nitrogen6_max.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-nitrogen6_max.dtsi
@@ -446,7 +446,6 @@
 };
 
 &iomuxc {
-	imx6q-nitrogen6_max {
 	pinctrl_audmux: audmuxgrp {
 		fsl,pins = <
 			MX6QDL_PAD_CSI0_DAT7__AUD3_RXD		0x130b0
@@ -727,7 +726,6 @@
 			MX6QDL_PAD_SD1_CLK__OSC32K_32K_OUT	0x000b0
 		>;
 	};
-	};
 };
 
 &ipu1_di0_disp0 {
diff --git a/arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi b/arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi
index 73915db704a0..c9a337deb7cd 100644
--- a/arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi
@@ -348,7 +348,6 @@
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_hog>;
 
-	imx6q-nitrogen6x {
 	pinctrl_hog: hoggrp {
 		fsl,pins = <
 			/* SGTL5000 sys_mclk */
@@ -568,7 +567,6 @@
 			MX6QDL_PAD_SD1_CLK__OSC32K_32K_OUT	0x000b0
 		>;
 	};
-	};
 };
 
 &ipu1_di0_disp0 {
diff --git a/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi b/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi
index d6d98d426384..afffd1b0f158 100644
--- a/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi
@@ -208,7 +208,6 @@
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_hog>;
 
-	imx6q-phytec-pfla02 {
 	pinctrl_hog: hoggrp {
 		fsl,pins = <
 			MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x80000000
@@ -369,7 +368,6 @@
 			MX6QDL_PAD_DISP0_DAT19__AUD5_RXD	0x130b0
 		>;
 	};
-	};
 };
 
 &pcie {
diff --git a/arch/arm/boot/dts/imx6qdl-rex.dtsi b/arch/arm/boot/dts/imx6qdl-rex.dtsi
index cacf5933707d..f8d49899f6e8 100644
--- a/arch/arm/boot/dts/imx6qdl-rex.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-rex.dtsi
@@ -155,7 +155,6 @@
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_hog>;
 
-	imx6qdl-rex {
 	pinctrl_hog: hoggrp {
 		fsl,pins = <
 			/* SGTL5000 sys_mclk */
@@ -302,7 +301,6 @@
 			MX6QDL_PAD_NANDF_D1__GPIO2_IO01		0x1f0b0
 		>;
 	};
-	};
 };
 
 &ssi1 {
diff --git a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
index d354d406954d..cab748c7483f 100644
--- a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
@@ -317,7 +317,6 @@
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_hog>;
 
-	imx6qdl-sabreauto {
 	pinctrl_hog: hoggrp {
 		fsl,pins = <
 			MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x80000000
@@ -541,7 +540,6 @@
 			MX6QDL_PAD_EIM_DA0__EIM_AD00		0xb0b1
 		>;
 	};
-	};
 };
 
 &ldb {
diff --git a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
index c47fe6c79b36..9b9999499930 100644
--- a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
@@ -314,7 +314,6 @@
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_hog>;
 
-	imx6q-sabrelite {
 	pinctrl_hog: hoggrp {
 		fsl,pins = <
 			/* SGTL5000 sys_mclk */
@@ -513,7 +512,6 @@
 			MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x1b0b0	/* CD */
 		>;
 	};
-	};
 };
 
 &ipu1_di0_disp0 {
diff --git a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
index 5248e7bd2b06..7ab9249b6144 100644
--- a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
@@ -343,7 +343,6 @@
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_hog>;
 
-	imx6qdl-sabresd {
 	pinctrl_hog: hoggrp {
 		fsl,pins = <
 			MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x1b0b0
@@ -501,15 +500,12 @@
 			MX6QDL_PAD_SD4_DAT7__SD4_DATA7		0x17059
 		>;
 	};
-	};
 
-	gpio_leds {
 	pinctrl_gpio_leds: gpioledsgrp {
 		fsl,pins = <
 			MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0
 		>;
 	};
-	};
 };
 
 &ldb {
diff --git a/arch/arm/boot/dts/imx6qdl-udoo.dtsi b/arch/arm/boot/dts/imx6qdl-udoo.dtsi
index 3bee2f910067..42caca66ef04 100644
--- a/arch/arm/boot/dts/imx6qdl-udoo.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-udoo.dtsi
@@ -129,7 +129,6 @@
 };
 
 &iomuxc {
-	imx6q-udoo {
 	pinctrl_enet: enetgrp {
 		fsl,pins = <
 			MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b0b0
@@ -233,7 +232,6 @@
 			MX6QDL_PAD_EIM_EB2__GPIO2_IO30		0x1b0b0
 		>;
 	};
-	};
 };
 
 &ldb {
diff --git a/arch/arm/boot/dts/imx6qdl-wandboard-revb1.dtsi b/arch/arm/boot/dts/imx6qdl-wandboard-revb1.dtsi
index ef7fa62b9898..d92c5a4f07d9 100644
--- a/arch/arm/boot/dts/imx6qdl-wandboard-revb1.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-wandboard-revb1.dtsi
@@ -14,7 +14,6 @@
 &iomuxc {
 	pinctrl-0 = <&pinctrl_hog>;
 
-	imx6qdl-wandboard {
 	pinctrl_hog: hoggrp {
 		fsl,pins = <
 			MX6QDL_PAD_GPIO_0__CCM_CLKO1		0x130b0		/* GPIO_0_CLKO */
@@ -31,7 +30,6 @@
 			MX6QDL_PAD_EIM_DA15__GPIO3_IO15		0x80000000	/* BT_HOST_WAKE */				
 		>;
 	};
-	};
 };
 
 &usdhc2 {
diff --git a/arch/arm/boot/dts/imx6qdl-wandboard-revc1.dtsi b/arch/arm/boot/dts/imx6qdl-wandboard-revc1.dtsi
index 8d893a78cdf0..ca4bfb2aa218 100644
--- a/arch/arm/boot/dts/imx6qdl-wandboard-revc1.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-wandboard-revc1.dtsi
@@ -14,7 +14,6 @@
 &iomuxc {
 	pinctrl-0 = <&pinctrl_hog>;
 
-	imx6qdl-wandboard {
 	pinctrl_hog: hoggrp {
 		fsl,pins = <
 			MX6QDL_PAD_GPIO_0__CCM_CLKO1		0x130b0		/* GPIO_0_CLKO */
@@ -31,7 +30,6 @@
 			MX6QDL_PAD_EIM_D29__GPIO3_IO29		0x80000000	/* RGMII_nRST */
 		>;
 	};
-	};
 };
 
 &usdhc2 {
diff --git a/arch/arm/boot/dts/imx6qdl-wandboard.dtsi b/arch/arm/boot/dts/imx6qdl-wandboard.dtsi
index 8e7c40e114dd..dff0eab40f79 100644
--- a/arch/arm/boot/dts/imx6qdl-wandboard.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-wandboard.dtsi
@@ -94,8 +94,6 @@
 &iomuxc {
 	pinctrl-names = "default";
 
-	imx6qdl-wandboard {
-
 	pinctrl_audmux: audmuxgrp {
 		fsl,pins = <
 			MX6QDL_PAD_CSI0_DAT7__AUD3_RXD		0x130b0
@@ -201,7 +199,6 @@
 			MX6QDL_PAD_SD3_DAT3__SD3_DATA3		0x17059
 		>;
 	};
-	};
 };
 
 &fec {
diff --git a/arch/arm/boot/dts/imx6qp-sabreauto.dts b/arch/arm/boot/dts/imx6qp-sabreauto.dts
index 5ce3840d83d3..05490830b9eb 100644
--- a/arch/arm/boot/dts/imx6qp-sabreauto.dts
+++ b/arch/arm/boot/dts/imx6qp-sabreauto.dts
@@ -60,7 +60,6 @@
 };
 
 &iomuxc {
-	imx6qdl-sabreauto {
 	pinctrl_enet: enetgrp {
 		fsl,pins = <
 			MX6QDL_PAD_KEY_COL1__ENET_MDIO          0x1b0b0
@@ -81,7 +80,6 @@
 			MX6QDL_PAD_GPIO_6__ENET_IRQ		0x000b1
 		>;
 	};
-	};
 };
 
 &pcie {
diff --git a/arch/arm/boot/dts/imx6qp-sabresd.dts b/arch/arm/boot/dts/imx6qp-sabresd.dts
index b23458062f5e..acf4f9ac064c 100644
--- a/arch/arm/boot/dts/imx6qp-sabresd.dts
+++ b/arch/arm/boot/dts/imx6qp-sabresd.dts
@@ -55,7 +55,6 @@
 };
 
 &iomuxc {
-	imx6qdl-sabresd {
 	pinctrl_usdhc2: usdhc2grp {
 		fsl,pins = <
 			MX6QDL_PAD_SD2_CMD__SD2_CMD		0x17059
@@ -85,7 +84,6 @@
 			MX6QDL_PAD_SD3_DAT7__SD3_DATA7		0x17059
 		>;
 	};
-	};
 };
 
 &pcie {
diff --git a/arch/arm/boot/dts/imx6sl-evk.dts b/arch/arm/boot/dts/imx6sl-evk.dts
index be118820e9f7..57e5de05b28a 100644
--- a/arch/arm/boot/dts/imx6sl-evk.dts
+++ b/arch/arm/boot/dts/imx6sl-evk.dts
@@ -272,7 +272,6 @@
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_hog>;
 
-	imx6sl-evk {
 	pinctrl_hog: hoggrp {
 		fsl,pins = <
 			MX6SL_PAD_KEY_ROW7__GPIO4_IO07    0x17059
@@ -525,7 +524,6 @@
 			MX6SL_PAD_SD3_DAT3__SD3_DATA3		0x170f9
 		>;
 	};
-	};
 };
 
 &kpp {
diff --git a/arch/arm/boot/dts/imx6sl-warp.dts b/arch/arm/boot/dts/imx6sl-warp.dts
index 058bcdceb81a..3513170eea8d 100644
--- a/arch/arm/boot/dts/imx6sl-warp.dts
+++ b/arch/arm/boot/dts/imx6sl-warp.dts
@@ -124,7 +124,6 @@
 };
 
 &iomuxc {
-	imx6sl-warp {
 	pinctrl_uart1: uart1grp {
 		fsl,pins = <
 			MX6SL_PAD_UART1_RXD__UART1_RX_DATA	0x41b0b1
@@ -229,5 +228,4 @@
 			MX6SL_PAD_SD3_DAT3__SD3_DATA3		0x4170f9
 		>;
 	};
-	};
 };
diff --git a/arch/arm/boot/dts/imx6sx-sabreauto.dts b/arch/arm/boot/dts/imx6sx-sabreauto.dts
index 96ea936eeeb0..5ebd53682b3f 100644
--- a/arch/arm/boot/dts/imx6sx-sabreauto.dts
+++ b/arch/arm/boot/dts/imx6sx-sabreauto.dts
@@ -69,7 +69,6 @@
 };
 
 &iomuxc {
-	imx6x-sabreauto {
 	pinctrl_uart1: uart1grp {
 		fsl,pins = <
 			MX6SX_PAD_GPIO1_IO04__UART1_TX		0x1b0b1
@@ -142,5 +141,4 @@
 			MX6SX_PAD_KEY_COL1__GPIO2_IO_11		0x17059
 		>;
 	};
-	};
 };
diff --git a/arch/arm/boot/dts/imx6sx-sdb.dtsi b/arch/arm/boot/dts/imx6sx-sdb.dtsi
index e5eafe4d9a70..ce77e5b65217 100644
--- a/arch/arm/boot/dts/imx6sx-sdb.dtsi
+++ b/arch/arm/boot/dts/imx6sx-sdb.dtsi
@@ -323,7 +323,6 @@
 };
 
 &iomuxc {
-	imx6x-sdb {
 	pinctrl_audmux: audmuxgrp {
 		fsl,pins = <
 			MX6SX_PAD_CSI_DATA00__AUDMUX_AUD6_TXC	0x130b0
@@ -588,5 +587,4 @@
 			MX6SX_PAD_SD4_DATA6__GPIO6_IO_20	0x17059 /* WP */
 		>;
 	};
-	};
 };
diff --git a/arch/arm/boot/dts/imx7d-sdb.dts b/arch/arm/boot/dts/imx7d-sdb.dts
index b267f79e3059..b38c643ba8d2 100644
--- a/arch/arm/boot/dts/imx7d-sdb.dts
+++ b/arch/arm/boot/dts/imx7d-sdb.dts
@@ -318,7 +318,6 @@
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_hog>;
 
-	imx7d-sdb {
 	pinctrl_enet1: enet1grp {
 		fsl,pins = <
 			MX7D_PAD_GPIO1_IO10__ENET1_MDIO			0x3
@@ -511,6 +510,4 @@
 			MX7D_PAD_SD3_STROBE__SD3_STROBE		0x1b
 		>;
 	};
-
-	};
 };
diff --git a/arch/arm/boot/dts/vf-colibri-eval-v3.dtsi b/arch/arm/boot/dts/vf-colibri-eval-v3.dtsi
index a8a8e434fb27..b3160b4449b7 100644
--- a/arch/arm/boot/dts/vf-colibri-eval-v3.dtsi
+++ b/arch/arm/boot/dts/vf-colibri-eval-v3.dtsi
@@ -167,11 +167,9 @@
 };
 
 &iomuxc {
-	vf610-colibri {
 	pinctrl_can_int: can_int {
 		fsl,pins = <
 			VF610_PAD_PTB21__GPIO_43	0x22ed
 		>;
 	};
-	};
 };
diff --git a/arch/arm/boot/dts/vf-colibri.dtsi b/arch/arm/boot/dts/vf-colibri.dtsi
index b7417094dc11..7c9895e75a79 100644
--- a/arch/arm/boot/dts/vf-colibri.dtsi
+++ b/arch/arm/boot/dts/vf-colibri.dtsi
@@ -199,7 +199,6 @@
 };
 
 &iomuxc {
-	vf610-colibri {
 	pinctrl_flexcan0: can0grp {
 		fsl,pins = <
 			VF610_PAD_PTB14__CAN0_RX	0x31F1
@@ -367,5 +366,4 @@
 			VF610_PAD_PTD4__GPIO_83			0x22ed
 		>;
 	};
-	};
 };
diff --git a/arch/arm/boot/dts/vf500-colibri.dtsi b/arch/arm/boot/dts/vf500-colibri.dtsi
index 1a8a0efa19a6..22bf1a42d7b2 100644
--- a/arch/arm/boot/dts/vf500-colibri.dtsi
+++ b/arch/arm/boot/dts/vf500-colibri.dtsi
@@ -75,7 +75,6 @@
 };
 
 &iomuxc {
-	vf610-colibri {
 	pinctrl_touchctrl_idle: touchctrl_idle {
 		fsl,pins = <
 			VF610_PAD_PTA18__GPIO_8		0x006d
@@ -100,5 +99,4 @@
 			VF610_PAD_PTA11__GPIO_4		0x22e9
 			>;
 	};
-	};
 };
diff --git a/arch/arm/boot/dts/vf610-cosmic.dts b/arch/arm/boot/dts/vf610-cosmic.dts
index 5447f2594659..6248f838866d 100644
--- a/arch/arm/boot/dts/vf610-cosmic.dts
+++ b/arch/arm/boot/dts/vf610-cosmic.dts
@@ -50,7 +50,6 @@
 };
 
 &iomuxc {
-	vf610-cosmic {
 	pinctrl_esdhc1: esdhc1grp {
 		fsl,pins = <
 			VF610_PAD_PTA24__ESDHC1_CLK	0x31ef
@@ -83,7 +82,6 @@
 			VF610_PAD_PTB5__UART1_RX		0x21a1
 		>;
 	};
-	};
 };
 
 &uart1 {
diff --git a/arch/arm/boot/dts/vf610-twr.dts b/arch/arm/boot/dts/vf610-twr.dts
index cdc100732514..821b0ae367b2 100644
--- a/arch/arm/boot/dts/vf610-twr.dts
+++ b/arch/arm/boot/dts/vf610-twr.dts
@@ -209,7 +209,6 @@
 };
 
 &iomuxc {
-	vf610-twr {
 	pinctrl_adc0_ad5: adc0ad5grp {
 		fsl,pins = <
 			VF610_PAD_PTC30__ADC0_SE5		0xa1
@@ -334,7 +333,6 @@
 			VF610_PAD_PTB7__UART2_RX		0x21a1
 		>;
 	};
-	};
 };
 
 &nfc {
diff --git a/arch/arm/boot/dts/vf610m4-colibri.dts b/arch/arm/boot/dts/vf610m4-colibri.dts
index 2931a80caccb..7f55a32b4d94 100644
--- a/arch/arm/boot/dts/vf610m4-colibri.dts
+++ b/arch/arm/boot/dts/vf610m4-colibri.dts
@@ -86,7 +86,6 @@
 };
 
 &iomuxc {
-	vf610-colibri {
 	pinctrl_uart2: uart2grp {
 		fsl,pins = <
 			VF610_PAD_PTD0__UART2_TX		0x21a2
@@ -95,5 +94,4 @@
 			VF610_PAD_PTD3__UART2_CTS		0x21a1
 		>;
 	};
-	};
 };
diff --git a/arch/arm/boot/dts/vf610m4-cosmic.dts b/arch/arm/boot/dts/vf610m4-cosmic.dts
index 8944a2d2054c..ad08fe083d4b 100644
--- a/arch/arm/boot/dts/vf610m4-cosmic.dts
+++ b/arch/arm/boot/dts/vf610m4-cosmic.dts
@@ -79,12 +79,10 @@
 };
 
 &iomuxc {
-	vf610-cosmic {
 	pinctrl_uart3: uart3grp {
 		fsl,pins = <
 			VF610_PAD_PTA20__UART3_TX		0x21a2
 			VF610_PAD_PTA21__UART3_RX		0x21a1
 		>;
 	};
-	};
 };

-- 
Pengutronix e.K.                           | Uwe Kleine-K?nig            |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |

^ permalink raw reply related	[flat|nested] 6+ messages in thread

* [PATCH 0/3] ARM: dts: pinctrl-imx: some cleanups and fixes
  2016-07-05 20:19 [PATCH 0/3] ARM: dts: pinctrl-imx: some cleanups and fixes Uwe Kleine-König
                   ` (2 preceding siblings ...)
       [not found] ` <1467749993-14533-2-git-send-email-u.kleine-koenig@pengutronix.de>
@ 2016-08-09  3:09 ` Shawn Guo
  2016-08-09 21:46   ` Andreas Färber
  3 siblings, 1 reply; 6+ messages in thread
From: Shawn Guo @ 2016-08-09  3:09 UTC (permalink / raw)
  To: linux-arm-kernel

On Tue, Jul 05, 2016 at 10:19:50PM +0200, Uwe Kleine-K?nig wrote:
> Hello,
> 
> when I asked Andreas F?rber to drop the function device nodes in his
> patch that added support for the Udoo Neo boards, he rightfully said:
> "OK, will do. Adopted from imx6sx-sdb.dtsi and imx6sx-sabreauto.dts -
> please update the existing files to be like you expect new ones to be.".
> This is done in patch 1. While the short stat for this patch is
> 
> 	87 files changed, 7717 insertions(+), 7899 deletions(-)

I do not feel this is really necessary.  People should always refer to
the latest dts addition as example.

Shawn

^ permalink raw reply	[flat|nested] 6+ messages in thread

* [PATCH 0/3] ARM: dts: pinctrl-imx: some cleanups and fixes
  2016-08-09  3:09 ` [PATCH 0/3] ARM: dts: pinctrl-imx: some cleanups and fixes Shawn Guo
@ 2016-08-09 21:46   ` Andreas Färber
  0 siblings, 0 replies; 6+ messages in thread
From: Andreas Färber @ 2016-08-09 21:46 UTC (permalink / raw)
  To: linux-arm-kernel

Am 09.08.2016 um 05:09 schrieb Shawn Guo:
> On Tue, Jul 05, 2016 at 10:19:50PM +0200, Uwe Kleine-K?nig wrote:
>> Hello,
>>
>> when I asked Andreas F?rber to drop the function device nodes in his
>> patch that added support for the Udoo Neo boards, he rightfully said:
>> "OK, will do. Adopted from imx6sx-sdb.dtsi and imx6sx-sabreauto.dts -
>> please update the existing files to be like you expect new ones to be.".
>> This is done in patch 1. While the short stat for this patch is
>>
>> 	87 files changed, 7717 insertions(+), 7899 deletions(-)
> 
> I do not feel this is really necessary.  People should always refer to
> the latest dts addition as example.

The problem is that it's not obvious what "the latest dts addition" is.
When I add an i.MX6 SoloX I compared other sx files but not all imx or
random other .dts files.

Sorry for not testing this earlier, Uwe, I did receive the full patch.

Regards,
Andreas

-- 
SUSE Linux GmbH, Maxfeldstr. 5, 90409 N?rnberg, Germany
GF: Felix Imend?rffer, Jane Smithard, Graham Norton
HRB 21284 (AG N?rnberg)

^ permalink raw reply	[flat|nested] 6+ messages in thread

end of thread, other threads:[~2016-08-09 21:46 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2016-07-05 20:19 [PATCH 0/3] ARM: dts: pinctrl-imx: some cleanups and fixes Uwe Kleine-König
2016-07-05 20:19 ` [PATCH 2/3] ARM: dts: imx25: don't configure reserved pad settings Uwe Kleine-König
2016-07-05 20:19 ` [PATCH 3/3] ARM: dts: imx25: substitute NO_PAD_CTL by the respective reset value Uwe Kleine-König
     [not found] ` <1467749993-14533-2-git-send-email-u.kleine-koenig@pengutronix.de>
2016-07-05 20:30   ` [PATCH 1/3] ARM: dts: drop function device nodes for pinctrl-imx nodes Uwe Kleine-König
2016-08-09  3:09 ` [PATCH 0/3] ARM: dts: pinctrl-imx: some cleanups and fixes Shawn Guo
2016-08-09 21:46   ` Andreas Färber

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