From: will.deacon@arm.com (Will Deacon)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH] drivers/perf: arm-pmu: Handle per-interrupt affinity mask
Date: Wed, 6 Jul 2016 11:39:52 +0100 [thread overview]
Message-ID: <20160706103951.GC17925@arm.com> (raw)
In-Reply-To: <1467379291-18413-1-git-send-email-marc.zyngier@arm.com>
On Fri, Jul 01, 2016 at 02:21:31PM +0100, Marc Zyngier wrote:
> On a big-little system, PMUs can be wired to CPUs using per CPU
> interrups (PPI). In this case, it is important to make sure that
> the enable/disable do happen on the right set of CPUs.
>
> So instead of relying on the interrupt-affinity property, we can
> use the actual percpu affinity that DT exposes as part of the
> interrupt specifier. The DT binding is also updated to reflect
> the fact that the interrupt-affinity property shouldn't be used
> in that case.
[...]
> - /* If we didn't manage to parse anything, claim to support all CPUs */
> - if (cpumask_weight(&pmu->supported_cpus) == 0)
> - cpumask_setall(&pmu->supported_cpus);
> + /* If we didn't manage to parse anything, try the interrupt affinity */
> + if (cpumask_weight(&pmu->supported_cpus) == 0) {
> + if (!using_spi) {
> + /* If using PPIs, check the affinity of the partition */
> + int irq = platform_get_irq(pdev, 0);
> + irq_get_percpu_devid_partition(irq,
> + &pmu->supported_cpus);
Should we not at least propagate the failure if this returns -EINVAL?
Will
next prev parent reply other threads:[~2016-07-06 10:39 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-07-01 13:21 [PATCH] drivers/perf: arm-pmu: Handle per-interrupt affinity mask Marc Zyngier
2016-07-01 15:00 ` Caesar Wang
2016-07-05 14:23 ` Rob Herring
2016-07-06 10:39 ` Will Deacon [this message]
2016-07-06 14:11 ` Marc Zyngier
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