From: will.deacon@arm.com (Will Deacon)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2] drivers/perf: arm-pmu: Handle per-interrupt affinity mask
Date: Mon, 11 Jul 2016 15:47:06 +0100 [thread overview]
Message-ID: <20160711144706.GA27013@arm.com> (raw)
In-Reply-To: <20160711143716.GA9267@rob-hp-laptop>
On Mon, Jul 11, 2016 at 09:37:16AM -0500, Rob Herring wrote:
> On Wed, Jul 06, 2016 at 03:33:47PM +0100, Marc Zyngier wrote:
> > On a big-little system, PMUs can be wired to CPUs using per CPU
> > interrups (PPI). In this case, it is important to make sure that
> > the enable/disable do happen on the right set of CPUs.
> >
> > So instead of relying on the interrupt-affinity property, we can
> > use the actual percpu affinity that DT exposes as part of the
> > interrupt specifier. The DT binding is also updated to reflect
> > the fact that the interrupt-affinity property shouldn't be used
> > in that case.
> >
> > Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
> > ---
> > * From v1:
> > - propagate the error if irq_get_percpu_devid_partition fails
> >
> > Documentation/devicetree/bindings/arm/pmu.txt | 4 +++-
>
> I acked v1, please add acks.
This is queued in arm64/for-next/core, but I spotted your Ack and added
it when I sent the patch to Catalin.
Will
next prev parent reply other threads:[~2016-07-11 14:47 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-07-06 14:33 [PATCH v2] drivers/perf: arm-pmu: Handle per-interrupt affinity mask Marc Zyngier
2016-07-06 16:05 ` Will Deacon
2016-07-11 14:37 ` Rob Herring
2016-07-11 14:47 ` Will Deacon [this message]
2016-07-19 13:25 ` Geert Uytterhoeven
2016-07-19 13:46 ` Marc Zyngier
2016-07-19 14:24 ` Geert Uytterhoeven
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