[PATCH v2 1/2] coresight-etm3x: Add ARM ETM 3.5 Cortex-A5 peripheral ID

[PATCH v2 1/2] coresight-etm3x: Add ARM ETM 3.5 Cortex-A5 peripheral ID

[Olivier Schonken]

Signed-off-by: Olivier Schonken <olivier.schonken@gmail.com>
---
 drivers/hwtracing/coresight/coresight-etm3x.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/drivers/hwtracing/coresight/coresight-etm3x.c b/drivers/hwtracing/coresight/coresight-etm3x.c
index d83ab82..0f5d400 100644
--- a/drivers/hwtracing/coresight/coresight-etm3x.c
+++ b/drivers/hwtracing/coresight/coresight-etm3x.c
@@ -885,6 +885,11 @@ static struct amba_id etm_ids[] = {
 		.mask	= 0x0003ffff,
 		.data	= "ETM 3.3",
 	},
+	{	/* ETM 3.5 - Cortex-A5 */
+		.id	= 0x0003b955,
+		.mask	= 0x0003ffff,
+		.data	= "ETM 3.5",
+	},
 	{	/* ETM 3.5 */
 		.id	= 0x0003b956,
 		.mask	= 0x0003ffff,
-- 
1.9.1

[PATCH v2 2/2] ARM: dts: at91: sama5d2: add ETM and ETB nodes

[Olivier Schonken]

Add node to support SAMA5D2 Embedded Trace Macrocell and Embedded
Trace Buffer.

This patch depends on coresight-etm3x: Add ARM ETM-A5 peripheral ID
for proper coresight functionality.
It also depends on clocksource: timer-atmel-pit: enable mck to not
stall SAMA5D2 on bootup.

Signed-off-by: Olivier Schonken <olivier.schonken@gmail.com>
---
 arch/arm/boot/dts/sama5d2.dtsi | 29 +++++++++++++++++++++++++++++
 1 file changed, 29 insertions(+)

diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi
index 5d63206..bde24ab 100644
--- a/arch/arm/boot/dts/sama5d2.dtsi
+++ b/arch/arm/boot/dts/sama5d2.dtsi
@@ -77,6 +77,35 @@
 		interrupts = <2 IRQ_TYPE_LEVEL_HIGH 0>;
 	};
 
+	etb {
+		compatible = "arm,coresight-etb10", "arm,primecell";
+		reg = <0x740000 0x1000>;
+
+		clocks = <&mck>;
+		clock-names = "apb_pclk";
+
+		port {
+			etb_in: endpoint {
+				slave-mode;
+				remote-endpoint = <&etm_out>;
+			};
+		};
+	};
+
+	etm {
+		compatible = "arm,coresight-etm3x", "arm,primecell";
+		reg = <0x73C000 0x1000>;
+
+		clocks = <&mck>;
+		clock-names = "apb_pclk";
+
+		port {
+			etm_out: endpoint {
+				remote-endpoint = <&etb_in>;
+			};
+		};
+	};
+
 	memory {
 		reg = <0x20000000 0x20000000>;
 	};
-- 
1.9.1

[PATCH v2 2/2] ARM: dts: at91: sama5d2: add ETM and ETB nodes

[Mathieu Poirier]

On 5 July 2016 at 02:05, Olivier Schonken <olivier.schonken@gmail.com> wrote:
> Add node to support SAMA5D2 Embedded Trace Macrocell and Embedded
> Trace Buffer.
>
> This patch depends on coresight-etm3x: Add ARM ETM-A5 peripheral ID
> for proper coresight functionality.
> It also depends on clocksource: timer-atmel-pit: enable mck to not
> stall SAMA5D2 on bootup.
>
> Signed-off-by: Olivier Schonken <olivier.schonken@gmail.com>
> ---
>  arch/arm/boot/dts/sama5d2.dtsi | 29 +++++++++++++++++++++++++++++
>  1 file changed, 29 insertions(+)
>
> diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi
> index 5d63206..bde24ab 100644
> --- a/arch/arm/boot/dts/sama5d2.dtsi
> +++ b/arch/arm/boot/dts/sama5d2.dtsi
> @@ -77,6 +77,35 @@
>                 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 0>;
>         };
>
> +       etb {
> +               compatible = "arm,coresight-etb10", "arm,primecell";
> +               reg = <0x740000 0x1000>;
> +
> +               clocks = <&mck>;
> +               clock-names = "apb_pclk";
> +
> +               port {
> +                       etb_in: endpoint {
> +                               slave-mode;
> +                               remote-endpoint = <&etm_out>;
> +                       };
> +               };
> +       };
> +
> +       etm {
> +               compatible = "arm,coresight-etm3x", "arm,primecell";
> +               reg = <0x73C000 0x1000>;
> +
> +               clocks = <&mck>;
> +               clock-names = "apb_pclk";
> +
> +               port {
> +                       etm_out: endpoint {
> +                               remote-endpoint = <&etb_in>;
> +                       };
> +               };
> +       };
> +
>         memory {
>                 reg = <0x20000000 0x20000000>;
>         };
> --
> 1.9.1
>

Acked-by: Mathieu Poirier <mathieu.poirier@linaro.org>

[PATCH v2 2/2] ARM: dts: at91: sama5d2: add ETM and ETB nodes

[Olivier Schonken]

Hi All

Just wondering if there are still some issues regarding the sama5d2
ETM and ETB nodes patch that I have to change/update.
If I should resend at a better time for it to not get lost in the
noise just let me know.

I see that I accidentily left Boris out in the initial resend of the
patch.  My apologies.  Will forward the initial send to him as well.

Regards

Olivier Schonken

On 5 July 2016 at 18:16, Mathieu Poirier <mathieu.poirier@linaro.org> wrote:
> On 5 July 2016 at 02:05, Olivier Schonken <olivier.schonken@gmail.com> wrote:
>> Add node to support SAMA5D2 Embedded Trace Macrocell and Embedded
>> Trace Buffer.
>>
>> This patch depends on coresight-etm3x: Add ARM ETM-A5 peripheral ID
>> for proper coresight functionality.
>> It also depends on clocksource: timer-atmel-pit: enable mck to not
>> stall SAMA5D2 on bootup.
>>
>> Signed-off-by: Olivier Schonken <olivier.schonken@gmail.com>
>> ---
>>  arch/arm/boot/dts/sama5d2.dtsi | 29 +++++++++++++++++++++++++++++
>>  1 file changed, 29 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi
>> index 5d63206..bde24ab 100644
>> --- a/arch/arm/boot/dts/sama5d2.dtsi
>> +++ b/arch/arm/boot/dts/sama5d2.dtsi
>> @@ -77,6 +77,35 @@
>>                 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 0>;
>>         };
>>
>> +       etb {
>> +               compatible = "arm,coresight-etb10", "arm,primecell";
>> +               reg = <0x740000 0x1000>;
>> +
>> +               clocks = <&mck>;
>> +               clock-names = "apb_pclk";
>> +
>> +               port {
>> +                       etb_in: endpoint {
>> +                               slave-mode;
>> +                               remote-endpoint = <&etm_out>;
>> +                       };
>> +               };
>> +       };
>> +
>> +       etm {
>> +               compatible = "arm,coresight-etm3x", "arm,primecell";
>> +               reg = <0x73C000 0x1000>;
>> +
>> +               clocks = <&mck>;
>> +               clock-names = "apb_pclk";
>> +
>> +               port {
>> +                       etm_out: endpoint {
>> +                               remote-endpoint = <&etb_in>;
>> +                       };
>> +               };
>> +       };
>> +
>>         memory {
>>                 reg = <0x20000000 0x20000000>;
>>         };
>> --
>> 1.9.1
>>
>
> Acked-by: Mathieu Poirier <mathieu.poirier@linaro.org>

[PATCH v2 2/2] ARM: dts: at91: sama5d2: add ETM and ETB nodes

[Alexandre Belloni]

On 20/07/2016 at 10:17:09 +0200, Olivier Schonken wrote :
> Hi All
> 
> Just wondering if there are still some issues regarding the sama5d2
> ETM and ETB nodes patch that I have to change/update.
> If I should resend at a better time for it to not get lost in the
> noise just let me know.
> 

No action is needed on your side. This patch is still on my todo list
and I'm planning to merge it for 4.9.

At first it was a bit late for 4.8 and finally, I forgot to take it
inside my last DT pull request. It is my mistake, sorry about that.

-- 
Alexandre Belloni, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

[PATCH v2 2/2] ARM: dts: at91: sama5d2: add ETM and ETB nodes

[Boris Brezillon]

On Tue,  5 Jul 2016 10:05:50 +0200
Olivier Schonken <olivier.schonken@gmail.com> wrote:

> Add node to support SAMA5D2 Embedded Trace Macrocell and Embedded
> Trace Buffer.
> 
> This patch depends on coresight-etm3x: Add ARM ETM-A5 peripheral ID
> for proper coresight functionality.
> It also depends on clocksource: timer-atmel-pit: enable mck to not
> stall SAMA5D2 on bootup.
> 
> Signed-off-by: Olivier Schonken <olivier.schonken@gmail.com>

Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>

> ---
>  arch/arm/boot/dts/sama5d2.dtsi | 29 +++++++++++++++++++++++++++++
>  1 file changed, 29 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi
> index 5d63206..bde24ab 100644
> --- a/arch/arm/boot/dts/sama5d2.dtsi
> +++ b/arch/arm/boot/dts/sama5d2.dtsi
> @@ -77,6 +77,35 @@
>  		interrupts = <2 IRQ_TYPE_LEVEL_HIGH 0>;
>  	};
>  
> +	etb {
> +		compatible = "arm,coresight-etb10", "arm,primecell";
> +		reg = <0x740000 0x1000>;
> +
> +		clocks = <&mck>;
> +		clock-names = "apb_pclk";
> +
> +		port {
> +			etb_in: endpoint {
> +				slave-mode;
> +				remote-endpoint = <&etm_out>;
> +			};
> +		};
> +	};
> +
> +	etm {
> +		compatible = "arm,coresight-etm3x", "arm,primecell";
> +		reg = <0x73C000 0x1000>;
> +
> +		clocks = <&mck>;
> +		clock-names = "apb_pclk";
> +
> +		port {
> +			etm_out: endpoint {
> +				remote-endpoint = <&etb_in>;
> +			};
> +		};
> +	};
> +
>  	memory {
>  		reg = <0x20000000 0x20000000>;
>  	};

[PATCH v2 2/2] ARM: dts: at91: sama5d2: add ETM and ETB nodes

[Alexandre Belloni]

On 05/07/2016 at 10:05:50 +0200, Olivier Schonken wrote :
> Add node to support SAMA5D2 Embedded Trace Macrocell and Embedded
> Trace Buffer.
> 
> This patch depends on coresight-etm3x: Add ARM ETM-A5 peripheral ID
> for proper coresight functionality.
> It also depends on clocksource: timer-atmel-pit: enable mck to not
> stall SAMA5D2 on bootup.
> 
> Signed-off-by: Olivier Schonken <olivier.schonken@gmail.com>
> ---
>  arch/arm/boot/dts/sama5d2.dtsi | 29 +++++++++++++++++++++++++++++
>  1 file changed, 29 insertions(+)
> 
Applied, thanks.

-- 
Alexandre Belloni, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

[PATCH v2 1/2] coresight-etm3x: Add ARM ETM 3.5 Cortex-A5 peripheral ID

[Mathieu Poirier]

On 5 July 2016 at 02:05, Olivier Schonken <olivier.schonken@gmail.com> wrote:
> Signed-off-by: Olivier Schonken <olivier.schonken@gmail.com>
> ---
>  drivers/hwtracing/coresight/coresight-etm3x.c | 5 +++++
>  1 file changed, 5 insertions(+)
>
> diff --git a/drivers/hwtracing/coresight/coresight-etm3x.c b/drivers/hwtracing/coresight/coresight-etm3x.c
> index d83ab82..0f5d400 100644
> --- a/drivers/hwtracing/coresight/coresight-etm3x.c
> +++ b/drivers/hwtracing/coresight/coresight-etm3x.c
> @@ -885,6 +885,11 @@ static struct amba_id etm_ids[] = {
>                 .mask   = 0x0003ffff,
>                 .data   = "ETM 3.3",
>         },
> +       {       /* ETM 3.5 - Cortex-A5 */
> +               .id     = 0x0003b955,
> +               .mask   = 0x0003ffff,
> +               .data   = "ETM 3.5",
> +       },
>         {       /* ETM 3.5 */
>                 .id     = 0x0003b956,
>                 .mask   = 0x0003ffff,
> --
> 1.9.1
>

Applied - thanks.
Mathieu