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From: maxime.ripard@free-electrons.com (Maxime Ripard)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 1/6] clk: sunxi-ng: div: Add mux table macros
Date: Thu,  1 Sep 2016 16:16:12 +0200	[thread overview]
Message-ID: <20160901141617.9777-2-maxime.ripard@free-electrons.com> (raw)
In-Reply-To: <20160901141617.9777-1-maxime.ripard@free-electrons.com>

Add some macros to ease the declaration of clocks that are using them.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
 drivers/clk/sunxi-ng/ccu_div.h | 28 +++++++++++++++++++++-------
 1 file changed, 21 insertions(+), 7 deletions(-)

diff --git a/drivers/clk/sunxi-ng/ccu_div.h b/drivers/clk/sunxi-ng/ccu_div.h
index 5d98549e23a6..a5c9eaf90e84 100644
--- a/drivers/clk/sunxi-ng/ccu_div.h
+++ b/drivers/clk/sunxi-ng/ccu_div.h
@@ -77,13 +77,16 @@ struct ccu_div {
 				      _shift, _width, _table, 0,	\
 				      _flags)
 
-#define SUNXI_CCU_M_WITH_MUX_GATE(_struct, _name, _parents, _reg,	\
-				  _mshift, _mwidth, _muxshift, _muxwidth, \
-				  _gate, _flags)			\
+#define SUNXI_CCU_M_WITH_MUX_TABLE_GATE(_struct, _name,			\
+					_parents, _table,		\
+					_reg,				\
+					_mshift, _mwidth,		\
+					_muxshift, _muxwidth,		\
+					_gate, _flags)			\
 	struct ccu_div _struct = {					\
 		.enable	= _gate,					\
 		.div	= _SUNXI_CCU_DIV(_mshift, _mwidth),		\
-		.mux	= _SUNXI_CCU_MUX(_muxshift, _muxwidth),		\
+		.mux	= _SUNXI_CCU_MUX_TABLE(_muxshift, _muxwidth, _table), \
 		.common	= {						\
 			.reg		= _reg,				\
 			.hw.init	= CLK_HW_INIT_PARENTS(_name,	\
@@ -93,12 +96,23 @@ struct ccu_div {
 		},							\
 	}
 
+#define SUNXI_CCU_M_WITH_MUX_GATE(_struct, _name, _parents, _reg,	\
+				  _mshift, _mwidth, _muxshift, _muxwidth, \
+				  _gate, _flags)			\
+	SUNXI_CCU_M_WITH_MUX_TABLE_GATE(_struct, _name,			\
+					_parents, NULL,			\
+					_reg, _mshift, _mwidth,		\
+					_muxshift, _muxwidth,		\
+					_gate, _flags)
+
 #define SUNXI_CCU_M_WITH_MUX(_struct, _name, _parents, _reg,		\
 			     _mshift, _mwidth, _muxshift, _muxwidth,	\
 			     _flags)					\
-	SUNXI_CCU_M_WITH_MUX_GATE(_struct, _name, _parents, _reg,	\
-				  _mshift, _mwidth, _muxshift, _muxwidth, \
-				  0, _flags)
+	SUNXI_CCU_M_WITH_MUX_TABLE_GATE(_struct, _name,			\
+					_parents, NULL,			\
+					_reg, _mshift, _mwidth,		\
+					_muxshift, _muxwidth,		\
+					0, _flags)
 
 
 #define SUNXI_CCU_M_WITH_GATE(_struct, _name, _parent, _reg,		\
-- 
2.9.2

  reply	other threads:[~2016-09-01 14:16 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-09-01 14:16 [PATCH 0/6] clk: sunxi-ng: Introduce support for A23 and A33 CCUs Maxime Ripard
2016-09-01 14:16 ` Maxime Ripard [this message]
2016-09-02  7:25   ` [PATCH 1/6] clk: sunxi-ng: div: Add mux table macros Chen-Yu Tsai
2016-09-01 14:16 ` [PATCH 2/6] clk: sunxi-ng: mux: Add mux table macro Maxime Ripard
2016-09-02  7:26   ` Chen-Yu Tsai
2016-09-01 14:16 ` [PATCH 3/6] clk: sunxi-ng: Add N-class clocks support Maxime Ripard
2016-09-05  3:31   ` Chen-Yu Tsai
2016-09-01 14:16 ` [PATCH 4/6] clk: sunxi-ng: Add A33 CCU support Maxime Ripard
2016-09-05  6:34   ` Chen-Yu Tsai
2016-09-05  9:51     ` Maxime Ripard
2016-09-05 10:26       ` Chen-Yu Tsai
2016-09-01 14:16 ` [PATCH 5/6] clk: sunxi-ng: Add A23 CCU Maxime Ripard
2016-09-01 14:16 ` [PATCH 6/6] ARM: sun8i: Convert the A23 and A33 to the CCU Maxime Ripard

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