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From: mark.rutland@arm.com (Mark Rutland)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v3 0/7] arm64: Privileged Access Never using TTBR0_EL1 switching
Date: Wed, 14 Sep 2016 11:36:46 +0100	[thread overview]
Message-ID: <20160914103632.GD14330@leverpostej> (raw)
In-Reply-To: <CAKv+Gu_ww5+_vcKfnFsUgG6h1v87-CWhLp_o7qHS6=3nd6-cow@mail.gmail.com>

On Wed, Sep 14, 2016 at 11:30:05AM +0100, Ard Biesheuvel wrote:
> On 14 September 2016 at 11:27, Mark Rutland <mark.rutland@arm.com> wrote:
> > On Wed, Sep 14, 2016 at 11:13:33AM +0100, Ard Biesheuvel wrote:
> >> On 13 September 2016 at 18:46, Catalin Marinas <catalin.marinas@arm.com> wrote:
> >> > This is the third version of the arm64 PAN emulation using TTBR0_EL1
> >> > switching.
> >
> >> Given that every __get_user() call now incurs the PAN switch overhead,
> >> I wonder if it would be worth it to stash the real TTBR0_EL1 value in,
> >> e.g., TPIDRRO_EL0 rather than load it from memory each time. We'd have
> >> to reload the real value of TPIDRRO_EL0 at kernel exit every time, but
> >> only for compat tasks, and not nearly as often, obviously.
> >
> > FWIW, my plan for vmap'd stacks involves clobbering TPIDRRO_EL0 early
> > upon kernel entry to reliably detect/handle stack overflow (as we need
> > to free up GPR to detect overflow, and we need to detect that before we
> > try to store to the stack).
> >
> > For non-compat tasks we must restore zero, so either way we'll end up
> > with a load (to determine compat-ness or to load the precise value).
> 
> Are you saying that with vmapped stacks, we'll end up clobbering it
> (and thus restoring it) anyway when entering the kernel, and so we
> could use it for free afterwards while running in the kernel,
> potentially for the real value of TTBR0_EL1?

Yes, assuming that we end up following my current plan for how to
implement that.

Thanks,
Mark.

  reply	other threads:[~2016-09-14 10:36 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-09-13 17:46 [PATCH v3 0/7] arm64: Privileged Access Never using TTBR0_EL1 switching Catalin Marinas
2016-09-13 17:46 ` [PATCH v3 1/7] arm64: Factor out PAN enabling/disabling into separate uaccess_* macros Catalin Marinas
2016-09-15 15:10   ` Mark Rutland
2016-09-13 17:46 ` [PATCH v3 2/7] arm64: Factor out TTBR0_EL1 post-update workaround into a specific asm macro Catalin Marinas
2016-09-15 15:19   ` Mark Rutland
2016-09-13 17:46 ` [PATCH v3 3/7] arm64: Introduce uaccess_{disable, enable} functionality based on TTBR0_EL1 Catalin Marinas
2016-09-13 20:45   ` [PATCH v3 3/7] arm64: Introduce uaccess_{disable,enable} " Kees Cook
2016-09-14  8:52     ` Mark Rutland
2016-09-14 16:27       ` [kernel-hardening] " Kees Cook
2016-09-13 17:46 ` [PATCH v3 4/7] arm64: Disable TTBR0_EL1 during normal kernel execution Catalin Marinas
2016-09-14 16:45   ` Will Deacon
2016-09-13 17:46 ` [PATCH v3 5/7] arm64: Handle faults caused by inadvertent user access with PAN enabled Catalin Marinas
2016-09-16 11:33   ` Mark Rutland
2016-09-16 15:55     ` Catalin Marinas
2016-09-13 17:46 ` [PATCH v3 6/7] arm64: xen: Enable user access before a privcmd hvc call Catalin Marinas
2016-09-13 17:46 ` [PATCH v3 7/7] arm64: Enable CONFIG_ARM64_SW_TTBR0_PAN Catalin Marinas
2016-09-14 10:13 ` [PATCH v3 0/7] arm64: Privileged Access Never using TTBR0_EL1 switching Ard Biesheuvel
2016-09-14 10:27   ` Mark Rutland
2016-09-14 10:30     ` Ard Biesheuvel
2016-09-14 10:36       ` Mark Rutland [this message]
2016-09-14 10:48         ` Mark Rutland
2016-09-14 20:54 ` [kernel-hardening] " David Brown
2016-09-15  9:52   ` Catalin Marinas
2016-09-15 16:20 ` Mark Rutland
2016-09-15 16:41   ` Mark Rutland
2016-09-29 22:44   ` [kernel-hardening] " Sami Tolvanen
2016-09-30 18:42     ` Kees Cook
2016-10-27 14:54       ` Catalin Marinas
2016-10-27 21:23         ` Kees Cook
2016-10-14 21:44 ` Kees Cook
2016-10-15 14:35   ` Catalin Marinas
2016-10-16  2:04     ` Kees Cook

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