From: atull@opensource.altera.com (Alan Tull)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v19 03/12] add bindings document for altera freeze bridge
Date: Wed, 28 Sep 2016 13:21:51 -0500 [thread overview]
Message-ID: <20160928182200.15800-4-atull@opensource.altera.com> (raw)
In-Reply-To: <20160928182200.15800-1-atull@opensource.altera.com>
Add bindings document for the Altera Freeze Bridge. A Freeze
Bridge is used to gate traffic to/from a region of a FPGA
such that that region can be reprogrammed. The Freeze Bridge
exist in FPGA fabric that is not currently being reconfigured.
Signed-off-by: Alan Tull <atull@opensource.altera.com>
Signed-off-by: Matthew Gerlach <mgerlach@opensource.altera.com>
---
v19: Added in v19 of patchset, uses fpga image info struct
---
.../bindings/fpga/altera-freeze-bridge.txt | 23 ++++++++++++++++++++++
1 file changed, 23 insertions(+)
create mode 100644 Documentation/devicetree/bindings/fpga/altera-freeze-bridge.txt
diff --git a/Documentation/devicetree/bindings/fpga/altera-freeze-bridge.txt b/Documentation/devicetree/bindings/fpga/altera-freeze-bridge.txt
new file mode 100644
index 0000000..97ecc11
--- /dev/null
+++ b/Documentation/devicetree/bindings/fpga/altera-freeze-bridge.txt
@@ -0,0 +1,23 @@
+Altera Freeze Bridge Controller Driver
+
+The Altera Freeze Bridge Controller manages one or more freeze bridges.
+The controller can freeze/disable the bridges which prevents signal
+changes from passing through the bridge. The controller can also
+unfreeze/enable the bridges which allows traffic to pass through the
+bridge normally.
+
+Required properties:
+- compatible : Should contain "altr,freeze-bridge-controller"
+- regs : base address and size for freeze bridge module
+
+Optional properties:
+- bridge-enable : 0 if driver should disable bridge at startup
+ 1 if driver should enable bridge at startup
+ Default is to leave bridge in current state.
+
+Example:
+ freeze_controller at 100000450 {
+ compatible = "altr,freeze-bridge-controller";
+ regs = <0x1000 0x10>;
+ bridge-enable = <0>;
+ };
--
2.9.3
next prev parent reply other threads:[~2016-09-28 18:21 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-09-28 18:21 [PATCH v19 00/12] Device Tree support for FPGA Programming Alan Tull
2016-09-28 18:21 ` [PATCH v19 01/12] fpga: add bindings document for fpga region Alan Tull
2016-10-08 20:49 ` Rob Herring
2016-10-11 19:31 ` atull
2016-09-28 18:21 ` [PATCH v19 02/12] doc: fpga-mgr: add fpga image info to api Alan Tull
2016-09-28 18:21 ` Alan Tull [this message]
2016-10-08 20:49 ` [PATCH v19 03/12] add bindings document for altera freeze bridge Rob Herring
2016-10-10 18:45 ` atull
2016-09-28 18:21 ` [PATCH v19 04/12] add sysfs document for fpga bridge class Alan Tull
2016-09-29 21:54 ` Moritz Fischer
2016-09-28 18:21 ` [PATCH v19 05/12] fpga-mgr: add fpga image information struct Alan Tull
2016-09-28 23:41 ` Moritz Fischer
2016-09-29 4:34 ` Alan Tull
2016-09-29 17:43 ` Michal Simek
2016-09-28 18:21 ` [PATCH v19 06/12] fpga: add fpga image information struct for socfpga support Alan Tull
2016-09-28 18:21 ` [PATCH v19 07/12] fpga: add fpga image information struct for zynq support Alan Tull
2016-09-28 18:21 ` [PATCH v19 08/12] fpga: add fpga bridge framework Alan Tull
2016-09-28 18:21 ` [PATCH v19 09/12] fpga: fpga-region: device tree control for FPGA Alan Tull
2016-09-28 18:21 ` [PATCH v19 10/12] ARM: socfpga: fpga bridge driver support Alan Tull
2016-09-28 18:21 ` [PATCH v19 11/12] fpga: add altera freeze bridge support Alan Tull
2016-09-28 18:22 ` [PATCH v19 12/12] fpga-manager: Add Socfpga Arria10 support Alan Tull
2016-09-29 16:49 ` Moritz Fischer
2016-09-29 21:35 ` atull
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