From: robh@kernel.org (Rob Herring)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 2/6] arm: dts: ls1021a: update MSI node
Date: Sun, 30 Oct 2016 21:42:32 -0500 [thread overview]
Message-ID: <20161031024232.wqvfrcinrp2aqgxu@rob-hp-laptop> (raw)
In-Reply-To: <1477398945-22774-2-git-send-email-Minghuan.Lian@nxp.com>
On Tue, Oct 25, 2016 at 08:35:41PM +0800, Minghuan Lian wrote:
> 1. Change compatible to "fsl,ls-scfg-msi"
That is obvious from the diff. Write your commit message to answer the
question Why?
This also breaks compatibility with old DTBs.
> 2. Move two MSI dts node into the parent node "msi-controller".
> So a PCIe device can request the MSI from the two MSI controllers.
>
> Signed-off-by: Minghuan Lian <Minghuan.Lian@nxp.com>
> ---
> arch/arm/boot/dts/ls1021a.dtsi | 28 ++++++++++++++++------------
> 1 file changed, 16 insertions(+), 12 deletions(-)
>
> diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi
> index 368e219..7a3b510 100644
> --- a/arch/arm/boot/dts/ls1021a.dtsi
> +++ b/arch/arm/boot/dts/ls1021a.dtsi
> @@ -119,18 +119,22 @@
>
> };
>
> - msi1: msi-controller at 1570e00 {
> - compatible = "fsl,1s1021a-msi";
> - reg = <0x0 0x1570e00 0x0 0x8>;
> + msi: msi-controller {
> + compatible = "fsl,ls-scfg-msi";
> + #address-cells = <2>;
> + #size-cells = <2>;
> + ranges;
> msi-controller;
> - interrupts = <GIC_SPI 179 IRQ_TYPE_LEVEL_HIGH>;
> - };
>
> - msi2: msi-controller at 1570e08 {
> - compatible = "fsl,1s1021a-msi";
> - reg = <0x0 0x1570e08 0x0 0x8>;
> - msi-controller;
> - interrupts = <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>;
> + msi0 at 1570e00 {
> + reg = <0x0 0x1570e00 0x0 0x8>;
> + interrupts = <GIC_SPI 179 IRQ_TYPE_LEVEL_HIGH>;
> + };
> +
> + msi1 at 1570e08 {
> + reg = <0x0 0x1570e08 0x0 0x8>;
> + interrupts = <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>;
> + };
> };
>
> ifc: ifc at 1530000 {
> @@ -643,7 +647,7 @@
> bus-range = <0x0 0xff>;
> ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000 /* downstream I/O */
> 0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
> - msi-parent = <&msi1>;
> + msi-parent = <&msi>;
> #interrupt-cells = <1>;
> interrupt-map-mask = <0 0 0 7>;
> interrupt-map = <0000 0 0 1 &gic GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>,
> @@ -666,7 +670,7 @@
> bus-range = <0x0 0xff>;
> ranges = <0x81000000 0x0 0x00000000 0x48 0x00010000 0x0 0x00010000 /* downstream I/O */
> 0x82000000 0x0 0x40000000 0x48 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
> - msi-parent = <&msi2>;
> + msi-parent = <&msi>;
> #interrupt-cells = <1>;
> interrupt-map-mask = <0 0 0 7>;
> interrupt-map = <0000 0 0 1 &gic GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>,
> --
> 1.9.1
>
next prev parent reply other threads:[~2016-10-31 2:42 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-10-25 12:35 [PATCH 1/6] dt/bindings: adjust bindings for Layerscape SCFG MSI Minghuan Lian
2016-10-25 12:35 ` [PATCH 2/6] arm: dts: ls1021a: update MSI node Minghuan Lian
2016-10-31 2:42 ` Rob Herring [this message]
2016-10-25 12:35 ` [PATCH 3/6] arm64: dts: ls1043a: update MSI and PCIe node Minghuan Lian
2016-10-26 10:33 ` Mark Rutland
2016-10-25 12:35 ` [PATCH 4/6] arm64: dts: ls1046a: add MSI dts node Minghuan Lian
2016-10-25 12:35 ` [PATCH 5/6] arm64: dts: ls1043a: update gic " Minghuan Lian
2016-10-26 10:35 ` Mark Rutland
2016-10-25 12:35 ` [PATCH 6/6] arm64: dts: ls1046a: add PCIe " Minghuan Lian
2016-10-25 13:01 ` [PATCH 1/6] dt/bindings: adjust bindings for Layerscape SCFG MSI Robin Murphy
2016-10-26 6:55 ` M.H. Lian
2016-10-26 10:22 ` Mark Rutland
2016-10-26 10:31 ` Mark Rutland
2016-10-26 22:09 ` Leo Li
2016-10-27 14:18 ` Mark Rutland
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