From: andre.przywara@arm.com (Andre Przywara)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v8 07/16] update public Linux headers for GICv3 ITS emulation
Date: Fri, 4 Nov 2016 17:31:54 +0000 [thread overview]
Message-ID: <20161104173203.21168-8-andre.przywara@arm.com> (raw)
In-Reply-To: <20161104173203.21168-1-andre.przywara@arm.com>
The GICv3 ITS emulation brings some additions to the headers, so
lets update kvmtool's version of the headers to Linux' v4.8-rc2.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
arm/aarch32/include/asm/kvm.h | 4 ++--
arm/aarch64/include/asm/kvm.h | 2 ++
include/linux/kvm.h | 19 +++++++++++++++++--
x86/include/asm/kvm.h | 6 +++---
4 files changed, 24 insertions(+), 7 deletions(-)
diff --git a/arm/aarch32/include/asm/kvm.h b/arm/aarch32/include/asm/kvm.h
index df3f60c..a2b3eb3 100644
--- a/arm/aarch32/include/asm/kvm.h
+++ b/arm/aarch32/include/asm/kvm.h
@@ -139,8 +139,8 @@ struct kvm_arch_memory_slot {
#define ARM_CP15_REG64(...) __ARM_CP15_REG64(__VA_ARGS__)
#define KVM_REG_ARM_TIMER_CTL ARM_CP15_REG32(0, 14, 3, 1)
-#define KVM_REG_ARM_TIMER_CNT ARM_CP15_REG64(1, 14)
-#define KVM_REG_ARM_TIMER_CVAL ARM_CP15_REG64(3, 14)
+#define KVM_REG_ARM_TIMER_CNT ARM_CP15_REG64(1, 14)
+#define KVM_REG_ARM_TIMER_CVAL ARM_CP15_REG64(3, 14)
/* Normal registers are mapped as coprocessor 16. */
#define KVM_REG_ARM_CORE (0x0010 << KVM_REG_ARM_COPROC_SHIFT)
diff --git a/arm/aarch64/include/asm/kvm.h b/arm/aarch64/include/asm/kvm.h
index f209ea1..3051f86 100644
--- a/arm/aarch64/include/asm/kvm.h
+++ b/arm/aarch64/include/asm/kvm.h
@@ -87,9 +87,11 @@ struct kvm_regs {
/* Supported VGICv3 address types */
#define KVM_VGIC_V3_ADDR_TYPE_DIST 2
#define KVM_VGIC_V3_ADDR_TYPE_REDIST 3
+#define KVM_VGIC_ITS_ADDR_TYPE 4
#define KVM_VGIC_V3_DIST_SIZE SZ_64K
#define KVM_VGIC_V3_REDIST_SIZE (2 * SZ_64K)
+#define KVM_VGIC_V3_ITS_SIZE (2 * SZ_64K)
#define KVM_ARM_VCPU_POWER_OFF 0 /* CPU is started in OFF state */
#define KVM_ARM_VCPU_EL1_32BIT 1 /* CPU running a 32bit VM */
diff --git a/include/linux/kvm.h b/include/linux/kvm.h
index a7f1f80..300ef25 100644
--- a/include/linux/kvm.h
+++ b/include/linux/kvm.h
@@ -865,6 +865,11 @@ struct kvm_ppc_smmu_info {
#define KVM_CAP_SPAPR_TCE_64 125
#define KVM_CAP_ARM_PMU_V3 126
#define KVM_CAP_VCPU_ATTRIBUTES 127
+#define KVM_CAP_MAX_VCPU_ID 128
+#define KVM_CAP_X2APIC_API 129
+#define KVM_CAP_S390_USER_INSTR0 130
+#define KVM_CAP_MSI_DEVID 131
+#define KVM_CAP_PPC_HTM 132
#ifdef KVM_CAP_IRQ_ROUTING
@@ -877,7 +882,10 @@ struct kvm_irq_routing_msi {
__u32 address_lo;
__u32 address_hi;
__u32 data;
- __u32 pad;
+ union {
+ __u32 pad;
+ __u32 devid;
+ };
};
struct kvm_irq_routing_s390_adapter {
@@ -1023,12 +1031,14 @@ struct kvm_one_reg {
__u64 addr;
};
+#define KVM_MSI_VALID_DEVID (1U << 0)
struct kvm_msi {
__u32 address_lo;
__u32 address_hi;
__u32 data;
__u32 flags;
- __u8 pad[16];
+ __u32 devid;
+ __u8 pad[12];
};
struct kvm_arm_device_addr {
@@ -1073,6 +1083,8 @@ enum kvm_device_type {
#define KVM_DEV_TYPE_FLIC KVM_DEV_TYPE_FLIC
KVM_DEV_TYPE_ARM_VGIC_V3,
#define KVM_DEV_TYPE_ARM_VGIC_V3 KVM_DEV_TYPE_ARM_VGIC_V3
+ KVM_DEV_TYPE_ARM_VGIC_ITS,
+#define KVM_DEV_TYPE_ARM_VGIC_ITS KVM_DEV_TYPE_ARM_VGIC_ITS
KVM_DEV_TYPE_MAX,
};
@@ -1312,4 +1324,7 @@ struct kvm_assigned_msix_entry {
__u16 padding[3];
};
+#define KVM_X2APIC_API_USE_32BIT_IDS (1ULL << 0)
+#define KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK (1ULL << 1)
+
#endif /* __LINUX_KVM_H */
diff --git a/x86/include/asm/kvm.h b/x86/include/asm/kvm.h
index cd54147..739c0c5 100644
--- a/x86/include/asm/kvm.h
+++ b/x86/include/asm/kvm.h
@@ -216,9 +216,9 @@ struct kvm_cpuid_entry2 {
__u32 padding[3];
};
-#define KVM_CPUID_FLAG_SIGNIFCANT_INDEX BIT(0)
-#define KVM_CPUID_FLAG_STATEFUL_FUNC BIT(1)
-#define KVM_CPUID_FLAG_STATE_READ_NEXT BIT(2)
+#define KVM_CPUID_FLAG_SIGNIFCANT_INDEX (1 << 0)
+#define KVM_CPUID_FLAG_STATEFUL_FUNC (1 << 1)
+#define KVM_CPUID_FLAG_STATE_READ_NEXT (1 << 2)
/* for KVM_SET_CPUID2 */
struct kvm_cpuid2 {
--
2.9.0
next prev parent reply other threads:[~2016-11-04 17:31 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-11-04 17:31 [PATCH v8 00/16] kvmtool: arm: ITS emulation and GSI routing support Andre Przywara
2016-11-04 17:31 ` [PATCH v8 01/16] FDT: introduce global phandle allocation Andre Przywara
2016-12-09 11:55 ` Marc Zyngier
2016-12-19 18:43 ` Andre Przywara
2016-12-20 9:43 ` Andrew Jones
2016-12-09 12:03 ` Marc Zyngier
2016-12-19 18:43 ` Andre Przywara
2017-02-01 16:44 ` André Przywara
2017-02-01 17:13 ` Marc Zyngier
2017-02-02 16:31 ` Andre Przywara
2016-11-04 17:31 ` [PATCH v8 02/16] arm: use new phandle allocation functions Andre Przywara
2016-12-09 13:26 ` Marc Zyngier
2016-11-04 17:31 ` [PATCH v8 03/16] irq: move IRQ routing into irq.c Andre Przywara
2016-12-09 14:41 ` Marc Zyngier
2016-11-04 17:31 ` [PATCH v8 04/16] MSI-X: update GSI routing after changed MSI-X configuration Andre Przywara
2016-12-09 17:13 ` Marc Zyngier
2016-12-19 18:44 ` Andre Przywara
2016-11-04 17:31 ` [PATCH v8 05/16] virtio: fix endianness check for vhost support Andre Przywara
2016-11-04 17:31 ` [PATCH v8 06/16] PCI: Only allocate IRQ routing entry when available Andre Przywara
2016-11-04 17:31 ` Andre Przywara [this message]
2016-11-04 17:31 ` [PATCH v8 08/16] arm: gic: allow 32-bit compilation Andre Przywara
2016-11-04 17:31 ` [PATCH v8 09/16] arm: allow creation of an MSI register frame region Andre Przywara
2016-11-04 17:31 ` [PATCH v8 10/16] arm: FDT: create MSI controller DT node Andre Przywara
2016-11-04 17:31 ` [PATCH v8 11/16] add kvm__check_vm_capability Andre Przywara
2016-11-04 17:31 ` [PATCH v8 12/16] PCI: inject PCI device ID on MSI injection Andre Przywara
2016-11-04 17:32 ` [PATCH v8 13/16] arm: setup SPI IRQ routing tables Andre Przywara
2016-11-04 17:32 ` [PATCH v8 14/16] extend GSI IRQ routing to take a device ID Andre Przywara
2016-11-04 17:32 ` [PATCH v8 15/16] arm64: enable GICv3-ITS emulation Andre Przywara
2016-11-04 17:32 ` [PATCH v8 16/16] arm: add support for vGICv3 and vITS Andre Przywara
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