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From: maxime.ripard@free-electrons.com (Maxime Ripard)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 2/2] clk: sunxi-ng: fix up PLL_CPUX adjusting for A23/A33
Date: Mon, 7 Nov 2016 08:56:03 +0100	[thread overview]
Message-ID: <20161107075603.zad2kgzvh5lr7zeh@lukather> (raw)
In-Reply-To: <20161106172932.39478-2-icenowy@aosc.xyz>

Hi,

Same remark for the commit title.

On Mon, Nov 07, 2016 at 01:29:32AM +0800, Icenowy Zheng wrote:
> When adjusting PLL_CPUX on A23/A33, the PLL is driven too high, and the
> system stucks.
> 
> Add a notifier to avoid this situation.
> 
> The code is ported from ccu-sun6i-a31.c.
> 
> Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
> ---
> Patch 4.9-rc too.
>  drivers/clk/sunxi-ng/ccu-sun8i-a23.c | 10 ++++++++++

Have you checked that it was also needed on A23? Not all SoCs are in
this situation.

Thanks,
Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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  parent reply	other threads:[~2016-11-07  7:56 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-11-06 17:29 [PATCH 1/2] clk: sunxi-ng: Fix CPUX clock for the A23/A33 Icenowy Zheng
2016-11-06 17:29 ` [PATCH 2/2] clk: sunxi-ng: fix up PLL_CPUX adjusting for A23/A33 Icenowy Zheng
2016-11-06 18:04   ` Quentin Schulz
2016-11-07  7:56   ` Maxime Ripard [this message]
2016-11-07  7:54 ` [PATCH 1/2] clk: sunxi-ng: Fix CPUX clock for the A23/A33 Maxime Ripard

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