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From: dinguyen@kernel.org (Dinh Nguyen)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCHv3] ARM: dts: socfpga: Enable QSPI on the Cyclone5 sockit
Date: Mon,  7 Nov 2016 20:28:30 -0600	[thread overview]
Message-ID: <20161108022830.29303-1-dinguyen@kernel.org> (raw)

From: Dinh Nguyen <dinguyen@opensource.altera.com>

Enable the QSPI node and add the flash chip.

Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
---
v3: Use n25q00 for the compatible entry for the flash part and
    tested on SoCKit
v2: Remove partition entries for the SoCKIT
---
 arch/arm/boot/dts/socfpga_cyclone5_sockit.dts | 21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)

diff --git a/arch/arm/boot/dts/socfpga_cyclone5_sockit.dts b/arch/arm/boot/dts/socfpga_cyclone5_sockit.dts
index 02e22f5..d59f6f2 100644
--- a/arch/arm/boot/dts/socfpga_cyclone5_sockit.dts
+++ b/arch/arm/boot/dts/socfpga_cyclone5_sockit.dts
@@ -175,6 +175,27 @@
 	status = "okay";
 };
 
+&qspi {
+	status = "okay";
+
+	flash: flash at 0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "n25q00";
+		reg = <0>;
+		spi-max-frequency = <100000000>;
+
+		m25p,fast-read;
+		cdns,page-size = <256>;
+		cdns,block-size = <16>;
+		cdns,read-delay = <4>;
+		cdns,tshsl-ns = <50>;
+		cdns,tsd2d-ns = <50>;
+		cdns,tchsh-ns = <4>;
+		cdns,tslch-ns = <4>;
+	};
+};
+
 &usb1 {
 	status = "okay";
 };
-- 
2.8.3

             reply	other threads:[~2016-11-08  2:28 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-11-08  2:28 Dinh Nguyen [this message]
2016-11-09  7:19 ` [PATCHv3] ARM: dts: socfpga: Enable QSPI on the Cyclone5 sockit Steffen Trumtrar

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