From mboxrd@z Thu Jan 1 00:00:00 1970 From: romain.perier@free-electrons.com (Romain Perier) Date: Thu, 1 Dec 2016 11:27:17 +0100 Subject: [PATCH v3 3/5] spi: armada-3700: Add documentation for the Armada 3700 SPI Controller In-Reply-To: <20161201102719.4291-1-romain.perier@free-electrons.com> References: <20161201102719.4291-1-romain.perier@free-electrons.com> Message-ID: <20161201102719.4291-4-romain.perier@free-electrons.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org This adds the devicetree bindings documentation for the SPI controller present in the Marvell Armada 3700 SoCs. Signed-off-by: Romain Perier Tested-by: Gregory CLEMENT --- Changes in v3: - Added tag "Tested-by" by Gregory - Fixed commit title, as requested by Mark Brown .../devicetree/bindings/spi/spi-armada-3700.txt | 25 ++++++++++++++++++++++ 1 file changed, 25 insertions(+) create mode 100644 Documentation/devicetree/bindings/spi/spi-armada-3700.txt diff --git a/Documentation/devicetree/bindings/spi/spi-armada-3700.txt b/Documentation/devicetree/bindings/spi/spi-armada-3700.txt new file mode 100644 index 0000000..1564aa8 --- /dev/null +++ b/Documentation/devicetree/bindings/spi/spi-armada-3700.txt @@ -0,0 +1,25 @@ +* Marvell Armada 3700 SPI Controller + +Required Properties: + +- compatible: should be "marvell,armada-3700-spi" +- reg: physical base address of the controller and length of memory mapped + region. +- interrupts: The interrupt number. The interrupt specifier format depends on + the interrupt controller and of its driver. +- clocks: Must contain the clock source, usually from the North Bridge clocks. +- num-cs: The number of chip selects that is supported by this SPI Controller +- #address-cells: should be 1. +- #size-cells: should be 0. + +Example: + + spi0: spi at 10600 { + compatible = "marvell,armada-3700-spi"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x10600 0x5d>; + clocks = <&nb_perih_clk 7>; + interrupts = ; + num-cs = <4>; + }; -- 2.9.3