From: maxime.ripard@free-electrons.com (Maxime Ripard)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 2/6] clk: sunxi-ng: set the parent rate when adjustin CPUX clock on A33
Date: Tue, 13 Dec 2016 16:44:51 +0100 [thread overview]
Message-ID: <20161213154451.y4wcrqhtcc5sqli7@lukather> (raw)
In-Reply-To: <20161213152252.53749-3-icenowy@aosc.xyz>
On Tue, Dec 13, 2016 at 11:22:48PM +0800, Icenowy Zheng wrote:
> The CPUX clock on A33, which is for the Cortex-A7 cores, is designed to
> be changeable by changing the rate of PLL_CPUX.
>
> Add CLK_SET_RATE_PARENT flag to this clock.
>
> Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Thanks!
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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next prev parent reply other threads:[~2016-12-13 15:44 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-12-13 15:22 [PATCH 0/6] Allwinner A33 CPU frequency scaling support Icenowy Zheng
2016-12-13 15:22 ` [PATCH 1/6] clk: sunxi-ng: fix PLL_CPUX adjusting on A33 Icenowy Zheng
2016-12-13 15:44 ` Maxime Ripard
2016-12-13 15:22 ` [PATCH 2/6] clk: sunxi-ng: set the parent rate when adjustin CPUX clock " Icenowy Zheng
2016-12-13 15:44 ` Maxime Ripard [this message]
2016-12-13 20:54 ` Icenowy Zheng
2016-12-14 9:21 ` Maxime Ripard
2016-12-13 15:22 ` [PATCH 3/6] ARM: dts: sun8i: add a cpu0 label to cpu@0 node on A23/33 Icenowy Zheng
2016-12-13 15:45 ` Maxime Ripard
2016-12-13 16:09 ` Sudeep Holla
2016-12-13 16:31 ` Chen-Yu Tsai
2016-12-13 16:45 ` Sudeep Holla
2016-12-13 15:22 ` [PATCH 4/6] ARM: dts: sun8i: add opp-v2 table for A33 Icenowy Zheng
2016-12-13 19:12 ` Maxime Ripard
2016-12-13 15:22 ` [PATCH 5/6] ARM: dts: sun8i: set cpu-supply in reference tablet DTSI Icenowy Zheng
2016-12-13 19:13 ` Maxime Ripard
2016-12-13 15:22 ` [PATCH 6/6] ARM: dts: sun8i: raise the max voltage of DCDC2 in sun8i reference tablets Icenowy Zheng
2016-12-13 19:14 ` Maxime Ripard
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