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From: sboyd@codeaurora.org (Stephen Boyd)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 03/11] driver: clk: imx: Add clock driver for imx6sll
Date: Tue, 13 Dec 2016 15:28:35 -0800	[thread overview]
Message-ID: <20161213232835.GR5423@codeaurora.org> (raw)
In-Reply-To: <AM3PR04MB5302BE33BE1F2C9913FF61587980@AM3PR04MB530.eurprd04.prod.outlook.com>

On 12/12, Jacky Bai wrote:
> > On 12/02, Bai Ping wrote:
> > > diff --git a/drivers/clk/imx/clk-imx6sll.c
> > > b/drivers/clk/imx/clk-imx6sll.c new file mode 100644 index
> > > 0000000..c5219e1
> > > --- /dev/null
> > > +++ b/drivers/clk/imx/clk-imx6sll.c
> > > +0x20, 16, 1, pll7_bypass_sels, ARRAY_SIZE(pll7_bypass_sels),
> > > +CLK_SET_RATE_PARENT);
> > > +
> > > +	/* Do not bypass PLLs initially */
> > > +	clk_set_parent(clks[IMX6SLL_PLL1_BYPASS], clks[IMX6SLL_CLK_PLL1]);
> > > +	clk_set_parent(clks[IMX6SLL_PLL2_BYPASS], clks[IMX6SLL_CLK_PLL2]);
> > > +	clk_set_parent(clks[IMX6SLL_PLL3_BYPASS], clks[IMX6SLL_CLK_PLL3]);
> > > +	clk_set_parent(clks[IMX6SLL_PLL4_BYPASS], clks[IMX6SLL_CLK_PLL4]);
> > > +	clk_set_parent(clks[IMX6SLL_PLL5_BYPASS], clks[IMX6SLL_CLK_PLL5]);
> > > +	clk_set_parent(clks[IMX6SLL_PLL6_BYPASS], clks[IMX6SLL_CLK_PLL6]);
> > > +	clk_set_parent(clks[IMX6SLL_PLL7_BYPASS], clks[IMX6SLL_CLK_PLL7]);
> > 
> > Can we just put raw register writes here instead? I'd prefer we didn't use clk
> > consumer APIs to do things to the clk tree from the providers. The problem
> > there being that:
> > 
> >  1) We're trying to move away from using consumer APIs in  provider drivers.
> > It's ok if they're used during probe, but  inside clk_ops is not preferred.
> > 
> >  2) Even if you have a clk pointer, it may be "orphaned" at the  time of
> > registration and so calling the APIs here works now but  eventually we may
> > want to return an EPROBE_DEFER error in that  case and this may block that
> > effort.
> > 
> > I suppose if this is the only clk driver on this machine then this last point isn't a
> > concern and things are probably ok here.
> > 
> 
> Using raw register writing has an issue.  The register is modified, but it seems the clock 'parent-child' relationship can 
> not match the register setting. The register setting is not bypass the pll, but in debug 'clk_summary', the
> pll is bypassed.  

So program the register settings before registering the clocks
with the framework?

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

  reply	other threads:[~2016-12-13 23:28 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-12-02  6:39 [PATCH 00/11] Add basic code support for imx6sll Bai Ping
2016-12-02  6:39 ` [PATCH 01/11] ARM: imx: Add basic msl " Bai Ping
2016-12-02  6:39 ` [PATCH 02/11] driver: clocksource: add gpt timer " Bai Ping
2016-12-02  6:39 ` [PATCH 03/11] driver: clk: imx: Add clock driver " Bai Ping
2016-12-08 22:52   ` Stephen Boyd
2016-12-12  2:58     ` Jacky Bai
2016-12-13 23:28       ` Stephen Boyd [this message]
2016-12-02  6:39 ` [PATCH 04/11] driver: pinctrl: imx: Add pinctrl driver support " Bai Ping
2016-12-02  6:39 ` [PATCH 06/11] ARM: dts: imx: Add imx6sll EVK board dts support Bai Ping
2016-12-05 10:25   ` Fabio Estevam
2016-12-06  8:39     ` Jacky Bai
2016-12-02  6:39 ` [PATCH 07/11] ARM: debug: Add low level debug support for imx6sll Bai Ping
2016-12-02  6:39 ` [PATCH 08/11] ARM: imx: Add suspend/resume " Bai Ping
2016-12-02  6:39 ` [PATCH 09/11] ARM: imx: correct i.mx6sll dram io low power mode Bai Ping
2016-12-02  6:39 ` [PATCH 10/11] Document: dt: binding: imx: update doc for imx6sll Bai Ping
2016-12-08 22:54   ` Stephen Boyd
2016-12-12  2:32     ` Jacky Bai
2016-12-09 18:12   ` Rob Herring
2016-12-12  2:59     ` Jacky Bai
2016-12-02  6:39 ` [PATCH 11/11] ARM: configs: enable imx6sll support in defconfig Bai Ping

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