* [PATCH 1/3] nvmem: imx-ocotp: Add support for i.MX6UL
@ 2016-12-02 14:45 Daniel Schultz
2016-12-02 14:45 ` [PATCH 2/3] ARM: dts: imx6ul: Add OCOTP node Daniel Schultz
` (3 more replies)
0 siblings, 4 replies; 7+ messages in thread
From: Daniel Schultz @ 2016-12-02 14:45 UTC (permalink / raw)
To: linux-arm-kernel
This patch adds OCOTP support for the i.MX6UL SoC.
Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
---
Documentation/devicetree/bindings/nvmem/imx-ocotp.txt | 5 +++--
drivers/nvmem/imx-ocotp.c | 1 +
2 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/nvmem/imx-ocotp.txt b/Documentation/devicetree/bindings/nvmem/imx-ocotp.txt
index 383d588..fcb1a48 100644
--- a/Documentation/devicetree/bindings/nvmem/imx-ocotp.txt
+++ b/Documentation/devicetree/bindings/nvmem/imx-ocotp.txt
@@ -1,13 +1,14 @@
Freescale i.MX6 On-Chip OTP Controller (OCOTP) device tree bindings
This binding represents the on-chip eFuse OTP controller found on
-i.MX6Q/D, i.MX6DL/S, i.MX6SL, and i.MX6SX SoCs.
+i.MX6Q/D, i.MX6DL/S, i.MX6SL, i.MX6SX and i.MX6UL SoCs.
Required properties:
- compatible: should be one of
"fsl,imx6q-ocotp" (i.MX6Q/D/DL/S),
"fsl,imx6sl-ocotp" (i.MX6SL), or
- "fsl,imx6sx-ocotp" (i.MX6SX), followed by "syscon".
+ "fsl,imx6sx-ocotp" (i.MX6SX), or
+ "fsl,imx6ul-ocotp" (i.MX6UL), followed by "syscon".
- reg: Should contain the register base and length.
- clocks: Should contain a phandle pointing to the gated peripheral clock.
diff --git a/drivers/nvmem/imx-ocotp.c b/drivers/nvmem/imx-ocotp.c
index ac27b9b..d2f78d3 100644
--- a/drivers/nvmem/imx-ocotp.c
+++ b/drivers/nvmem/imx-ocotp.c
@@ -71,6 +71,7 @@ static int imx_ocotp_read(void *context, unsigned int offset,
static const struct of_device_id imx_ocotp_dt_ids[] = {
{ .compatible = "fsl,imx6q-ocotp", (void *)128 },
+ { .compatible = "fsl,imx6ul-ocotp", (void *)128 },
{ .compatible = "fsl,imx6sl-ocotp", (void *)32 },
{ .compatible = "fsl,imx6sx-ocotp", (void *)128 },
{ },
--
1.9.1
^ permalink raw reply related [flat|nested] 7+ messages in thread* [PATCH 2/3] ARM: dts: imx6ul: Add OCOTP node
2016-12-02 14:45 [PATCH 1/3] nvmem: imx-ocotp: Add support for i.MX6UL Daniel Schultz
@ 2016-12-02 14:45 ` Daniel Schultz
2016-12-30 13:01 ` Shawn Guo
2016-12-02 14:45 ` [PATCH 3/3] nvmem: imx-ocotp: Fix wrong register size Daniel Schultz
` (2 subsequent siblings)
3 siblings, 1 reply; 7+ messages in thread
From: Daniel Schultz @ 2016-12-02 14:45 UTC (permalink / raw)
To: linux-arm-kernel
This device node adds OCOTP for the i.MX6UL SoC.
Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
---
arch/arm/boot/dts/imx6ul.dtsi | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/imx6ul.dtsi b/arch/arm/boot/dts/imx6ul.dtsi
index c5c05fd..ee53795 100644
--- a/arch/arm/boot/dts/imx6ul.dtsi
+++ b/arch/arm/boot/dts/imx6ul.dtsi
@@ -849,6 +849,12 @@
reg = <0x021b0000 0x4000>;
};
+ ocotp: ocotp at 021bc000 {
+ compatible = "fsl,imx6ul-ocotp";
+ reg = <0x021bc000 0x4000>;
+ clocks = <&clks IMX6UL_CLK_OCOTP>;
+ };
+
lcdif: lcdif at 021c8000 {
compatible = "fsl,imx6ul-lcdif", "fsl,imx28-lcdif";
reg = <0x021c8000 0x4000>;
--
1.9.1
^ permalink raw reply related [flat|nested] 7+ messages in thread* [PATCH 2/3] ARM: dts: imx6ul: Add OCOTP node
2016-12-02 14:45 ` [PATCH 2/3] ARM: dts: imx6ul: Add OCOTP node Daniel Schultz
@ 2016-12-30 13:01 ` Shawn Guo
0 siblings, 0 replies; 7+ messages in thread
From: Shawn Guo @ 2016-12-30 13:01 UTC (permalink / raw)
To: linux-arm-kernel
On Fri, Dec 02, 2016 at 03:45:48PM +0100, Daniel Schultz wrote:
> This device node adds OCOTP for the i.MX6UL SoC.
>
> Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Bai Ping (Cc'ed here) from NXP is sending similar patches [1]. DTS
change looks good to me, but I will not apply it until the driver and
bindings get accepted.
Shawn
[1] https://www.spinics.net/lists/arm-kernel/msg540900.html
> ---
> arch/arm/boot/dts/imx6ul.dtsi | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/arch/arm/boot/dts/imx6ul.dtsi b/arch/arm/boot/dts/imx6ul.dtsi
> index c5c05fd..ee53795 100644
> --- a/arch/arm/boot/dts/imx6ul.dtsi
> +++ b/arch/arm/boot/dts/imx6ul.dtsi
> @@ -849,6 +849,12 @@
> reg = <0x021b0000 0x4000>;
> };
>
> + ocotp: ocotp at 021bc000 {
> + compatible = "fsl,imx6ul-ocotp";
> + reg = <0x021bc000 0x4000>;
> + clocks = <&clks IMX6UL_CLK_OCOTP>;
> + };
> +
> lcdif: lcdif at 021c8000 {
> compatible = "fsl,imx6ul-lcdif", "fsl,imx28-lcdif";
> reg = <0x021c8000 0x4000>;
> --
> 1.9.1
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH 3/3] nvmem: imx-ocotp: Fix wrong register size
2016-12-02 14:45 [PATCH 1/3] nvmem: imx-ocotp: Add support for i.MX6UL Daniel Schultz
2016-12-02 14:45 ` [PATCH 2/3] ARM: dts: imx6ul: Add OCOTP node Daniel Schultz
@ 2016-12-02 14:45 ` Daniel Schultz
2016-12-09 21:02 ` [PATCH 1/3] nvmem: imx-ocotp: Add support for i.MX6UL Rob Herring
2017-01-04 14:14 ` Srinivas Kandagatla
3 siblings, 0 replies; 7+ messages in thread
From: Daniel Schultz @ 2016-12-02 14:45 UTC (permalink / raw)
To: linux-arm-kernel
All i.MX6 SoCs have an OCOTP Controller with 4kbit fuses. The i.MX6SL is
an exception and has only 2kbit fuses.
In the TRM for the i.MX6DQ (IMX6QDRM - Rev 2, 06/2014) the fuses size is
described in chapter 46.1.1 with:
"32-bit word restricted program and read to 4Kbits of eFuse OTP(512x8)."
In the TRM for the i.MX6SL (IMX6SLRM - Rev 2, 06/2015) the fuses size is
described in chapter 34.1.1 with:
"32-bit word restricted program and read to 2 kbit of eFuse OTP(128x8)."
Since the Freescale Linux kernel OCOTP driver works with a fuses size of
2 kbit for the i.MX6SL, it looks like the TRM is wrong and the formula
to calculate the correct fuses size has to be 256x8.
Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
---
drivers/nvmem/imx-ocotp.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/nvmem/imx-ocotp.c b/drivers/nvmem/imx-ocotp.c
index d2f78d3..8482c53 100644
--- a/drivers/nvmem/imx-ocotp.c
+++ b/drivers/nvmem/imx-ocotp.c
@@ -72,7 +72,7 @@ static int imx_ocotp_read(void *context, unsigned int offset,
static const struct of_device_id imx_ocotp_dt_ids[] = {
{ .compatible = "fsl,imx6q-ocotp", (void *)128 },
{ .compatible = "fsl,imx6ul-ocotp", (void *)128 },
- { .compatible = "fsl,imx6sl-ocotp", (void *)32 },
+ { .compatible = "fsl,imx6sl-ocotp", (void *)64 },
{ .compatible = "fsl,imx6sx-ocotp", (void *)128 },
{ },
};
--
1.9.1
^ permalink raw reply related [flat|nested] 7+ messages in thread* [PATCH 1/3] nvmem: imx-ocotp: Add support for i.MX6UL
2016-12-02 14:45 [PATCH 1/3] nvmem: imx-ocotp: Add support for i.MX6UL Daniel Schultz
2016-12-02 14:45 ` [PATCH 2/3] ARM: dts: imx6ul: Add OCOTP node Daniel Schultz
2016-12-02 14:45 ` [PATCH 3/3] nvmem: imx-ocotp: Fix wrong register size Daniel Schultz
@ 2016-12-09 21:02 ` Rob Herring
2017-01-04 14:14 ` Srinivas Kandagatla
3 siblings, 0 replies; 7+ messages in thread
From: Rob Herring @ 2016-12-09 21:02 UTC (permalink / raw)
To: linux-arm-kernel
On Fri, Dec 02, 2016 at 03:45:47PM +0100, Daniel Schultz wrote:
> This patch adds OCOTP support for the i.MX6UL SoC.
>
> Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
> ---
> Documentation/devicetree/bindings/nvmem/imx-ocotp.txt | 5 +++--
> drivers/nvmem/imx-ocotp.c | 1 +
> 2 files changed, 4 insertions(+), 2 deletions(-)
Acked-by: Rob Herring <robh@kernel.org>
^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH 1/3] nvmem: imx-ocotp: Add support for i.MX6UL
2016-12-02 14:45 [PATCH 1/3] nvmem: imx-ocotp: Add support for i.MX6UL Daniel Schultz
` (2 preceding siblings ...)
2016-12-09 21:02 ` [PATCH 1/3] nvmem: imx-ocotp: Add support for i.MX6UL Rob Herring
@ 2017-01-04 14:14 ` Srinivas Kandagatla
3 siblings, 0 replies; 7+ messages in thread
From: Srinivas Kandagatla @ 2017-01-04 14:14 UTC (permalink / raw)
To: linux-arm-kernel
On 02/12/16 14:45, Daniel Schultz wrote:
> This patch adds OCOTP support for the i.MX6UL SoC.
>
> Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
As Shawn said, there is already a similar patch in the mailing list
http://www.spinics.net/lists/arm-kernel/msg543203.html
http://www.spinics.net/lists/arm-kernel/msg543204.html
I will pick that patch + I will queue up fix from you "[PATCH 3/3]
nvmem: imx-ocotp: Fix wrong register size"
thanks,
srini
> ---
> Documentation/devicetree/bindings/nvmem/imx-ocotp.txt | 5 +++--
> drivers/nvmem/imx-ocotp.c | 1 +
> 2 files changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/nvmem/imx-ocotp.txt b/Documentation/devicetree/bindings/nvmem/imx-ocotp.txt
> index 383d588..fcb1a48 100644
> --- a/Documentation/devicetree/bindings/nvmem/imx-ocotp.txt
> +++ b/Documentation/devicetree/bindings/nvmem/imx-ocotp.txt
> @@ -1,13 +1,14 @@
> Freescale i.MX6 On-Chip OTP Controller (OCOTP) device tree bindings
>
> This binding represents the on-chip eFuse OTP controller found on
> -i.MX6Q/D, i.MX6DL/S, i.MX6SL, and i.MX6SX SoCs.
> +i.MX6Q/D, i.MX6DL/S, i.MX6SL, i.MX6SX and i.MX6UL SoCs.
>
> Required properties:
> - compatible: should be one of
> "fsl,imx6q-ocotp" (i.MX6Q/D/DL/S),
> "fsl,imx6sl-ocotp" (i.MX6SL), or
> - "fsl,imx6sx-ocotp" (i.MX6SX), followed by "syscon".
> + "fsl,imx6sx-ocotp" (i.MX6SX), or
> + "fsl,imx6ul-ocotp" (i.MX6UL), followed by "syscon".
> - reg: Should contain the register base and length.
> - clocks: Should contain a phandle pointing to the gated peripheral clock.
>
> diff --git a/drivers/nvmem/imx-ocotp.c b/drivers/nvmem/imx-ocotp.c
> index ac27b9b..d2f78d3 100644
> --- a/drivers/nvmem/imx-ocotp.c
> +++ b/drivers/nvmem/imx-ocotp.c
> @@ -71,6 +71,7 @@ static int imx_ocotp_read(void *context, unsigned int offset,
>
> static const struct of_device_id imx_ocotp_dt_ids[] = {
> { .compatible = "fsl,imx6q-ocotp", (void *)128 },
> + { .compatible = "fsl,imx6ul-ocotp", (void *)128 },
> { .compatible = "fsl,imx6sl-ocotp", (void *)32 },
> { .compatible = "fsl,imx6sx-ocotp", (void *)128 },
> { },
>
^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH 1/3] documentation: nvmem: imx-ocotp: Add i.MX6UL support
@ 2016-04-19 8:59 Peng Fan
2016-04-19 8:59 ` [PATCH 2/3] arm: dts: imx6ul: add ocotp node Peng Fan
0 siblings, 1 reply; 7+ messages in thread
From: Peng Fan @ 2016-04-19 8:59 UTC (permalink / raw)
To: linux-arm-kernel
Add i.MX6UL support in documentation.
Signed-off-by: Peng Fan <van.freenix@gmail.com>
Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Cc: Maxime Ripard <maxime.ripard@free-electrons.com>
Cc: Rob Herring <robh+dt@kernel.org>
---
Documentation/devicetree/bindings/nvmem/imx-ocotp.txt | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/nvmem/imx-ocotp.txt b/Documentation/devicetree/bindings/nvmem/imx-ocotp.txt
index 383d588..ca2075b 100644
--- a/Documentation/devicetree/bindings/nvmem/imx-ocotp.txt
+++ b/Documentation/devicetree/bindings/nvmem/imx-ocotp.txt
@@ -1,13 +1,14 @@
Freescale i.MX6 On-Chip OTP Controller (OCOTP) device tree bindings
This binding represents the on-chip eFuse OTP controller found on
-i.MX6Q/D, i.MX6DL/S, i.MX6SL, and i.MX6SX SoCs.
+i.MX6Q/D, i.MX6DL/S, i.MX6SL, i.MX6SX, and i.MX6UL SoCs.
Required properties:
- compatible: should be one of
"fsl,imx6q-ocotp" (i.MX6Q/D/DL/S),
"fsl,imx6sl-ocotp" (i.MX6SL), or
- "fsl,imx6sx-ocotp" (i.MX6SX), followed by "syscon".
+ "fsl,imx6sx-ocotp" (i.MX6SX), or
+ "fsl,imx6ul-ocotp" (i.MX6UL), followed by "syscon".
- reg: Should contain the register base and length.
- clocks: Should contain a phandle pointing to the gated peripheral clock.
--
1.8.4.5
^ permalink raw reply related [flat|nested] 7+ messages in thread
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2016-12-30 13:01 ` Shawn Guo
2016-12-02 14:45 ` [PATCH 3/3] nvmem: imx-ocotp: Fix wrong register size Daniel Schultz
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