From: s.hauer@pengutronix.de (Sascha Hauer)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 3/4] ARM: dts: imx7d-cl-som: Fix OTG power pinctrl
Date: Thu, 19 Jan 2017 10:09:23 +0100 [thread overview]
Message-ID: <20170119090924.19636-4-s.hauer@pengutronix.de> (raw)
In-Reply-To: <20170119090924.19636-1-s.hauer@pengutronix.de>
GPIO01_IO05 is controlled by the LPSR iomux controller, so attach
the corresponding pin to this controller.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
arch/arm/boot/dts/imx7d-cl-som-imx7.dts | 14 ++++++++------
1 file changed, 8 insertions(+), 6 deletions(-)
diff --git a/arch/arm/boot/dts/imx7d-cl-som-imx7.dts b/arch/arm/boot/dts/imx7d-cl-som-imx7.dts
index 58b09bf1ba2d..1135bc99b3e7 100644
--- a/arch/arm/boot/dts/imx7d-cl-som-imx7.dts
+++ b/arch/arm/boot/dts/imx7d-cl-som-imx7.dts
@@ -261,12 +261,6 @@
>;
};
- pinctrl_usbotg1: usbotg1grp {
- fsl,pins = <
- MX7D_PAD_GPIO1_IO05__GPIO1_IO5 0x14 /* OTG PWREN */
- >;
- };
-
pinctrl_usdhc3: usdhc3grp {
fsl,pins = <
MX7D_PAD_SD3_CMD__SD3_CMD 0x59
@@ -283,3 +277,11 @@
>;
};
};
+
+&iomuxc_lpsr {
+ pinctrl_usbotg1: usbotg1grp {
+ fsl,pins = <
+ MX7D_PAD_GPIO1_IO05__GPIO1_IO5 0x14 /* OTG PWREN */
+ >;
+ };
+};
\ No newline at end of file
--
2.11.0
next prev parent reply other threads:[~2017-01-19 9:09 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-01-19 9:09 ARM: i.MX7: Fix LPSR specific iomux pins Sascha Hauer
2017-01-19 9:09 ` [PATCH 1/4] ARM: dts: imx7s-warp: Fix watchdog pinmux Sascha Hauer
2017-01-19 11:56 ` Fabio Estevam
2017-01-19 9:09 ` [PATCH 2/4] ARM: dts: imx7d-sdp: Fix watchdog and pwm pinmux Sascha Hauer
2017-01-19 12:02 ` Fabio Estevam
2017-01-19 9:09 ` Sascha Hauer [this message]
2017-01-19 12:02 ` [PATCH 3/4] ARM: dts: imx7d-cl-som: Fix OTG power pinctrl Fabio Estevam
2017-01-19 9:09 ` [PATCH 4/4] ARM: dts: imx7: Add "LPSR" to LPSR iomux pin names Sascha Hauer
2017-01-19 12:03 ` Fabio Estevam
2017-01-24 6:22 ` ARM: i.MX7: Fix LPSR specific iomux pins Shawn Guo
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