From: linux@armlinux.org.uk (Russell King - ARM Linux)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCHv4 3/5] pinctrl: mvebu: pinctrl driver for 98DX3236 SoC
Date: Thu, 19 Jan 2017 10:02:44 +0000 [thread overview]
Message-ID: <20170119100244.GX27312@n2100.armlinux.org.uk> (raw)
In-Reply-To: <20170113091222.7132-4-chris.packham@alliedtelesis.co.nz>
On Fri, Jan 13, 2017 at 10:12:18PM +1300, Chris Packham wrote:
> +static struct mvebu_mpp_ctrl mv98dx3236_mpp_controls[] = {
> + MPP_FUNC_CTRL(0, 32, NULL, armada_xp_mpp_ctrl),
> +};
As Linus has taken my mvebu pinctrl series, this will need to be
changed to "mvebu_mmio_mpp_ctrl" rather than "armada_xp_mpp_ctrl"
when it's merged.
--
RMK's Patch system: http://www.armlinux.org.uk/developer/patches/
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next prev parent reply other threads:[~2017-01-19 10:02 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-01-13 9:12 [PATCHv4 0/5] Support for Marvell switches with integrated CPUs Chris Packham
2017-01-13 9:12 ` [PATCHv4 1/5] clk: mvebu: support for 98DX3236 SoC Chris Packham
2017-01-18 22:25 ` Rob Herring
2017-01-19 3:24 ` Chris Packham
2017-01-21 0:48 ` Stephen Boyd
2017-01-23 7:53 ` Chris Packham
2017-01-23 23:53 ` Stephen Boyd
2017-01-13 9:12 ` [PATCHv4 2/5] arm: mvebu: support for SMP on 98DX3336 SoC Chris Packham
2017-01-19 0:47 ` Stephen Boyd
2017-01-19 3:23 ` Chris Packham
2017-01-13 9:12 ` [PATCHv4 3/5] pinctrl: mvebu: pinctrl driver for 98DX3236 SoC Chris Packham
2017-01-13 9:54 ` Sebastian Hesselbarth
2017-01-14 7:50 ` Chris Packham
2017-01-19 21:12 ` Chris Packham
2017-01-19 23:19 ` Sebastian Hesselbarth
2017-01-19 23:36 ` Chris Packham
2017-01-19 10:02 ` Russell King - ARM Linux [this message]
2017-01-19 21:10 ` Chris Packham
2017-01-23 8:18 ` Chris Packham
2017-01-26 14:11 ` Linus Walleij
2017-01-13 9:12 ` [PATCHv4 4/5] arm: mvebu: Add device tree for 98DX3236 SoCs Chris Packham
2017-01-13 9:12 ` [PATCHv4 5/5] arm: mvebu: Add device tree for db-dxbc2 and db-xc3-24g4xg boards Chris Packham
2017-01-26 15:17 ` [PATCHv4 0/5] Support for Marvell switches with integrated CPUs Gregory CLEMENT
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