From: maxime.ripard@free-electrons.com (Maxime Ripard)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 1/4] phy: sun4i-usb: support PHY0 on H3 in MUSB mode
Date: Thu, 19 Jan 2017 15:34:45 +0100 [thread overview]
Message-ID: <20170119143445.dmckuqjxmfhwr3h5@lukather> (raw)
In-Reply-To: <CAGb2v67kYtrTdw9YMS7wvRa=2MWYJ=BEc9SmUOds7hNYZKOz9g@mail.gmail.com>
On Wed, Jan 18, 2017 at 04:09:32AM +0800, Chen-Yu Tsai wrote:
> Hi,
>
> On Wed, Jan 18, 2017 at 4:06 AM, Maxime Ripard
> <maxime.ripard@free-electrons.com> wrote:
> > On Wed, Jan 18, 2017 at 12:57:08AM +0800, Icenowy Zheng wrote:
> >>
> >>
> >> 17.01.2017, 16:06, "Maxime Ripard" <maxime.ripard@free-electrons.com>:
> >> > On Tue, Jan 17, 2017 at 03:14:46AM +0800, Icenowy Zheng wrote:
> >> >> The PHY0 on H3 can be wired either to MUSB controller or OHCI/EHCI
> >> >> controller.
> >> >>
> >> >> The original driver wired it to OHCI/EHCI controller; however, as the
> >> >> code to use PHY0 as OHCI/EHCI is missing, it makes the PHY fully
> >> >> unusable.
> >> >>
> >> >> Rename the register (according to its function and the name in BSP
> >> >> driver), and remove the code which wires the PHY0 to OHCI/EHCI, as MUSB
> >> >> can support both peripheral and host mode (although the host mode of
> >> >> MUSB is buggy).
> >> >
> >> > Can you elaborate on that? What's wrong with it?
> >>
> >> The configuration is at bit 0 of register 0x20 in PHY.
> >>
> >> When the PHY is reseted, it defaults as MUSB mode.
> >>
> >> However, the original author of the H3 PHY code seems to be lack of
> >> this knowledge (He named it PHY_UNK_H3), and changed the PHY to HCI
> >> mode.
> >>
> >> I just removed the code that wires it to HCI mode, thus it will work
> >> in MUSB mode, with my sun8i-h3-musb patch.
> >
> > I have no idea what you mean by MUSB mode.
> >
> > Do you mean that the previous code was only working in host mode, and
> > now it only works in peripheral?
>
> From what I understand, with the H3, Allwinner has put a mux
> in front of the MUSB controller. The mux can send the USB data
> to/from the MUSB controller, or a standard EHCI/OHCI pair.
> This register controls said mux.
>
> This means we can use a proper USB host for host mode,
> instead of the limited support in MUSB.
But musb can still operate as a host, right?
Thanks!
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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next prev parent reply other threads:[~2017-01-19 14:34 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-01-16 19:14 [PATCH 0/4] Enable USB OTG on Allwinner H3 and two boards Icenowy Zheng
2017-01-16 19:14 ` [PATCH 1/4] phy: sun4i-usb: support PHY0 on H3 in MUSB mode Icenowy Zheng
2017-01-16 22:57 ` [linux-sunxi] " Ondřej Jirman
2017-01-17 8:06 ` Maxime Ripard
2017-01-17 16:57 ` Icenowy Zheng
2017-01-17 20:06 ` Maxime Ripard
2017-01-17 20:09 ` Chen-Yu Tsai
2017-01-19 14:34 ` Maxime Ripard [this message]
2017-01-19 15:10 ` Icenowy Zheng
[not found] ` <20170119202709.GA1853@excalibur.cnev.de>
2017-01-20 8:04 ` [linux-sunxi] " Hans de Goede
2017-01-22 9:39 ` Icenowy Zheng
2017-01-22 9:58 ` Hans de Goede
2017-01-16 19:14 ` [PATCH 2/4] ARM: dts: sun8i: add MUSB node to H3 SoC Icenowy Zheng
2017-01-16 19:14 ` [PATCH 3/4] ARM: dts: sun8i: enable USB OTG for Orange Pi Zero board Icenowy Zheng
2017-01-16 19:14 ` [PATCH 4/4] ARM: dts: sun8i: enable USB OTG on Orange Pi One board Icenowy Zheng
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