[PATCH net-next v3 06/10] net: dsa: Migrate to device_find_class()

[linux@armlinux.org.uk (Russell King - ARM Linux)]

(This is mainly for Greg's benefit to help him understand the issue.)

I think the diagram you gave initially made this confusing, as it
talks about a CPU(sic) producing the "RGMII" and "MII-MGMT".

Let's instead show a better representation that hopefully helps Greg
understand networking. :)


  CPU
System <-B->  Ethernet controller <-P-> } PHY <---> network cable
                                        } - - - - - - - or - - - - - - -
                  MDIO bus -------M---> } Switch <-P-> PHYs <--> network
                                              `----M----^        cables

'B' can be an on-SoC bus or something like PCI.

'P' are the high-speed connectivity between the ethernet controller and
PHY which carries the packet data.  It has no addressing, it's a point
to point link.  RGMII is just one wiring example, there are many
different interfaces there (SGMII, AUI, XAUI, XGMII to name a few.)

'M' are the MDIO bus, which is the bus by which ethernet PHYs and
switches can be identified and controlled.

The MDIO bus has a bus_type, has host drivers which are sometimes
part of the ethernet controller, but can also be stand-alone devices
shared between multiple ethernet controllers.

PHYs are a kind of MDIO device which are members of the MDIO bus
type.  Each PHY (and switch) has a numerical address, and identifying
numbers within its register set which identifies the manufacturer
and device type.  We have device_driver objects for these.

Expanding the above diagram to make it (hopefully) even clearer,
we can have this classic setup:

  CPU
System <-B-> Ethernet controller <-P-> PHY <---> network cable
                 MDIO bus -------M------^

Or, in the case of two DSA switches attached to an Ethernet controller:

                                     |~~~~~~~~|
System <-B-> Ethernet controller <-P-> Switch <-P-> PHY1 <--> network cable
                 MDIO bus ----+--M--->   1    <-P-> PHY2 <--> network cable
                              |      |        ...    |
                              |      |        <-P-> PHYn <--> network cable
                              |      |....^...|      |
                              |           |  `---M---'
                              |           P
                              |           |
                              |      |~~~~v~~~|
                              `------> Switch <-P-> PHY1 <--> network cable
                                     |   2    ...    |
                                     |        <-P-> PHYn <--> network cable
                                     |........|      |
                                             `---M---'

The problem that the DSA guys are trying to deal with is how to
represent the link between the DSA switches (which are devices
sitting off their controlling bus - the MDIO bus) and the ethernet
controller associated with that collection of devices, be it a
switch or PHY.

Merely changing the parent/child relationships to try and solve
one issue just creates exactly the same problem elsewhere.

So, I hope with these diagrams, you can see that trying to make
the ethernet controller a child device of the DSA switches
means that (eg) it's no longer a PCI device, which is rather
absurd, especially when considering that what happens to the
right of the ethernet controller in the diagrams above is
normally external chips to the SoC or ethernet device.

-- 
RMK's Patch system: http://www.armlinux.org.uk/developer/patches/
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