* [PATCH 0/4] phy/mfd/soc: exynos: Header cleanup
@ 2017-01-27 20:05 Krzysztof Kozlowski
2017-01-27 20:05 ` [PATCH 1/4] phy: exynos4: Remove duplicated defines of PHY register defines Krzysztof Kozlowski
` (4 more replies)
0 siblings, 5 replies; 10+ messages in thread
From: Krzysztof Kozlowski @ 2017-01-27 20:05 UTC (permalink / raw)
To: linux-arm-kernel
Hi,
Suggested by Marek, continuation of cleanup of PMU register defines
in headers.
Let's keep all of them in include/linux/soc/samsung/exynos-regs-pmu.h.
This is based on:
1. Marek's recent work around pinctrl/power domains/lpass:
https://git.linaro.org/people/marek.szyprowski/linux-srpol.git
branch: v4.10-next-tm2-pd
2. My two previous patches for cleanup:
https://git.kernel.org/cgit/linux/kernel/git/krzk/linux.git
branch: for-v4.11/drivers-soc-exynos-pmu-the-joy-never-ends
Affected subsystems/drivers:
1. phy - drivers,
2. mfd - headers,
3. soc/samsung - header.
However because of dependency on Marek's patchset, I do not have a clue
how to merge it... it is not an urgent stuff, so it may wait till
dependencies get in.
Best regards,
Krzysztof
Krzysztof Kozlowski (4):
phy: exynos4: Remove duplicated defines of PHY register defines
phy: exynos5: Remove duplicated defines of PHY register defines
phy: exynos-mipi-video: Use consistent method to address phy registers
phy: exynos: Use one define for enable bit
drivers/phy/phy-exynos-dp-video.c | 6 +--
drivers/phy/phy-exynos-mipi-video.c | 71 ++++++++++++++---------------
drivers/phy/phy-exynos5-usbdrd.c | 6 +--
include/linux/mfd/syscon/exynos4-pmu.h | 21 ---------
include/linux/mfd/syscon/exynos5-pmu.h | 49 --------------------
include/linux/soc/samsung/exynos-regs-pmu.h | 16 ++++++-
6 files changed, 56 insertions(+), 113 deletions(-)
delete mode 100644 include/linux/mfd/syscon/exynos4-pmu.h
delete mode 100644 include/linux/mfd/syscon/exynos5-pmu.h
--
2.9.3
^ permalink raw reply [flat|nested] 10+ messages in thread* [PATCH 1/4] phy: exynos4: Remove duplicated defines of PHY register defines 2017-01-27 20:05 [PATCH 0/4] phy/mfd/soc: exynos: Header cleanup Krzysztof Kozlowski @ 2017-01-27 20:05 ` Krzysztof Kozlowski 2017-02-08 11:58 ` Lee Jones 2017-01-27 20:05 ` [PATCH 2/4] phy: exynos5: " Krzysztof Kozlowski ` (3 subsequent siblings) 4 siblings, 1 reply; 10+ messages in thread From: Krzysztof Kozlowski @ 2017-01-27 20:05 UTC (permalink / raw) To: linux-arm-kernel Phy drivers access PMU region through regmap provided by exynos-pmu driver. However there is no need to duplicate defines for PMU registers. Instead just use whatever is defined in exynos-regs-pmu.h. Additionally MIPI PHY registers for Exynos5433 start from the same address as Exynos4 and Exynos5250 so re-use existing defines. This reduces number of defines and allows removal of one header file. Suggested-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> --- drivers/phy/phy-exynos-mipi-video.c | 12 ++++++------ include/linux/mfd/syscon/exynos4-pmu.h | 21 --------------------- include/linux/mfd/syscon/exynos5-pmu.h | 3 --- include/linux/soc/samsung/exynos-regs-pmu.h | 9 ++++++++- 4 files changed, 14 insertions(+), 31 deletions(-) delete mode 100644 include/linux/mfd/syscon/exynos4-pmu.h diff --git a/drivers/phy/phy-exynos-mipi-video.c b/drivers/phy/phy-exynos-mipi-video.c index 6bee04cc4d53..d7fe1f8c3ac8 100644 --- a/drivers/phy/phy-exynos-mipi-video.c +++ b/drivers/phy/phy-exynos-mipi-video.c @@ -12,7 +12,6 @@ #include <linux/err.h> #include <linux/io.h> #include <linux/kernel.h> -#include <linux/mfd/syscon/exynos4-pmu.h> #include <linux/mfd/syscon/exynos5-pmu.h> #include <linux/module.h> #include <linux/of.h> @@ -21,6 +20,7 @@ #include <linux/phy/phy.h> #include <linux/regmap.h> #include <linux/spinlock.h> +#include <linux/soc/samsung/exynos-regs-pmu.h> #include <linux/mfd/syscon.h> enum exynos_mipi_phy_id { @@ -173,7 +173,7 @@ static const struct mipi_phy_device_desc exynos5433_mipi_phy = { /* EXYNOS_MIPI_PHY_ID_CSIS0 */ .coupled_phy_id = EXYNOS_MIPI_PHY_ID_DSIM0, .enable_val = EXYNOS5_PHY_ENABLE, - .enable_reg = EXYNOS5433_MIPI_PHY0_CONTROL, + .enable_reg = EXYNOS4_MIPI_PHY_CONTROL(0), .enable_map = EXYNOS_MIPI_REGMAP_PMU, .resetn_val = BIT(0), .resetn_reg = EXYNOS5433_SYSREG_CAM0_MIPI_DPHY_CON, @@ -182,7 +182,7 @@ static const struct mipi_phy_device_desc exynos5433_mipi_phy = { /* EXYNOS_MIPI_PHY_ID_DSIM0 */ .coupled_phy_id = EXYNOS_MIPI_PHY_ID_CSIS0, .enable_val = EXYNOS5_PHY_ENABLE, - .enable_reg = EXYNOS5433_MIPI_PHY0_CONTROL, + .enable_reg = EXYNOS4_MIPI_PHY_CONTROL(0), .enable_map = EXYNOS_MIPI_REGMAP_PMU, .resetn_val = BIT(0), .resetn_reg = EXYNOS5433_SYSREG_DISP_MIPI_PHY, @@ -191,7 +191,7 @@ static const struct mipi_phy_device_desc exynos5433_mipi_phy = { /* EXYNOS_MIPI_PHY_ID_CSIS1 */ .coupled_phy_id = EXYNOS_MIPI_PHY_ID_NONE, .enable_val = EXYNOS5_PHY_ENABLE, - .enable_reg = EXYNOS5433_MIPI_PHY1_CONTROL, + .enable_reg = EXYNOS4_MIPI_PHY_CONTROL(1), .enable_map = EXYNOS_MIPI_REGMAP_PMU, .resetn_val = BIT(1), .resetn_reg = EXYNOS5433_SYSREG_CAM0_MIPI_DPHY_CON, @@ -200,7 +200,7 @@ static const struct mipi_phy_device_desc exynos5433_mipi_phy = { /* EXYNOS_MIPI_PHY_ID_DSIM1 */ .coupled_phy_id = EXYNOS_MIPI_PHY_ID_NONE, .enable_val = EXYNOS5_PHY_ENABLE, - .enable_reg = EXYNOS5433_MIPI_PHY1_CONTROL, + .enable_reg = EXYNOS4_MIPI_PHY_CONTROL(1), .enable_map = EXYNOS_MIPI_REGMAP_PMU, .resetn_val = BIT(1), .resetn_reg = EXYNOS5433_SYSREG_DISP_MIPI_PHY, @@ -209,7 +209,7 @@ static const struct mipi_phy_device_desc exynos5433_mipi_phy = { /* EXYNOS_MIPI_PHY_ID_CSIS2 */ .coupled_phy_id = EXYNOS_MIPI_PHY_ID_NONE, .enable_val = EXYNOS5_PHY_ENABLE, - .enable_reg = EXYNOS5433_MIPI_PHY2_CONTROL, + .enable_reg = EXYNOS4_MIPI_PHY_CONTROL(2), .enable_map = EXYNOS_MIPI_REGMAP_PMU, .resetn_val = BIT(0), .resetn_reg = EXYNOS5433_SYSREG_CAM1_MIPI_DPHY_CON, diff --git a/include/linux/mfd/syscon/exynos4-pmu.h b/include/linux/mfd/syscon/exynos4-pmu.h deleted file mode 100644 index 278b1b1549e9..000000000000 --- a/include/linux/mfd/syscon/exynos4-pmu.h +++ /dev/null @@ -1,21 +0,0 @@ -/* - * Copyright (C) 2015 Samsung Electronics Co., Ltd. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef _LINUX_MFD_SYSCON_PMU_EXYNOS4_H_ -#define _LINUX_MFD_SYSCON_PMU_EXYNOS4_H_ - -/* Exynos4 PMU register definitions */ - -/* MIPI_PHYn_CONTROL register offset: n = 0..1 */ -#define EXYNOS4_MIPI_PHY_CONTROL(n) (0x710 + (n) * 4) -#define EXYNOS4_MIPI_PHY_ENABLE (1 << 0) -#define EXYNOS4_MIPI_PHY_SRESETN (1 << 1) -#define EXYNOS4_MIPI_PHY_MRESETN (1 << 2) -#define EXYNOS4_MIPI_PHY_RESET_MASK (3 << 1) - -#endif /* _LINUX_MFD_SYSCON_PMU_EXYNOS4_H_ */ diff --git a/include/linux/mfd/syscon/exynos5-pmu.h b/include/linux/mfd/syscon/exynos5-pmu.h index 0622ae86f9db..02af8dece914 100644 --- a/include/linux/mfd/syscon/exynos5-pmu.h +++ b/include/linux/mfd/syscon/exynos5-pmu.h @@ -38,9 +38,6 @@ /* Exynos5433 specific register definitions */ #define EXYNOS5433_USBHOST30_PHY_CONTROL (0x728) -#define EXYNOS5433_MIPI_PHY0_CONTROL (0x710) -#define EXYNOS5433_MIPI_PHY1_CONTROL (0x714) -#define EXYNOS5433_MIPI_PHY2_CONTROL (0x718) #define EXYNOS5_PHY_ENABLE BIT(0) #define EXYNOS5_MIPI_PHY_S_RESETN BIT(1) diff --git a/include/linux/soc/samsung/exynos-regs-pmu.h b/include/linux/soc/samsung/exynos-regs-pmu.h index 6a6529c96442..637ead0efd36 100644 --- a/include/linux/soc/samsung/exynos-regs-pmu.h +++ b/include/linux/soc/samsung/exynos-regs-pmu.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2010-2012 Samsung Electronics Co., Ltd. + * Copyright (c) 2010-2015 Samsung Electronics Co., Ltd. * http://www.samsung.com * * EXYNOS - Power management unit definition @@ -50,6 +50,13 @@ #define S5P_WAKEUP_MASK 0x0608 #define S5P_WAKEUP_MASK2 0x0614 +/* MIPI_PHYn_CONTROL, valid for Exynos3250, Exynos4, Exynos5250 and Exynos5433 */ +#define EXYNOS4_MIPI_PHY_CONTROL(n) (0x0710 + (n) * 4) +#define EXYNOS4_MIPI_PHY_ENABLE (1 << 0) +#define EXYNOS4_MIPI_PHY_SRESETN (1 << 1) +#define EXYNOS4_MIPI_PHY_MRESETN (1 << 2) +#define EXYNOS4_MIPI_PHY_RESET_MASK (3 << 1) + #define S5P_INFORM0 0x0800 #define S5P_INFORM1 0x0804 #define S5P_INFORM5 0x0814 -- 2.9.3 ^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH 1/4] phy: exynos4: Remove duplicated defines of PHY register defines 2017-01-27 20:05 ` [PATCH 1/4] phy: exynos4: Remove duplicated defines of PHY register defines Krzysztof Kozlowski @ 2017-02-08 11:58 ` Lee Jones 0 siblings, 0 replies; 10+ messages in thread From: Lee Jones @ 2017-02-08 11:58 UTC (permalink / raw) To: linux-arm-kernel On Fri, 27 Jan 2017, Krzysztof Kozlowski wrote: > Phy drivers access PMU region through regmap provided by exynos-pmu > driver. However there is no need to duplicate defines for PMU > registers. Instead just use whatever is defined in exynos-regs-pmu.h. > > Additionally MIPI PHY registers for Exynos5433 start from the same > address as Exynos4 and Exynos5250 so re-use existing defines. > > This reduces number of defines and allows removal of one header file. > > Suggested-by: Marek Szyprowski <m.szyprowski@samsung.com> > Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> > --- > drivers/phy/phy-exynos-mipi-video.c | 12 ++++++------ > include/linux/mfd/syscon/exynos4-pmu.h | 21 --------------------- > include/linux/mfd/syscon/exynos5-pmu.h | 3 --- Love that diff! Acked-by: Lee Jones <lee.jones@linaro.org> > include/linux/soc/samsung/exynos-regs-pmu.h | 9 ++++++++- > 4 files changed, 14 insertions(+), 31 deletions(-) > delete mode 100644 include/linux/mfd/syscon/exynos4-pmu.h > > diff --git a/drivers/phy/phy-exynos-mipi-video.c b/drivers/phy/phy-exynos-mipi-video.c > index 6bee04cc4d53..d7fe1f8c3ac8 100644 > --- a/drivers/phy/phy-exynos-mipi-video.c > +++ b/drivers/phy/phy-exynos-mipi-video.c > @@ -12,7 +12,6 @@ > #include <linux/err.h> > #include <linux/io.h> > #include <linux/kernel.h> > -#include <linux/mfd/syscon/exynos4-pmu.h> > #include <linux/mfd/syscon/exynos5-pmu.h> > #include <linux/module.h> > #include <linux/of.h> > @@ -21,6 +20,7 @@ > #include <linux/phy/phy.h> > #include <linux/regmap.h> > #include <linux/spinlock.h> > +#include <linux/soc/samsung/exynos-regs-pmu.h> > #include <linux/mfd/syscon.h> > > enum exynos_mipi_phy_id { > @@ -173,7 +173,7 @@ static const struct mipi_phy_device_desc exynos5433_mipi_phy = { > /* EXYNOS_MIPI_PHY_ID_CSIS0 */ > .coupled_phy_id = EXYNOS_MIPI_PHY_ID_DSIM0, > .enable_val = EXYNOS5_PHY_ENABLE, > - .enable_reg = EXYNOS5433_MIPI_PHY0_CONTROL, > + .enable_reg = EXYNOS4_MIPI_PHY_CONTROL(0), > .enable_map = EXYNOS_MIPI_REGMAP_PMU, > .resetn_val = BIT(0), > .resetn_reg = EXYNOS5433_SYSREG_CAM0_MIPI_DPHY_CON, > @@ -182,7 +182,7 @@ static const struct mipi_phy_device_desc exynos5433_mipi_phy = { > /* EXYNOS_MIPI_PHY_ID_DSIM0 */ > .coupled_phy_id = EXYNOS_MIPI_PHY_ID_CSIS0, > .enable_val = EXYNOS5_PHY_ENABLE, > - .enable_reg = EXYNOS5433_MIPI_PHY0_CONTROL, > + .enable_reg = EXYNOS4_MIPI_PHY_CONTROL(0), > .enable_map = EXYNOS_MIPI_REGMAP_PMU, > .resetn_val = BIT(0), > .resetn_reg = EXYNOS5433_SYSREG_DISP_MIPI_PHY, > @@ -191,7 +191,7 @@ static const struct mipi_phy_device_desc exynos5433_mipi_phy = { > /* EXYNOS_MIPI_PHY_ID_CSIS1 */ > .coupled_phy_id = EXYNOS_MIPI_PHY_ID_NONE, > .enable_val = EXYNOS5_PHY_ENABLE, > - .enable_reg = EXYNOS5433_MIPI_PHY1_CONTROL, > + .enable_reg = EXYNOS4_MIPI_PHY_CONTROL(1), > .enable_map = EXYNOS_MIPI_REGMAP_PMU, > .resetn_val = BIT(1), > .resetn_reg = EXYNOS5433_SYSREG_CAM0_MIPI_DPHY_CON, > @@ -200,7 +200,7 @@ static const struct mipi_phy_device_desc exynos5433_mipi_phy = { > /* EXYNOS_MIPI_PHY_ID_DSIM1 */ > .coupled_phy_id = EXYNOS_MIPI_PHY_ID_NONE, > .enable_val = EXYNOS5_PHY_ENABLE, > - .enable_reg = EXYNOS5433_MIPI_PHY1_CONTROL, > + .enable_reg = EXYNOS4_MIPI_PHY_CONTROL(1), > .enable_map = EXYNOS_MIPI_REGMAP_PMU, > .resetn_val = BIT(1), > .resetn_reg = EXYNOS5433_SYSREG_DISP_MIPI_PHY, > @@ -209,7 +209,7 @@ static const struct mipi_phy_device_desc exynos5433_mipi_phy = { > /* EXYNOS_MIPI_PHY_ID_CSIS2 */ > .coupled_phy_id = EXYNOS_MIPI_PHY_ID_NONE, > .enable_val = EXYNOS5_PHY_ENABLE, > - .enable_reg = EXYNOS5433_MIPI_PHY2_CONTROL, > + .enable_reg = EXYNOS4_MIPI_PHY_CONTROL(2), > .enable_map = EXYNOS_MIPI_REGMAP_PMU, > .resetn_val = BIT(0), > .resetn_reg = EXYNOS5433_SYSREG_CAM1_MIPI_DPHY_CON, > diff --git a/include/linux/mfd/syscon/exynos4-pmu.h b/include/linux/mfd/syscon/exynos4-pmu.h > deleted file mode 100644 > index 278b1b1549e9..000000000000 > --- a/include/linux/mfd/syscon/exynos4-pmu.h > +++ /dev/null > @@ -1,21 +0,0 @@ > -/* > - * Copyright (C) 2015 Samsung Electronics Co., Ltd. > - * > - * This program is free software; you can redistribute it and/or modify > - * it under the terms of the GNU General Public License version 2 as > - * published by the Free Software Foundation. > - */ > - > -#ifndef _LINUX_MFD_SYSCON_PMU_EXYNOS4_H_ > -#define _LINUX_MFD_SYSCON_PMU_EXYNOS4_H_ > - > -/* Exynos4 PMU register definitions */ > - > -/* MIPI_PHYn_CONTROL register offset: n = 0..1 */ > -#define EXYNOS4_MIPI_PHY_CONTROL(n) (0x710 + (n) * 4) > -#define EXYNOS4_MIPI_PHY_ENABLE (1 << 0) > -#define EXYNOS4_MIPI_PHY_SRESETN (1 << 1) > -#define EXYNOS4_MIPI_PHY_MRESETN (1 << 2) > -#define EXYNOS4_MIPI_PHY_RESET_MASK (3 << 1) > - > -#endif /* _LINUX_MFD_SYSCON_PMU_EXYNOS4_H_ */ > diff --git a/include/linux/mfd/syscon/exynos5-pmu.h b/include/linux/mfd/syscon/exynos5-pmu.h > index 0622ae86f9db..02af8dece914 100644 > --- a/include/linux/mfd/syscon/exynos5-pmu.h > +++ b/include/linux/mfd/syscon/exynos5-pmu.h > @@ -38,9 +38,6 @@ > > /* Exynos5433 specific register definitions */ > #define EXYNOS5433_USBHOST30_PHY_CONTROL (0x728) > -#define EXYNOS5433_MIPI_PHY0_CONTROL (0x710) > -#define EXYNOS5433_MIPI_PHY1_CONTROL (0x714) > -#define EXYNOS5433_MIPI_PHY2_CONTROL (0x718) > > #define EXYNOS5_PHY_ENABLE BIT(0) > #define EXYNOS5_MIPI_PHY_S_RESETN BIT(1) > diff --git a/include/linux/soc/samsung/exynos-regs-pmu.h b/include/linux/soc/samsung/exynos-regs-pmu.h > index 6a6529c96442..637ead0efd36 100644 > --- a/include/linux/soc/samsung/exynos-regs-pmu.h > +++ b/include/linux/soc/samsung/exynos-regs-pmu.h > @@ -1,5 +1,5 @@ > /* > - * Copyright (c) 2010-2012 Samsung Electronics Co., Ltd. > + * Copyright (c) 2010-2015 Samsung Electronics Co., Ltd. > * http://www.samsung.com > * > * EXYNOS - Power management unit definition > @@ -50,6 +50,13 @@ > #define S5P_WAKEUP_MASK 0x0608 > #define S5P_WAKEUP_MASK2 0x0614 > > +/* MIPI_PHYn_CONTROL, valid for Exynos3250, Exynos4, Exynos5250 and Exynos5433 */ > +#define EXYNOS4_MIPI_PHY_CONTROL(n) (0x0710 + (n) * 4) > +#define EXYNOS4_MIPI_PHY_ENABLE (1 << 0) > +#define EXYNOS4_MIPI_PHY_SRESETN (1 << 1) > +#define EXYNOS4_MIPI_PHY_MRESETN (1 << 2) > +#define EXYNOS4_MIPI_PHY_RESET_MASK (3 << 1) > + > #define S5P_INFORM0 0x0800 > #define S5P_INFORM1 0x0804 > #define S5P_INFORM5 0x0814 -- Lee Jones Linaro STMicroelectronics Landing Team Lead Linaro.org ? Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog ^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH 2/4] phy: exynos5: Remove duplicated defines of PHY register defines 2017-01-27 20:05 [PATCH 0/4] phy/mfd/soc: exynos: Header cleanup Krzysztof Kozlowski 2017-01-27 20:05 ` [PATCH 1/4] phy: exynos4: Remove duplicated defines of PHY register defines Krzysztof Kozlowski @ 2017-01-27 20:05 ` Krzysztof Kozlowski 2017-02-08 11:59 ` Lee Jones 2017-01-27 20:05 ` [PATCH 3/4] phy: exynos-mipi-video: Use consistent method to address phy registers Krzysztof Kozlowski ` (2 subsequent siblings) 4 siblings, 1 reply; 10+ messages in thread From: Krzysztof Kozlowski @ 2017-01-27 20:05 UTC (permalink / raw) To: linux-arm-kernel Phy drivers access PMU region through regmap provided by exynos-pmu driver. However there is no need to duplicate defines for PMU registers. Instead just use whatever is defined in exynos-regs-pmu.h. This reduces number of defines and allows removal of one header. Suggested-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> --- drivers/phy/phy-exynos-dp-video.c | 1 + drivers/phy/phy-exynos5-usbdrd.c | 1 + include/linux/mfd/syscon/exynos5-pmu.h | 22 ---------------------- include/linux/soc/samsung/exynos-regs-pmu.h | 8 ++++++++ 4 files changed, 10 insertions(+), 22 deletions(-) diff --git a/drivers/phy/phy-exynos-dp-video.c b/drivers/phy/phy-exynos-dp-video.c index 34b06154e5d9..d72193188980 100644 --- a/drivers/phy/phy-exynos-dp-video.c +++ b/drivers/phy/phy-exynos-dp-video.c @@ -20,6 +20,7 @@ #include <linux/phy/phy.h> #include <linux/platform_device.h> #include <linux/regmap.h> +#include <linux/soc/samsung/exynos-regs-pmu.h> struct exynos_dp_video_phy_drvdata { u32 phy_ctrl_offset; diff --git a/drivers/phy/phy-exynos5-usbdrd.c b/drivers/phy/phy-exynos5-usbdrd.c index 07ed608905ac..7c896d0cda18 100644 --- a/drivers/phy/phy-exynos5-usbdrd.c +++ b/drivers/phy/phy-exynos5-usbdrd.c @@ -25,6 +25,7 @@ #include <linux/mfd/syscon/exynos5-pmu.h> #include <linux/regmap.h> #include <linux/regulator/consumer.h> +#include <linux/soc/samsung/exynos-regs-pmu.h> /* Exynos USB PHY registers */ #define EXYNOS5_FSEL_9MHZ6 0x0 diff --git a/include/linux/mfd/syscon/exynos5-pmu.h b/include/linux/mfd/syscon/exynos5-pmu.h index 02af8dece914..6108857ffcca 100644 --- a/include/linux/mfd/syscon/exynos5-pmu.h +++ b/include/linux/mfd/syscon/exynos5-pmu.h @@ -13,34 +13,12 @@ #define _LINUX_MFD_SYSCON_PMU_EXYNOS5_H_ /* Exynos5 PMU register definitions */ -#define EXYNOS5_HDMI_PHY_CONTROL (0x700) -#define EXYNOS5_USBDRD_PHY_CONTROL (0x704) /* Exynos5250 specific register definitions */ -#define EXYNOS5_USBHOST_PHY_CONTROL (0x708) -#define EXYNOS5_EFNAND_PHY_CONTROL (0x70c) -#define EXYNOS5_MIPI_PHY0_CONTROL (0x710) -#define EXYNOS5_MIPI_PHY1_CONTROL (0x714) -#define EXYNOS5_ADC_PHY_CONTROL (0x718) -#define EXYNOS5_MTCADC_PHY_CONTROL (0x71c) -#define EXYNOS5_DPTX_PHY_CONTROL (0x720) -#define EXYNOS5_SATA_PHY_CONTROL (0x724) /* Exynos5420 specific register definitions */ -#define EXYNOS5420_USBDRD1_PHY_CONTROL (0x708) -#define EXYNOS5420_USBHOST_PHY_CONTROL (0x70c) -#define EXYNOS5420_MIPI_PHY0_CONTROL (0x714) -#define EXYNOS5420_MIPI_PHY1_CONTROL (0x718) -#define EXYNOS5420_MIPI_PHY2_CONTROL (0x71c) -#define EXYNOS5420_ADC_PHY_CONTROL (0x720) -#define EXYNOS5420_MTCADC_PHY_CONTROL (0x724) -#define EXYNOS5420_DPTX_PHY_CONTROL (0x728) - -/* Exynos5433 specific register definitions */ -#define EXYNOS5433_USBHOST30_PHY_CONTROL (0x728) #define EXYNOS5_PHY_ENABLE BIT(0) #define EXYNOS5_MIPI_PHY_S_RESETN BIT(1) #define EXYNOS5_MIPI_PHY_M_RESETN BIT(2) - #endif /* _LINUX_MFD_SYSCON_PMU_EXYNOS5_H_ */ diff --git a/include/linux/soc/samsung/exynos-regs-pmu.h b/include/linux/soc/samsung/exynos-regs-pmu.h index 637ead0efd36..d861e757bef8 100644 --- a/include/linux/soc/samsung/exynos-regs-pmu.h +++ b/include/linux/soc/samsung/exynos-regs-pmu.h @@ -349,6 +349,8 @@ #define EXYNOS5_AUTO_WDTRESET_DISABLE 0x0408 #define EXYNOS5_MASK_WDTRESET_REQUEST 0x040C +#define EXYNOS5_USBDRD_PHY_CONTROL 0x0704 +#define EXYNOS5_DPTX_PHY_CONTROL 0x0720 #define EXYNOS5_USE_RETENTION BIT(4) #define EXYNOS5_SYS_WDTRESET (1 << 20) @@ -502,6 +504,11 @@ #define EXYNOS5420_KFC_CORE_RESET(_nr) \ ((EXYNOS5420_KFC_CORE_RESET0 | EXYNOS5420_KFC_ETM_RESET0) << (_nr)) +#define EXYNOS5420_USBDRD1_PHY_CONTROL 0x0708 +#define EXYNOS5420_MIPI_PHY0_CONTROL 0x0714 +#define EXYNOS5420_MIPI_PHY1_CONTROL 0x0718 +#define EXYNOS5420_MIPI_PHY2_CONTROL 0x071C +#define EXYNOS5420_DPTX_PHY_CONTROL 0x0728 #define EXYNOS5420_ARM_CORE2_SYS_PWR_REG 0x1020 #define EXYNOS5420_DIS_IRQ_ARM_CORE2_LOCAL_SYS_PWR_REG 0x1024 #define EXYNOS5420_DIS_IRQ_ARM_CORE2_CENTRAL_SYS_PWR_REG 0x1028 @@ -639,6 +646,7 @@ | EXYNOS5420_KFC_USE_STANDBY_WFI3) /* For EXYNOS5433 */ +#define EXYNOS5433_USBHOST30_PHY_CONTROL (0x0728) #define EXYNOS5433_PAD_RETENTION_AUD_OPTION (0x3028) #define EXYNOS5433_PAD_RETENTION_MMC2_OPTION (0x30C8) #define EXYNOS5433_PAD_RETENTION_TOP_OPTION (0x3108) -- 2.9.3 ^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH 2/4] phy: exynos5: Remove duplicated defines of PHY register defines 2017-01-27 20:05 ` [PATCH 2/4] phy: exynos5: " Krzysztof Kozlowski @ 2017-02-08 11:59 ` Lee Jones 0 siblings, 0 replies; 10+ messages in thread From: Lee Jones @ 2017-02-08 11:59 UTC (permalink / raw) To: linux-arm-kernel On Fri, 27 Jan 2017, Krzysztof Kozlowski wrote: > Phy drivers access PMU region through regmap provided by exynos-pmu > driver. However there is no need to duplicate defines for PMU > registers. Instead just use whatever is defined in exynos-regs-pmu.h. > > This reduces number of defines and allows removal of one header. > > Suggested-by: Marek Szyprowski <m.szyprowski@samsung.com> > Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> > --- > drivers/phy/phy-exynos-dp-video.c | 1 + > drivers/phy/phy-exynos5-usbdrd.c | 1 + > include/linux/mfd/syscon/exynos5-pmu.h | 22 ---------------------- Acked-by: Lee Jones <lee.jones@linaro.org> > include/linux/soc/samsung/exynos-regs-pmu.h | 8 ++++++++ > 4 files changed, 10 insertions(+), 22 deletions(-) > > diff --git a/drivers/phy/phy-exynos-dp-video.c b/drivers/phy/phy-exynos-dp-video.c > index 34b06154e5d9..d72193188980 100644 > --- a/drivers/phy/phy-exynos-dp-video.c > +++ b/drivers/phy/phy-exynos-dp-video.c > @@ -20,6 +20,7 @@ > #include <linux/phy/phy.h> > #include <linux/platform_device.h> > #include <linux/regmap.h> > +#include <linux/soc/samsung/exynos-regs-pmu.h> > > struct exynos_dp_video_phy_drvdata { > u32 phy_ctrl_offset; > diff --git a/drivers/phy/phy-exynos5-usbdrd.c b/drivers/phy/phy-exynos5-usbdrd.c > index 07ed608905ac..7c896d0cda18 100644 > --- a/drivers/phy/phy-exynos5-usbdrd.c > +++ b/drivers/phy/phy-exynos5-usbdrd.c > @@ -25,6 +25,7 @@ > #include <linux/mfd/syscon/exynos5-pmu.h> > #include <linux/regmap.h> > #include <linux/regulator/consumer.h> > +#include <linux/soc/samsung/exynos-regs-pmu.h> > > /* Exynos USB PHY registers */ > #define EXYNOS5_FSEL_9MHZ6 0x0 > diff --git a/include/linux/mfd/syscon/exynos5-pmu.h b/include/linux/mfd/syscon/exynos5-pmu.h > index 02af8dece914..6108857ffcca 100644 > --- a/include/linux/mfd/syscon/exynos5-pmu.h > +++ b/include/linux/mfd/syscon/exynos5-pmu.h > @@ -13,34 +13,12 @@ > #define _LINUX_MFD_SYSCON_PMU_EXYNOS5_H_ > > /* Exynos5 PMU register definitions */ > -#define EXYNOS5_HDMI_PHY_CONTROL (0x700) > -#define EXYNOS5_USBDRD_PHY_CONTROL (0x704) > > /* Exynos5250 specific register definitions */ > -#define EXYNOS5_USBHOST_PHY_CONTROL (0x708) > -#define EXYNOS5_EFNAND_PHY_CONTROL (0x70c) > -#define EXYNOS5_MIPI_PHY0_CONTROL (0x710) > -#define EXYNOS5_MIPI_PHY1_CONTROL (0x714) > -#define EXYNOS5_ADC_PHY_CONTROL (0x718) > -#define EXYNOS5_MTCADC_PHY_CONTROL (0x71c) > -#define EXYNOS5_DPTX_PHY_CONTROL (0x720) > -#define EXYNOS5_SATA_PHY_CONTROL (0x724) > > /* Exynos5420 specific register definitions */ > -#define EXYNOS5420_USBDRD1_PHY_CONTROL (0x708) > -#define EXYNOS5420_USBHOST_PHY_CONTROL (0x70c) > -#define EXYNOS5420_MIPI_PHY0_CONTROL (0x714) > -#define EXYNOS5420_MIPI_PHY1_CONTROL (0x718) > -#define EXYNOS5420_MIPI_PHY2_CONTROL (0x71c) > -#define EXYNOS5420_ADC_PHY_CONTROL (0x720) > -#define EXYNOS5420_MTCADC_PHY_CONTROL (0x724) > -#define EXYNOS5420_DPTX_PHY_CONTROL (0x728) > - > -/* Exynos5433 specific register definitions */ > -#define EXYNOS5433_USBHOST30_PHY_CONTROL (0x728) > > #define EXYNOS5_PHY_ENABLE BIT(0) > #define EXYNOS5_MIPI_PHY_S_RESETN BIT(1) > #define EXYNOS5_MIPI_PHY_M_RESETN BIT(2) > - > #endif /* _LINUX_MFD_SYSCON_PMU_EXYNOS5_H_ */ > diff --git a/include/linux/soc/samsung/exynos-regs-pmu.h b/include/linux/soc/samsung/exynos-regs-pmu.h > index 637ead0efd36..d861e757bef8 100644 > --- a/include/linux/soc/samsung/exynos-regs-pmu.h > +++ b/include/linux/soc/samsung/exynos-regs-pmu.h > @@ -349,6 +349,8 @@ > > #define EXYNOS5_AUTO_WDTRESET_DISABLE 0x0408 > #define EXYNOS5_MASK_WDTRESET_REQUEST 0x040C > +#define EXYNOS5_USBDRD_PHY_CONTROL 0x0704 > +#define EXYNOS5_DPTX_PHY_CONTROL 0x0720 > > #define EXYNOS5_USE_RETENTION BIT(4) > #define EXYNOS5_SYS_WDTRESET (1 << 20) > @@ -502,6 +504,11 @@ > #define EXYNOS5420_KFC_CORE_RESET(_nr) \ > ((EXYNOS5420_KFC_CORE_RESET0 | EXYNOS5420_KFC_ETM_RESET0) << (_nr)) > > +#define EXYNOS5420_USBDRD1_PHY_CONTROL 0x0708 > +#define EXYNOS5420_MIPI_PHY0_CONTROL 0x0714 > +#define EXYNOS5420_MIPI_PHY1_CONTROL 0x0718 > +#define EXYNOS5420_MIPI_PHY2_CONTROL 0x071C > +#define EXYNOS5420_DPTX_PHY_CONTROL 0x0728 > #define EXYNOS5420_ARM_CORE2_SYS_PWR_REG 0x1020 > #define EXYNOS5420_DIS_IRQ_ARM_CORE2_LOCAL_SYS_PWR_REG 0x1024 > #define EXYNOS5420_DIS_IRQ_ARM_CORE2_CENTRAL_SYS_PWR_REG 0x1028 > @@ -639,6 +646,7 @@ > | EXYNOS5420_KFC_USE_STANDBY_WFI3) > > /* For EXYNOS5433 */ > +#define EXYNOS5433_USBHOST30_PHY_CONTROL (0x0728) > #define EXYNOS5433_PAD_RETENTION_AUD_OPTION (0x3028) > #define EXYNOS5433_PAD_RETENTION_MMC2_OPTION (0x30C8) > #define EXYNOS5433_PAD_RETENTION_TOP_OPTION (0x3108) -- Lee Jones Linaro STMicroelectronics Landing Team Lead Linaro.org ? Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog ^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH 3/4] phy: exynos-mipi-video: Use consistent method to address phy registers 2017-01-27 20:05 [PATCH 0/4] phy/mfd/soc: exynos: Header cleanup Krzysztof Kozlowski 2017-01-27 20:05 ` [PATCH 1/4] phy: exynos4: Remove duplicated defines of PHY register defines Krzysztof Kozlowski 2017-01-27 20:05 ` [PATCH 2/4] phy: exynos5: " Krzysztof Kozlowski @ 2017-01-27 20:05 ` Krzysztof Kozlowski 2017-01-27 20:05 ` [PATCH 4/4] phy: exynos: Use one define for enable bit Krzysztof Kozlowski 2017-01-30 9:13 ` [PATCH 0/4] phy/mfd/soc: exynos: Header cleanup Kishon Vijay Abraham I 4 siblings, 0 replies; 10+ messages in thread From: Krzysztof Kozlowski @ 2017-01-27 20:05 UTC (permalink / raw) To: linux-arm-kernel Exynos4 MIPI phy registers are defined with macro calculating the offset for given phyN. Use the same method for Exynos5420 to be consistent. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> --- drivers/phy/phy-exynos-mipi-video.c | 20 ++++++++++---------- include/linux/soc/samsung/exynos-regs-pmu.h | 4 +--- 2 files changed, 11 insertions(+), 13 deletions(-) diff --git a/drivers/phy/phy-exynos-mipi-video.c b/drivers/phy/phy-exynos-mipi-video.c index d7fe1f8c3ac8..acef1d92691e 100644 --- a/drivers/phy/phy-exynos-mipi-video.c +++ b/drivers/phy/phy-exynos-mipi-video.c @@ -110,46 +110,46 @@ static const struct mipi_phy_device_desc exynos5420_mipi_phy = { /* EXYNOS_MIPI_PHY_ID_CSIS0 */ .coupled_phy_id = EXYNOS_MIPI_PHY_ID_DSIM0, .enable_val = EXYNOS5_PHY_ENABLE, - .enable_reg = EXYNOS5420_MIPI_PHY0_CONTROL, + .enable_reg = EXYNOS5420_MIPI_PHY_CONTROL(0), .enable_map = EXYNOS_MIPI_REGMAP_PMU, .resetn_val = EXYNOS5_MIPI_PHY_S_RESETN, - .resetn_reg = EXYNOS5420_MIPI_PHY0_CONTROL, + .resetn_reg = EXYNOS5420_MIPI_PHY_CONTROL(0), .resetn_map = EXYNOS_MIPI_REGMAP_PMU, }, { /* EXYNOS_MIPI_PHY_ID_DSIM0 */ .coupled_phy_id = EXYNOS_MIPI_PHY_ID_CSIS0, .enable_val = EXYNOS5_PHY_ENABLE, - .enable_reg = EXYNOS5420_MIPI_PHY0_CONTROL, + .enable_reg = EXYNOS5420_MIPI_PHY_CONTROL(0), .enable_map = EXYNOS_MIPI_REGMAP_PMU, .resetn_val = EXYNOS5_MIPI_PHY_M_RESETN, - .resetn_reg = EXYNOS5420_MIPI_PHY0_CONTROL, + .resetn_reg = EXYNOS5420_MIPI_PHY_CONTROL(0), .resetn_map = EXYNOS_MIPI_REGMAP_PMU, }, { /* EXYNOS_MIPI_PHY_ID_CSIS1 */ .coupled_phy_id = EXYNOS_MIPI_PHY_ID_DSIM1, .enable_val = EXYNOS5_PHY_ENABLE, - .enable_reg = EXYNOS5420_MIPI_PHY1_CONTROL, + .enable_reg = EXYNOS5420_MIPI_PHY_CONTROL(1), .enable_map = EXYNOS_MIPI_REGMAP_PMU, .resetn_val = EXYNOS5_MIPI_PHY_S_RESETN, - .resetn_reg = EXYNOS5420_MIPI_PHY1_CONTROL, + .resetn_reg = EXYNOS5420_MIPI_PHY_CONTROL(1), .resetn_map = EXYNOS_MIPI_REGMAP_PMU, }, { /* EXYNOS_MIPI_PHY_ID_DSIM1 */ .coupled_phy_id = EXYNOS_MIPI_PHY_ID_CSIS1, .enable_val = EXYNOS5_PHY_ENABLE, - .enable_reg = EXYNOS5420_MIPI_PHY1_CONTROL, + .enable_reg = EXYNOS5420_MIPI_PHY_CONTROL(1), .enable_map = EXYNOS_MIPI_REGMAP_PMU, .resetn_val = EXYNOS5_MIPI_PHY_M_RESETN, - .resetn_reg = EXYNOS5420_MIPI_PHY1_CONTROL, + .resetn_reg = EXYNOS5420_MIPI_PHY_CONTROL(1), .resetn_map = EXYNOS_MIPI_REGMAP_PMU, }, { /* EXYNOS_MIPI_PHY_ID_CSIS2 */ .coupled_phy_id = EXYNOS_MIPI_PHY_ID_NONE, .enable_val = EXYNOS5_PHY_ENABLE, - .enable_reg = EXYNOS5420_MIPI_PHY2_CONTROL, + .enable_reg = EXYNOS5420_MIPI_PHY_CONTROL(2), .enable_map = EXYNOS_MIPI_REGMAP_PMU, .resetn_val = EXYNOS5_MIPI_PHY_S_RESETN, - .resetn_reg = EXYNOS5420_MIPI_PHY2_CONTROL, + .resetn_reg = EXYNOS5420_MIPI_PHY_CONTROL(2), .resetn_map = EXYNOS_MIPI_REGMAP_PMU, }, }, diff --git a/include/linux/soc/samsung/exynos-regs-pmu.h b/include/linux/soc/samsung/exynos-regs-pmu.h index d861e757bef8..6dbd65012ccd 100644 --- a/include/linux/soc/samsung/exynos-regs-pmu.h +++ b/include/linux/soc/samsung/exynos-regs-pmu.h @@ -505,9 +505,7 @@ ((EXYNOS5420_KFC_CORE_RESET0 | EXYNOS5420_KFC_ETM_RESET0) << (_nr)) #define EXYNOS5420_USBDRD1_PHY_CONTROL 0x0708 -#define EXYNOS5420_MIPI_PHY0_CONTROL 0x0714 -#define EXYNOS5420_MIPI_PHY1_CONTROL 0x0718 -#define EXYNOS5420_MIPI_PHY2_CONTROL 0x071C +#define EXYNOS5420_MIPI_PHY_CONTROL(n) (0x0714 + (n) * 4) #define EXYNOS5420_DPTX_PHY_CONTROL 0x0728 #define EXYNOS5420_ARM_CORE2_SYS_PWR_REG 0x1020 #define EXYNOS5420_DIS_IRQ_ARM_CORE2_LOCAL_SYS_PWR_REG 0x1024 -- 2.9.3 ^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH 4/4] phy: exynos: Use one define for enable bit 2017-01-27 20:05 [PATCH 0/4] phy/mfd/soc: exynos: Header cleanup Krzysztof Kozlowski ` (2 preceding siblings ...) 2017-01-27 20:05 ` [PATCH 3/4] phy: exynos-mipi-video: Use consistent method to address phy registers Krzysztof Kozlowski @ 2017-01-27 20:05 ` Krzysztof Kozlowski 2017-02-08 11:59 ` Lee Jones 2017-01-30 9:13 ` [PATCH 0/4] phy/mfd/soc: exynos: Header cleanup Kishon Vijay Abraham I 4 siblings, 1 reply; 10+ messages in thread From: Krzysztof Kozlowski @ 2017-01-27 20:05 UTC (permalink / raw) To: linux-arm-kernel There is no need for separate defines for Exynos4 and Exynos5 phy enable bit and MIPI phy reset bits. In both cases there are the same so simplify it. This reduces number of defines and allows removal of one header file. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> --- drivers/phy/phy-exynos-dp-video.c | 5 ++-- drivers/phy/phy-exynos-mipi-video.c | 39 ++++++++++++++--------------- drivers/phy/phy-exynos5-usbdrd.c | 5 ++-- include/linux/mfd/syscon/exynos5-pmu.h | 24 ------------------ include/linux/soc/samsung/exynos-regs-pmu.h | 3 ++- 5 files changed, 25 insertions(+), 51 deletions(-) delete mode 100644 include/linux/mfd/syscon/exynos5-pmu.h diff --git a/drivers/phy/phy-exynos-dp-video.c b/drivers/phy/phy-exynos-dp-video.c index d72193188980..bb3279dbf88c 100644 --- a/drivers/phy/phy-exynos-dp-video.c +++ b/drivers/phy/phy-exynos-dp-video.c @@ -14,7 +14,6 @@ #include <linux/kernel.h> #include <linux/module.h> #include <linux/mfd/syscon.h> -#include <linux/mfd/syscon/exynos5-pmu.h> #include <linux/of.h> #include <linux/of_address.h> #include <linux/phy/phy.h> @@ -37,7 +36,7 @@ static int exynos_dp_video_phy_power_on(struct phy *phy) /* Disable power isolation on DP-PHY */ return regmap_update_bits(state->regs, state->drvdata->phy_ctrl_offset, - EXYNOS5_PHY_ENABLE, EXYNOS5_PHY_ENABLE); + EXYNOS4_PHY_ENABLE, EXYNOS4_PHY_ENABLE); } static int exynos_dp_video_phy_power_off(struct phy *phy) @@ -46,7 +45,7 @@ static int exynos_dp_video_phy_power_off(struct phy *phy) /* Enable power isolation on DP-PHY */ return regmap_update_bits(state->regs, state->drvdata->phy_ctrl_offset, - EXYNOS5_PHY_ENABLE, 0); + EXYNOS4_PHY_ENABLE, 0); } static const struct phy_ops exynos_dp_video_phy_ops = { diff --git a/drivers/phy/phy-exynos-mipi-video.c b/drivers/phy/phy-exynos-mipi-video.c index acef1d92691e..c198886f80a3 100644 --- a/drivers/phy/phy-exynos-mipi-video.c +++ b/drivers/phy/phy-exynos-mipi-video.c @@ -12,7 +12,6 @@ #include <linux/err.h> #include <linux/io.h> #include <linux/kernel.h> -#include <linux/mfd/syscon/exynos5-pmu.h> #include <linux/module.h> #include <linux/of.h> #include <linux/of_address.h> @@ -64,7 +63,7 @@ static const struct mipi_phy_device_desc s5pv210_mipi_phy = { { /* EXYNOS_MIPI_PHY_ID_CSIS0 */ .coupled_phy_id = EXYNOS_MIPI_PHY_ID_DSIM0, - .enable_val = EXYNOS4_MIPI_PHY_ENABLE, + .enable_val = EXYNOS4_PHY_ENABLE, .enable_reg = EXYNOS4_MIPI_PHY_CONTROL(0), .enable_map = EXYNOS_MIPI_REGMAP_PMU, .resetn_val = EXYNOS4_MIPI_PHY_SRESETN, @@ -73,7 +72,7 @@ static const struct mipi_phy_device_desc s5pv210_mipi_phy = { }, { /* EXYNOS_MIPI_PHY_ID_DSIM0 */ .coupled_phy_id = EXYNOS_MIPI_PHY_ID_CSIS0, - .enable_val = EXYNOS4_MIPI_PHY_ENABLE, + .enable_val = EXYNOS4_PHY_ENABLE, .enable_reg = EXYNOS4_MIPI_PHY_CONTROL(0), .enable_map = EXYNOS_MIPI_REGMAP_PMU, .resetn_val = EXYNOS4_MIPI_PHY_MRESETN, @@ -82,7 +81,7 @@ static const struct mipi_phy_device_desc s5pv210_mipi_phy = { }, { /* EXYNOS_MIPI_PHY_ID_CSIS1 */ .coupled_phy_id = EXYNOS_MIPI_PHY_ID_DSIM1, - .enable_val = EXYNOS4_MIPI_PHY_ENABLE, + .enable_val = EXYNOS4_PHY_ENABLE, .enable_reg = EXYNOS4_MIPI_PHY_CONTROL(1), .enable_map = EXYNOS_MIPI_REGMAP_PMU, .resetn_val = EXYNOS4_MIPI_PHY_SRESETN, @@ -91,7 +90,7 @@ static const struct mipi_phy_device_desc s5pv210_mipi_phy = { }, { /* EXYNOS_MIPI_PHY_ID_DSIM1 */ .coupled_phy_id = EXYNOS_MIPI_PHY_ID_CSIS1, - .enable_val = EXYNOS4_MIPI_PHY_ENABLE, + .enable_val = EXYNOS4_PHY_ENABLE, .enable_reg = EXYNOS4_MIPI_PHY_CONTROL(1), .enable_map = EXYNOS_MIPI_REGMAP_PMU, .resetn_val = EXYNOS4_MIPI_PHY_MRESETN, @@ -109,46 +108,46 @@ static const struct mipi_phy_device_desc exynos5420_mipi_phy = { { /* EXYNOS_MIPI_PHY_ID_CSIS0 */ .coupled_phy_id = EXYNOS_MIPI_PHY_ID_DSIM0, - .enable_val = EXYNOS5_PHY_ENABLE, + .enable_val = EXYNOS4_PHY_ENABLE, .enable_reg = EXYNOS5420_MIPI_PHY_CONTROL(0), .enable_map = EXYNOS_MIPI_REGMAP_PMU, - .resetn_val = EXYNOS5_MIPI_PHY_S_RESETN, + .resetn_val = EXYNOS4_MIPI_PHY_SRESETN, .resetn_reg = EXYNOS5420_MIPI_PHY_CONTROL(0), .resetn_map = EXYNOS_MIPI_REGMAP_PMU, }, { /* EXYNOS_MIPI_PHY_ID_DSIM0 */ .coupled_phy_id = EXYNOS_MIPI_PHY_ID_CSIS0, - .enable_val = EXYNOS5_PHY_ENABLE, + .enable_val = EXYNOS4_PHY_ENABLE, .enable_reg = EXYNOS5420_MIPI_PHY_CONTROL(0), .enable_map = EXYNOS_MIPI_REGMAP_PMU, - .resetn_val = EXYNOS5_MIPI_PHY_M_RESETN, + .resetn_val = EXYNOS4_MIPI_PHY_MRESETN, .resetn_reg = EXYNOS5420_MIPI_PHY_CONTROL(0), .resetn_map = EXYNOS_MIPI_REGMAP_PMU, }, { /* EXYNOS_MIPI_PHY_ID_CSIS1 */ .coupled_phy_id = EXYNOS_MIPI_PHY_ID_DSIM1, - .enable_val = EXYNOS5_PHY_ENABLE, + .enable_val = EXYNOS4_PHY_ENABLE, .enable_reg = EXYNOS5420_MIPI_PHY_CONTROL(1), .enable_map = EXYNOS_MIPI_REGMAP_PMU, - .resetn_val = EXYNOS5_MIPI_PHY_S_RESETN, + .resetn_val = EXYNOS4_MIPI_PHY_SRESETN, .resetn_reg = EXYNOS5420_MIPI_PHY_CONTROL(1), .resetn_map = EXYNOS_MIPI_REGMAP_PMU, }, { /* EXYNOS_MIPI_PHY_ID_DSIM1 */ .coupled_phy_id = EXYNOS_MIPI_PHY_ID_CSIS1, - .enable_val = EXYNOS5_PHY_ENABLE, + .enable_val = EXYNOS4_PHY_ENABLE, .enable_reg = EXYNOS5420_MIPI_PHY_CONTROL(1), .enable_map = EXYNOS_MIPI_REGMAP_PMU, - .resetn_val = EXYNOS5_MIPI_PHY_M_RESETN, + .resetn_val = EXYNOS4_MIPI_PHY_MRESETN, .resetn_reg = EXYNOS5420_MIPI_PHY_CONTROL(1), .resetn_map = EXYNOS_MIPI_REGMAP_PMU, }, { /* EXYNOS_MIPI_PHY_ID_CSIS2 */ .coupled_phy_id = EXYNOS_MIPI_PHY_ID_NONE, - .enable_val = EXYNOS5_PHY_ENABLE, + .enable_val = EXYNOS4_PHY_ENABLE, .enable_reg = EXYNOS5420_MIPI_PHY_CONTROL(2), .enable_map = EXYNOS_MIPI_REGMAP_PMU, - .resetn_val = EXYNOS5_MIPI_PHY_S_RESETN, + .resetn_val = EXYNOS4_MIPI_PHY_SRESETN, .resetn_reg = EXYNOS5420_MIPI_PHY_CONTROL(2), .resetn_map = EXYNOS_MIPI_REGMAP_PMU, }, @@ -172,7 +171,7 @@ static const struct mipi_phy_device_desc exynos5433_mipi_phy = { { /* EXYNOS_MIPI_PHY_ID_CSIS0 */ .coupled_phy_id = EXYNOS_MIPI_PHY_ID_DSIM0, - .enable_val = EXYNOS5_PHY_ENABLE, + .enable_val = EXYNOS4_PHY_ENABLE, .enable_reg = EXYNOS4_MIPI_PHY_CONTROL(0), .enable_map = EXYNOS_MIPI_REGMAP_PMU, .resetn_val = BIT(0), @@ -181,7 +180,7 @@ static const struct mipi_phy_device_desc exynos5433_mipi_phy = { }, { /* EXYNOS_MIPI_PHY_ID_DSIM0 */ .coupled_phy_id = EXYNOS_MIPI_PHY_ID_CSIS0, - .enable_val = EXYNOS5_PHY_ENABLE, + .enable_val = EXYNOS4_PHY_ENABLE, .enable_reg = EXYNOS4_MIPI_PHY_CONTROL(0), .enable_map = EXYNOS_MIPI_REGMAP_PMU, .resetn_val = BIT(0), @@ -190,7 +189,7 @@ static const struct mipi_phy_device_desc exynos5433_mipi_phy = { }, { /* EXYNOS_MIPI_PHY_ID_CSIS1 */ .coupled_phy_id = EXYNOS_MIPI_PHY_ID_NONE, - .enable_val = EXYNOS5_PHY_ENABLE, + .enable_val = EXYNOS4_PHY_ENABLE, .enable_reg = EXYNOS4_MIPI_PHY_CONTROL(1), .enable_map = EXYNOS_MIPI_REGMAP_PMU, .resetn_val = BIT(1), @@ -199,7 +198,7 @@ static const struct mipi_phy_device_desc exynos5433_mipi_phy = { }, { /* EXYNOS_MIPI_PHY_ID_DSIM1 */ .coupled_phy_id = EXYNOS_MIPI_PHY_ID_NONE, - .enable_val = EXYNOS5_PHY_ENABLE, + .enable_val = EXYNOS4_PHY_ENABLE, .enable_reg = EXYNOS4_MIPI_PHY_CONTROL(1), .enable_map = EXYNOS_MIPI_REGMAP_PMU, .resetn_val = BIT(1), @@ -208,7 +207,7 @@ static const struct mipi_phy_device_desc exynos5433_mipi_phy = { }, { /* EXYNOS_MIPI_PHY_ID_CSIS2 */ .coupled_phy_id = EXYNOS_MIPI_PHY_ID_NONE, - .enable_val = EXYNOS5_PHY_ENABLE, + .enable_val = EXYNOS4_PHY_ENABLE, .enable_reg = EXYNOS4_MIPI_PHY_CONTROL(2), .enable_map = EXYNOS_MIPI_REGMAP_PMU, .resetn_val = BIT(0), diff --git a/drivers/phy/phy-exynos5-usbdrd.c b/drivers/phy/phy-exynos5-usbdrd.c index 7c896d0cda18..7c41daa2c625 100644 --- a/drivers/phy/phy-exynos5-usbdrd.c +++ b/drivers/phy/phy-exynos5-usbdrd.c @@ -22,7 +22,6 @@ #include <linux/platform_device.h> #include <linux/mutex.h> #include <linux/mfd/syscon.h> -#include <linux/mfd/syscon/exynos5-pmu.h> #include <linux/regmap.h> #include <linux/regulator/consumer.h> #include <linux/soc/samsung/exynos-regs-pmu.h> @@ -236,10 +235,10 @@ static void exynos5_usbdrd_phy_isol(struct phy_usb_instance *inst, if (!inst->reg_pmu) return; - val = on ? 0 : EXYNOS5_PHY_ENABLE; + val = on ? 0 : EXYNOS4_PHY_ENABLE; regmap_update_bits(inst->reg_pmu, inst->pmu_offset, - EXYNOS5_PHY_ENABLE, val); + EXYNOS4_PHY_ENABLE, val); } /* diff --git a/include/linux/mfd/syscon/exynos5-pmu.h b/include/linux/mfd/syscon/exynos5-pmu.h deleted file mode 100644 index 6108857ffcca..000000000000 --- a/include/linux/mfd/syscon/exynos5-pmu.h +++ /dev/null @@ -1,24 +0,0 @@ -/* - * Exynos5 SoC series Power Management Unit (PMU) register offsets - * and bit definitions. - * - * Copyright (C) 2014 Samsung Electronics Co., Ltd. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef _LINUX_MFD_SYSCON_PMU_EXYNOS5_H_ -#define _LINUX_MFD_SYSCON_PMU_EXYNOS5_H_ - -/* Exynos5 PMU register definitions */ - -/* Exynos5250 specific register definitions */ - -/* Exynos5420 specific register definitions */ - -#define EXYNOS5_PHY_ENABLE BIT(0) -#define EXYNOS5_MIPI_PHY_S_RESETN BIT(1) -#define EXYNOS5_MIPI_PHY_M_RESETN BIT(2) -#endif /* _LINUX_MFD_SYSCON_PMU_EXYNOS5_H_ */ diff --git a/include/linux/soc/samsung/exynos-regs-pmu.h b/include/linux/soc/samsung/exynos-regs-pmu.h index 6dbd65012ccd..b7e961a7a43a 100644 --- a/include/linux/soc/samsung/exynos-regs-pmu.h +++ b/include/linux/soc/samsung/exynos-regs-pmu.h @@ -52,7 +52,8 @@ /* MIPI_PHYn_CONTROL, valid for Exynos3250, Exynos4, Exynos5250 and Exynos5433 */ #define EXYNOS4_MIPI_PHY_CONTROL(n) (0x0710 + (n) * 4) -#define EXYNOS4_MIPI_PHY_ENABLE (1 << 0) +/* Phy enable bit, common for all phy registers, not only MIPI */ +#define EXYNOS4_PHY_ENABLE (1 << 0) #define EXYNOS4_MIPI_PHY_SRESETN (1 << 1) #define EXYNOS4_MIPI_PHY_MRESETN (1 << 2) #define EXYNOS4_MIPI_PHY_RESET_MASK (3 << 1) -- 2.9.3 ^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH 4/4] phy: exynos: Use one define for enable bit 2017-01-27 20:05 ` [PATCH 4/4] phy: exynos: Use one define for enable bit Krzysztof Kozlowski @ 2017-02-08 11:59 ` Lee Jones 0 siblings, 0 replies; 10+ messages in thread From: Lee Jones @ 2017-02-08 11:59 UTC (permalink / raw) To: linux-arm-kernel On Fri, 27 Jan 2017, Krzysztof Kozlowski wrote: > There is no need for separate defines for Exynos4 and Exynos5 phy enable > bit and MIPI phy reset bits. In both cases there are the same so > simplify it. > > This reduces number of defines and allows removal of one header file. > > Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> > --- > drivers/phy/phy-exynos-dp-video.c | 5 ++-- > drivers/phy/phy-exynos-mipi-video.c | 39 ++++++++++++++--------------- > drivers/phy/phy-exynos5-usbdrd.c | 5 ++-- > include/linux/mfd/syscon/exynos5-pmu.h | 24 ------------------ Acked-by: Lee Jones <lee.jones@linaro.org> > include/linux/soc/samsung/exynos-regs-pmu.h | 3 ++- > 5 files changed, 25 insertions(+), 51 deletions(-) > delete mode 100644 include/linux/mfd/syscon/exynos5-pmu.h > > diff --git a/drivers/phy/phy-exynos-dp-video.c b/drivers/phy/phy-exynos-dp-video.c > index d72193188980..bb3279dbf88c 100644 > --- a/drivers/phy/phy-exynos-dp-video.c > +++ b/drivers/phy/phy-exynos-dp-video.c > @@ -14,7 +14,6 @@ > #include <linux/kernel.h> > #include <linux/module.h> > #include <linux/mfd/syscon.h> > -#include <linux/mfd/syscon/exynos5-pmu.h> > #include <linux/of.h> > #include <linux/of_address.h> > #include <linux/phy/phy.h> > @@ -37,7 +36,7 @@ static int exynos_dp_video_phy_power_on(struct phy *phy) > > /* Disable power isolation on DP-PHY */ > return regmap_update_bits(state->regs, state->drvdata->phy_ctrl_offset, > - EXYNOS5_PHY_ENABLE, EXYNOS5_PHY_ENABLE); > + EXYNOS4_PHY_ENABLE, EXYNOS4_PHY_ENABLE); > } > > static int exynos_dp_video_phy_power_off(struct phy *phy) > @@ -46,7 +45,7 @@ static int exynos_dp_video_phy_power_off(struct phy *phy) > > /* Enable power isolation on DP-PHY */ > return regmap_update_bits(state->regs, state->drvdata->phy_ctrl_offset, > - EXYNOS5_PHY_ENABLE, 0); > + EXYNOS4_PHY_ENABLE, 0); > } > > static const struct phy_ops exynos_dp_video_phy_ops = { > diff --git a/drivers/phy/phy-exynos-mipi-video.c b/drivers/phy/phy-exynos-mipi-video.c > index acef1d92691e..c198886f80a3 100644 > --- a/drivers/phy/phy-exynos-mipi-video.c > +++ b/drivers/phy/phy-exynos-mipi-video.c > @@ -12,7 +12,6 @@ > #include <linux/err.h> > #include <linux/io.h> > #include <linux/kernel.h> > -#include <linux/mfd/syscon/exynos5-pmu.h> > #include <linux/module.h> > #include <linux/of.h> > #include <linux/of_address.h> > @@ -64,7 +63,7 @@ static const struct mipi_phy_device_desc s5pv210_mipi_phy = { > { > /* EXYNOS_MIPI_PHY_ID_CSIS0 */ > .coupled_phy_id = EXYNOS_MIPI_PHY_ID_DSIM0, > - .enable_val = EXYNOS4_MIPI_PHY_ENABLE, > + .enable_val = EXYNOS4_PHY_ENABLE, > .enable_reg = EXYNOS4_MIPI_PHY_CONTROL(0), > .enable_map = EXYNOS_MIPI_REGMAP_PMU, > .resetn_val = EXYNOS4_MIPI_PHY_SRESETN, > @@ -73,7 +72,7 @@ static const struct mipi_phy_device_desc s5pv210_mipi_phy = { > }, { > /* EXYNOS_MIPI_PHY_ID_DSIM0 */ > .coupled_phy_id = EXYNOS_MIPI_PHY_ID_CSIS0, > - .enable_val = EXYNOS4_MIPI_PHY_ENABLE, > + .enable_val = EXYNOS4_PHY_ENABLE, > .enable_reg = EXYNOS4_MIPI_PHY_CONTROL(0), > .enable_map = EXYNOS_MIPI_REGMAP_PMU, > .resetn_val = EXYNOS4_MIPI_PHY_MRESETN, > @@ -82,7 +81,7 @@ static const struct mipi_phy_device_desc s5pv210_mipi_phy = { > }, { > /* EXYNOS_MIPI_PHY_ID_CSIS1 */ > .coupled_phy_id = EXYNOS_MIPI_PHY_ID_DSIM1, > - .enable_val = EXYNOS4_MIPI_PHY_ENABLE, > + .enable_val = EXYNOS4_PHY_ENABLE, > .enable_reg = EXYNOS4_MIPI_PHY_CONTROL(1), > .enable_map = EXYNOS_MIPI_REGMAP_PMU, > .resetn_val = EXYNOS4_MIPI_PHY_SRESETN, > @@ -91,7 +90,7 @@ static const struct mipi_phy_device_desc s5pv210_mipi_phy = { > }, { > /* EXYNOS_MIPI_PHY_ID_DSIM1 */ > .coupled_phy_id = EXYNOS_MIPI_PHY_ID_CSIS1, > - .enable_val = EXYNOS4_MIPI_PHY_ENABLE, > + .enable_val = EXYNOS4_PHY_ENABLE, > .enable_reg = EXYNOS4_MIPI_PHY_CONTROL(1), > .enable_map = EXYNOS_MIPI_REGMAP_PMU, > .resetn_val = EXYNOS4_MIPI_PHY_MRESETN, > @@ -109,46 +108,46 @@ static const struct mipi_phy_device_desc exynos5420_mipi_phy = { > { > /* EXYNOS_MIPI_PHY_ID_CSIS0 */ > .coupled_phy_id = EXYNOS_MIPI_PHY_ID_DSIM0, > - .enable_val = EXYNOS5_PHY_ENABLE, > + .enable_val = EXYNOS4_PHY_ENABLE, > .enable_reg = EXYNOS5420_MIPI_PHY_CONTROL(0), > .enable_map = EXYNOS_MIPI_REGMAP_PMU, > - .resetn_val = EXYNOS5_MIPI_PHY_S_RESETN, > + .resetn_val = EXYNOS4_MIPI_PHY_SRESETN, > .resetn_reg = EXYNOS5420_MIPI_PHY_CONTROL(0), > .resetn_map = EXYNOS_MIPI_REGMAP_PMU, > }, { > /* EXYNOS_MIPI_PHY_ID_DSIM0 */ > .coupled_phy_id = EXYNOS_MIPI_PHY_ID_CSIS0, > - .enable_val = EXYNOS5_PHY_ENABLE, > + .enable_val = EXYNOS4_PHY_ENABLE, > .enable_reg = EXYNOS5420_MIPI_PHY_CONTROL(0), > .enable_map = EXYNOS_MIPI_REGMAP_PMU, > - .resetn_val = EXYNOS5_MIPI_PHY_M_RESETN, > + .resetn_val = EXYNOS4_MIPI_PHY_MRESETN, > .resetn_reg = EXYNOS5420_MIPI_PHY_CONTROL(0), > .resetn_map = EXYNOS_MIPI_REGMAP_PMU, > }, { > /* EXYNOS_MIPI_PHY_ID_CSIS1 */ > .coupled_phy_id = EXYNOS_MIPI_PHY_ID_DSIM1, > - .enable_val = EXYNOS5_PHY_ENABLE, > + .enable_val = EXYNOS4_PHY_ENABLE, > .enable_reg = EXYNOS5420_MIPI_PHY_CONTROL(1), > .enable_map = EXYNOS_MIPI_REGMAP_PMU, > - .resetn_val = EXYNOS5_MIPI_PHY_S_RESETN, > + .resetn_val = EXYNOS4_MIPI_PHY_SRESETN, > .resetn_reg = EXYNOS5420_MIPI_PHY_CONTROL(1), > .resetn_map = EXYNOS_MIPI_REGMAP_PMU, > }, { > /* EXYNOS_MIPI_PHY_ID_DSIM1 */ > .coupled_phy_id = EXYNOS_MIPI_PHY_ID_CSIS1, > - .enable_val = EXYNOS5_PHY_ENABLE, > + .enable_val = EXYNOS4_PHY_ENABLE, > .enable_reg = EXYNOS5420_MIPI_PHY_CONTROL(1), > .enable_map = EXYNOS_MIPI_REGMAP_PMU, > - .resetn_val = EXYNOS5_MIPI_PHY_M_RESETN, > + .resetn_val = EXYNOS4_MIPI_PHY_MRESETN, > .resetn_reg = EXYNOS5420_MIPI_PHY_CONTROL(1), > .resetn_map = EXYNOS_MIPI_REGMAP_PMU, > }, { > /* EXYNOS_MIPI_PHY_ID_CSIS2 */ > .coupled_phy_id = EXYNOS_MIPI_PHY_ID_NONE, > - .enable_val = EXYNOS5_PHY_ENABLE, > + .enable_val = EXYNOS4_PHY_ENABLE, > .enable_reg = EXYNOS5420_MIPI_PHY_CONTROL(2), > .enable_map = EXYNOS_MIPI_REGMAP_PMU, > - .resetn_val = EXYNOS5_MIPI_PHY_S_RESETN, > + .resetn_val = EXYNOS4_MIPI_PHY_SRESETN, > .resetn_reg = EXYNOS5420_MIPI_PHY_CONTROL(2), > .resetn_map = EXYNOS_MIPI_REGMAP_PMU, > }, > @@ -172,7 +171,7 @@ static const struct mipi_phy_device_desc exynos5433_mipi_phy = { > { > /* EXYNOS_MIPI_PHY_ID_CSIS0 */ > .coupled_phy_id = EXYNOS_MIPI_PHY_ID_DSIM0, > - .enable_val = EXYNOS5_PHY_ENABLE, > + .enable_val = EXYNOS4_PHY_ENABLE, > .enable_reg = EXYNOS4_MIPI_PHY_CONTROL(0), > .enable_map = EXYNOS_MIPI_REGMAP_PMU, > .resetn_val = BIT(0), > @@ -181,7 +180,7 @@ static const struct mipi_phy_device_desc exynos5433_mipi_phy = { > }, { > /* EXYNOS_MIPI_PHY_ID_DSIM0 */ > .coupled_phy_id = EXYNOS_MIPI_PHY_ID_CSIS0, > - .enable_val = EXYNOS5_PHY_ENABLE, > + .enable_val = EXYNOS4_PHY_ENABLE, > .enable_reg = EXYNOS4_MIPI_PHY_CONTROL(0), > .enable_map = EXYNOS_MIPI_REGMAP_PMU, > .resetn_val = BIT(0), > @@ -190,7 +189,7 @@ static const struct mipi_phy_device_desc exynos5433_mipi_phy = { > }, { > /* EXYNOS_MIPI_PHY_ID_CSIS1 */ > .coupled_phy_id = EXYNOS_MIPI_PHY_ID_NONE, > - .enable_val = EXYNOS5_PHY_ENABLE, > + .enable_val = EXYNOS4_PHY_ENABLE, > .enable_reg = EXYNOS4_MIPI_PHY_CONTROL(1), > .enable_map = EXYNOS_MIPI_REGMAP_PMU, > .resetn_val = BIT(1), > @@ -199,7 +198,7 @@ static const struct mipi_phy_device_desc exynos5433_mipi_phy = { > }, { > /* EXYNOS_MIPI_PHY_ID_DSIM1 */ > .coupled_phy_id = EXYNOS_MIPI_PHY_ID_NONE, > - .enable_val = EXYNOS5_PHY_ENABLE, > + .enable_val = EXYNOS4_PHY_ENABLE, > .enable_reg = EXYNOS4_MIPI_PHY_CONTROL(1), > .enable_map = EXYNOS_MIPI_REGMAP_PMU, > .resetn_val = BIT(1), > @@ -208,7 +207,7 @@ static const struct mipi_phy_device_desc exynos5433_mipi_phy = { > }, { > /* EXYNOS_MIPI_PHY_ID_CSIS2 */ > .coupled_phy_id = EXYNOS_MIPI_PHY_ID_NONE, > - .enable_val = EXYNOS5_PHY_ENABLE, > + .enable_val = EXYNOS4_PHY_ENABLE, > .enable_reg = EXYNOS4_MIPI_PHY_CONTROL(2), > .enable_map = EXYNOS_MIPI_REGMAP_PMU, > .resetn_val = BIT(0), > diff --git a/drivers/phy/phy-exynos5-usbdrd.c b/drivers/phy/phy-exynos5-usbdrd.c > index 7c896d0cda18..7c41daa2c625 100644 > --- a/drivers/phy/phy-exynos5-usbdrd.c > +++ b/drivers/phy/phy-exynos5-usbdrd.c > @@ -22,7 +22,6 @@ > #include <linux/platform_device.h> > #include <linux/mutex.h> > #include <linux/mfd/syscon.h> > -#include <linux/mfd/syscon/exynos5-pmu.h> > #include <linux/regmap.h> > #include <linux/regulator/consumer.h> > #include <linux/soc/samsung/exynos-regs-pmu.h> > @@ -236,10 +235,10 @@ static void exynos5_usbdrd_phy_isol(struct phy_usb_instance *inst, > if (!inst->reg_pmu) > return; > > - val = on ? 0 : EXYNOS5_PHY_ENABLE; > + val = on ? 0 : EXYNOS4_PHY_ENABLE; > > regmap_update_bits(inst->reg_pmu, inst->pmu_offset, > - EXYNOS5_PHY_ENABLE, val); > + EXYNOS4_PHY_ENABLE, val); > } > > /* > diff --git a/include/linux/mfd/syscon/exynos5-pmu.h b/include/linux/mfd/syscon/exynos5-pmu.h > deleted file mode 100644 > index 6108857ffcca..000000000000 > --- a/include/linux/mfd/syscon/exynos5-pmu.h > +++ /dev/null > @@ -1,24 +0,0 @@ > -/* > - * Exynos5 SoC series Power Management Unit (PMU) register offsets > - * and bit definitions. > - * > - * Copyright (C) 2014 Samsung Electronics Co., Ltd. > - * > - * This program is free software; you can redistribute it and/or modify > - * it under the terms of the GNU General Public License version 2 as > - * published by the Free Software Foundation. > - */ > - > -#ifndef _LINUX_MFD_SYSCON_PMU_EXYNOS5_H_ > -#define _LINUX_MFD_SYSCON_PMU_EXYNOS5_H_ > - > -/* Exynos5 PMU register definitions */ > - > -/* Exynos5250 specific register definitions */ > - > -/* Exynos5420 specific register definitions */ > - > -#define EXYNOS5_PHY_ENABLE BIT(0) > -#define EXYNOS5_MIPI_PHY_S_RESETN BIT(1) > -#define EXYNOS5_MIPI_PHY_M_RESETN BIT(2) > -#endif /* _LINUX_MFD_SYSCON_PMU_EXYNOS5_H_ */ > diff --git a/include/linux/soc/samsung/exynos-regs-pmu.h b/include/linux/soc/samsung/exynos-regs-pmu.h > index 6dbd65012ccd..b7e961a7a43a 100644 > --- a/include/linux/soc/samsung/exynos-regs-pmu.h > +++ b/include/linux/soc/samsung/exynos-regs-pmu.h > @@ -52,7 +52,8 @@ > > /* MIPI_PHYn_CONTROL, valid for Exynos3250, Exynos4, Exynos5250 and Exynos5433 */ > #define EXYNOS4_MIPI_PHY_CONTROL(n) (0x0710 + (n) * 4) > -#define EXYNOS4_MIPI_PHY_ENABLE (1 << 0) > +/* Phy enable bit, common for all phy registers, not only MIPI */ > +#define EXYNOS4_PHY_ENABLE (1 << 0) > #define EXYNOS4_MIPI_PHY_SRESETN (1 << 1) > #define EXYNOS4_MIPI_PHY_MRESETN (1 << 2) > #define EXYNOS4_MIPI_PHY_RESET_MASK (3 << 1) -- Lee Jones Linaro STMicroelectronics Landing Team Lead Linaro.org ? Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog ^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH 0/4] phy/mfd/soc: exynos: Header cleanup 2017-01-27 20:05 [PATCH 0/4] phy/mfd/soc: exynos: Header cleanup Krzysztof Kozlowski ` (3 preceding siblings ...) 2017-01-27 20:05 ` [PATCH 4/4] phy: exynos: Use one define for enable bit Krzysztof Kozlowski @ 2017-01-30 9:13 ` Kishon Vijay Abraham I 2017-02-02 18:38 ` Krzysztof Kozlowski 4 siblings, 1 reply; 10+ messages in thread From: Kishon Vijay Abraham I @ 2017-01-30 9:13 UTC (permalink / raw) To: linux-arm-kernel On Saturday 28 January 2017 01:35 AM, Krzysztof Kozlowski wrote: > Hi, > > Suggested by Marek, continuation of cleanup of PMU register defines > in headers. > > Let's keep all of them in include/linux/soc/samsung/exynos-regs-pmu.h. > > This is based on: > 1. Marek's recent work around pinctrl/power domains/lpass: > https://git.linaro.org/people/marek.szyprowski/linux-srpol.git > branch: v4.10-next-tm2-pd > > 2. My two previous patches for cleanup: > https://git.kernel.org/cgit/linux/kernel/git/krzk/linux.git > branch: for-v4.11/drivers-soc-exynos-pmu-the-joy-never-ends > > Affected subsystems/drivers: > 1. phy - drivers, > 2. mfd - headers, > 3. soc/samsung - header. > > However because of dependency on Marek's patchset, I do not have a clue > how to merge it... it is not an urgent stuff, so it may wait till > dependencies get in. I'll defer merging this. Thanks Kishon ^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH 0/4] phy/mfd/soc: exynos: Header cleanup 2017-01-30 9:13 ` [PATCH 0/4] phy/mfd/soc: exynos: Header cleanup Kishon Vijay Abraham I @ 2017-02-02 18:38 ` Krzysztof Kozlowski 0 siblings, 0 replies; 10+ messages in thread From: Krzysztof Kozlowski @ 2017-02-02 18:38 UTC (permalink / raw) To: linux-arm-kernel On Mon, Jan 30, 2017 at 02:43:01PM +0530, Kishon Vijay Abraham I wrote: > > > On Saturday 28 January 2017 01:35 AM, Krzysztof Kozlowski wrote: > > Hi, > > > > Suggested by Marek, continuation of cleanup of PMU register defines > > in headers. > > > > Let's keep all of them in include/linux/soc/samsung/exynos-regs-pmu.h. > > > > This is based on: > > 1. Marek's recent work around pinctrl/power domains/lpass: > > https://git.linaro.org/people/marek.szyprowski/linux-srpol.git > > branch: v4.10-next-tm2-pd > > > > 2. My two previous patches for cleanup: > > https://git.kernel.org/cgit/linux/kernel/git/krzk/linux.git > > branch: for-v4.11/drivers-soc-exynos-pmu-the-joy-never-ends > > > > Affected subsystems/drivers: > > 1. phy - drivers, > > 2. mfd - headers, > > 3. soc/samsung - header. > > > > However because of dependency on Marek's patchset, I do not have a clue > > how to merge it... it is not an urgent stuff, so it may wait till > > dependencies get in. > > I'll defer merging this. Okay, the compile dependency went to my tree and is available under samsung-drivers-soc-pmu-4.11-3 tag (see below). However the patches probably won't apply cleanly so if you wish, I can rebase them. Also they miss an ack from Lee Jones. Best regards, Krzysztof The following changes since commit ee55ae6194a5439bde3a3b8ee0abda63c610e740: soc: samsung: pmu: Remove duplicated define for ARM_L2_OPTION register (2017-01-27 11:32:31 +0200) are available in the git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux.git tags/samsung-drivers-soc-pmu-4.11-3 for you to fetch changes up to b343d77b94b6702082f4f402e1492e71ef87095b: soc: samsung: pmu: Add register defines for pad retention control (2017-02-02 20:00:28 +0200) ---------------------------------------------------------------- 3rd round of improvements for Exynos PMU driver for v4.11: 1. Add defines in header for future patches changing the pad retention control. ---------------------------------------------------------------- Marek Szyprowski (1): soc: samsung: pmu: Add register defines for pad retention control ^ permalink raw reply [flat|nested] 10+ messages in thread
end of thread, other threads:[~2017-02-08 11:59 UTC | newest] Thread overview: 10+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2017-01-27 20:05 [PATCH 0/4] phy/mfd/soc: exynos: Header cleanup Krzysztof Kozlowski 2017-01-27 20:05 ` [PATCH 1/4] phy: exynos4: Remove duplicated defines of PHY register defines Krzysztof Kozlowski 2017-02-08 11:58 ` Lee Jones 2017-01-27 20:05 ` [PATCH 2/4] phy: exynos5: " Krzysztof Kozlowski 2017-02-08 11:59 ` Lee Jones 2017-01-27 20:05 ` [PATCH 3/4] phy: exynos-mipi-video: Use consistent method to address phy registers Krzysztof Kozlowski 2017-01-27 20:05 ` [PATCH 4/4] phy: exynos: Use one define for enable bit Krzysztof Kozlowski 2017-02-08 11:59 ` Lee Jones 2017-01-30 9:13 ` [PATCH 0/4] phy/mfd/soc: exynos: Header cleanup Kishon Vijay Abraham I 2017-02-02 18:38 ` Krzysztof Kozlowski
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