From: maxime.ripard@free-electrons.com (maxime.ripard at free-electrons.com)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 1/2] nvmem: sunxi-sid: add support for H3 and A64's SID controller
Date: Mon, 30 Jan 2017 08:44:04 +0100 [thread overview]
Message-ID: <20170130074404.d7mi6h4kviornr5s@lukather> (raw)
In-Reply-To: <20170129015641.54281-1-icenowy@aosc.xyz>
On Sun, Jan 29, 2017 at 09:56:40AM +0800, Icenowy Zheng wrote:
> H3 and A64 SoCs have a bigger SID controller, which has its direct read
> address at 0x200 position in the SID block, not 0x0.
>
> Also, H3 SID controller has some silicon bug that makes the direct read
> value wrong at first, add code to workaround the bug. (This bug has
> already been fixed on A64 and later SoCs)
>
> Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Please split that into several patches. One to allow to set the size
through the structure, one to support the A64, and one to support the
H3.
Thanks,
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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prev parent reply other threads:[~2017-01-30 7:44 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-01-29 1:56 [PATCH v2 1/2] nvmem: sunxi-sid: add support for H3 and A64's SID controller Icenowy Zheng
2017-01-29 1:56 ` [PATCH v2 2/2] ARM: dts: sun8i: enable SID on Allwinner H3 SoC Icenowy Zheng
2017-01-30 7:44 ` maxime.ripard at free-electrons.com [this message]
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