[PATCH v3 0/3] ARM: !MMU: v7-A support, dynamic vectors base handling

[PATCH v3 0/3] ARM: !MMU: v7-A support, dynamic vectors base handling

[afzal mohammed]

Hi,

ARM core changes to support !MMU Kernel on v7-A MMU processors.

Based on the feedback from Russell, it was decided to handle vector
base dynamically in C for no-MMU & work towards the the goal of
removing VECTORS_BASE from Kconfig.

Exception base address is dynamically found out in C & configured.

This series also does the preparation for CONFIG_VECTORS_BASE removal.
Once vector region setup, used by Cortex-R, is made devoid of
VECTORS_BASE, it can be removed from Kconfig. [2] already decouples it
from Kconfig for MMU.

Vladimir's Tested-by on v2 has been removed from [PATCH 2/3] as it has
been changed. And as it doesn't affect functionality, Tested-by has been
retained on the other two patches, Vladimir, let me know if not okay.

This series has been verified over current mainline plus [1,2] on
1. Vybrid Cosmic+
 a. Cortex-M4 - !MMU Kernel
 b. Cortex-A5 - MMU Kernel.

This series also has been verified over Vladimir's series [3] along
with [1,2] on
1. Vybrid Cosmic+
 a. Cortex-M4 !MMU Kernel
 b. Cortex-A5 MMU Kernel
 c. Cortex-A5 !MMU Kernel
2. AM437x IDK
 a. Cortex-A9 MMU Kernel
 b. Cortex-A9 !MMU Kernel

Regards
afzal

v3:
=> Removed [PATCH 1/4] of v2 as it is in -next
=> Simplify by defining VECTORS_BASE to variable holding dynamically
    calculated exception base address

v2:
=> Fix bisectability issue on !MMU builds
=> UL suffix on VECTORS_BASE definition
=> Use existing helpers to detect security extensions
=> Rewrite a CPP step to C for readability

[1] "[PATCH 1/2] ARM: nommu: allow enabling REMAP_VECTORS_TO_RAM"
    http://lists.infradead.org/pipermail/linux-arm-kernel/2016-December/473593.html
    (in -next)

[2] "[PATCH v2 1/4] ARM: mmu: decouple VECTORS_BASE from Kconfig"
    http://lists.infradead.org/pipermail/linux-arm-kernel/2017-January/481904.html
    (in -next)

[3] "[RFC v2 PATCH 00/23] Allow NOMMU for MULTIPLATFORM",
    http://lists.infradead.org/pipermail/linux-arm-kernel/2016-November/470966.html
    (git://linux-arm.org/linux-vm.git nommu-rfc-v2)

afzal mohammed (3):
  ARM: nommu: dynamic exception base address setting
  ARM: nommu: display vectors base
  ARM: nommu: remove Hivecs configuration is asm

 arch/arm/include/asm/memory.h |  9 ++++++--
 arch/arm/kernel/head-nommu.S  |  5 -----
 arch/arm/mm/nommu.c           | 52 +++++++++++++++++++++++++++++++++++++++++--
 3 files changed, 57 insertions(+), 9 deletions(-)

-- 
2.11.0

[PATCH v3 1/3] ARM: nommu: dynamic exception base address setting

[afzal mohammed]

No-MMU dynamic exception base address configuration on CP15
processors. In the case of low vectors, decision based on whether
security extensions are enabled & whether remap vectors to RAM
CONFIG option is selected.

For no-MMU without CP15, current default value of 0x0 is retained.

Signed-off-by: afzal mohammed <afzal.mohd.ma@gmail.com>
Tested-by: Vladimir Murzin <vladimir.murzin@arm.com>
---

v3:
 Vladimir's Tested-by
v2:
 Use existing helpers to detect security extensions
 Rewrite a CPP step to C for readability

 arch/arm/mm/nommu.c | 52 ++++++++++++++++++++++++++++++++++++++++++++++++++--
 1 file changed, 50 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mm/nommu.c b/arch/arm/mm/nommu.c
index 2740967727e2..20ac52579952 100644
--- a/arch/arm/mm/nommu.c
+++ b/arch/arm/mm/nommu.c
@@ -11,6 +11,7 @@
 #include <linux/kernel.h>
 
 #include <asm/cacheflush.h>
+#include <asm/cp15.h>
 #include <asm/sections.h>
 #include <asm/page.h>
 #include <asm/setup.h>
@@ -22,6 +23,8 @@
 
 #include "mm.h"
 
+unsigned long vectors_base;
+
 #ifdef CONFIG_ARM_MPU
 struct mpu_rgn_info mpu_rgn_info;
 
@@ -278,15 +281,60 @@ static void sanity_check_meminfo_mpu(void) {}
 static void __init mpu_setup(void) {}
 #endif /* CONFIG_ARM_MPU */
 
+#ifdef CONFIG_CPU_CP15
+#ifdef CONFIG_CPU_HIGH_VECTOR
+static unsigned long __init setup_vectors_base(void)
+{
+	unsigned long reg = get_cr();
+
+	set_cr(reg | CR_V);
+	return 0xffff0000;
+}
+#else /* CONFIG_CPU_HIGH_VECTOR */
+/* Write exception base address to VBAR */
+static inline void set_vbar(unsigned long val)
+{
+	asm("mcr p15, 0, %0, c12, c0, 0" : : "r" (val) : "cc");
+}
+
+/*
+ * Security extensions, bits[7:4], permitted values,
+ * 0b0000 - not implemented, 0b0001/0b0010 - implemented
+ */
+static inline bool security_extensions_enabled(void)
+{
+	return !!cpuid_feature_extract(CPUID_EXT_PFR1, 4);
+}
+
+static unsigned long __init setup_vectors_base(void)
+{
+	unsigned long base = 0, reg = get_cr();
+
+	set_cr(reg & ~CR_V);
+	if (security_extensions_enabled()) {
+		if (IS_ENABLED(CONFIG_REMAP_VECTORS_TO_RAM))
+			base = CONFIG_DRAM_BASE;
+		set_vbar(base);
+	} else if (IS_ENABLED(CONFIG_REMAP_VECTORS_TO_RAM)) {
+		if (CONFIG_DRAM_BASE != 0)
+			pr_err("Security extensions not enabled, vectors cannot be remapped to RAM, vectors base will be 0x00000000\n");
+	}
+
+	return base;
+}
+#endif /* CONFIG_CPU_HIGH_VECTOR */
+#endif /* CONFIG_CPU_CP15 */
+
 void __init arm_mm_memblock_reserve(void)
 {
 #ifndef CONFIG_CPU_V7M
+	vectors_base = IS_ENABLED(CONFIG_CPU_CP15) ? setup_vectors_base() : 0;
 	/*
 	 * Register the exception vector page.
 	 * some architectures which the DRAM is the exception vector to trap,
 	 * alloc_page breaks with error, although it is not NULL, but "0."
 	 */
-	memblock_reserve(CONFIG_VECTORS_BASE, 2 * PAGE_SIZE);
+	memblock_reserve(vectors_base, 2 * PAGE_SIZE);
 #else /* ifndef CONFIG_CPU_V7M */
 	/*
 	 * There is no dedicated vector page on V7-M. So nothing needs to be
@@ -310,7 +358,7 @@ void __init sanity_check_meminfo(void)
  */
 void __init paging_init(const struct machine_desc *mdesc)
 {
-	early_trap_init((void *)CONFIG_VECTORS_BASE);
+	early_trap_init((void *)vectors_base);
 	mpu_setup();
 	bootmem_init();
 }
-- 
2.11.0

[PATCH v3 2/3] ARM: nommu: display vectors base

[afzal mohammed]

VECTORS_BASE displays the exception base address. Now on no-MMU as
the exception base address is dynamically estimated, define
VECTORS_BASE to the variable holding it.

As it is the case, limit VECTORS_BASE constant definition to MMU.

Suggested-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: afzal mohammed <afzal.mohd.ma@gmail.com>
---

v3:
 Simplify by defining VECTORS_BASE to vectors_base
v2:
 A change to accomodate bisectability resolution on patch 1/4

 arch/arm/include/asm/memory.h | 9 +++++++--
 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/arch/arm/include/asm/memory.h b/arch/arm/include/asm/memory.h
index 0b5416fe7709..780549a78937 100644
--- a/arch/arm/include/asm/memory.h
+++ b/arch/arm/include/asm/memory.h
@@ -83,8 +83,15 @@
 #define IOREMAP_MAX_ORDER	24
 #endif
 
+#define VECTORS_BASE		UL(0xffff0000)
+
 #else /* CONFIG_MMU */
 
+#ifndef __ASSEMBLY__
+extern unsigned long vectors_base;
+#define VECTORS_BASE		vectors_base
+#endif
+
 /*
  * The limitation of user task size can grow up to the end of free ram region.
  * It is difficult to define and perhaps will never meet the original meaning
@@ -111,8 +118,6 @@
 
 #endif /* !CONFIG_MMU */
 
-#define VECTORS_BASE		UL(0xffff0000)
-
 /*
  * We fix the TCM memories max 32 KiB ITCM resp DTCM at these
  * locations
-- 
2.11.0

[PATCH v3 3/3] ARM: nommu: remove Hivecs configuration is asm

[afzal mohammed]

Now that exception based address is handled dynamically for
processors with CP15, remove Hivecs configuration in assembly.

Signed-off-by: afzal mohammed <afzal.mohd.ma@gmail.com>
Tested-by: Vladimir Murzin <vladimir.murzin@arm.com>
---

v3:
 Vladimir's Tested-by

 arch/arm/kernel/head-nommu.S | 5 -----
 1 file changed, 5 deletions(-)

diff --git a/arch/arm/kernel/head-nommu.S b/arch/arm/kernel/head-nommu.S
index 6b4eb27b8758..2e21e08de747 100644
--- a/arch/arm/kernel/head-nommu.S
+++ b/arch/arm/kernel/head-nommu.S
@@ -152,11 +152,6 @@ __after_proc_init:
 #ifdef CONFIG_CPU_ICACHE_DISABLE
 	bic	r0, r0, #CR_I
 #endif
-#ifdef CONFIG_CPU_HIGH_VECTOR
-	orr	r0, r0, #CR_V
-#else
-	bic	r0, r0, #CR_V
-#endif
 	mcr	p15, 0, r0, c1, c0, 0		@ write control reg
 #elif defined (CONFIG_CPU_V7M)
 	/* For V7M systems we want to modify the CCR similarly to the SCTLR */
-- 
2.11.0

[PATCH v3 0/3] ARM: !MMU: v7-A support, dynamic vectors base handling

[Russell King - ARM Linux]

On Tue, Jan 31, 2017 at 06:34:46PM +0530, afzal mohammed wrote:
> Hi,
> 
> ARM core changes to support !MMU Kernel on v7-A MMU processors.
> 
> Based on the feedback from Russell, it was decided to handle vector
> base dynamically in C for no-MMU & work towards the the goal of
> removing VECTORS_BASE from Kconfig.

Looks good from my perspective.  If Vladimir can reply about patch 2,
then I think we'll be good to go with these.  Thanks.

-- 
RMK's Patch system: http://www.armlinux.org.uk/developer/patches/
FTTC broadband for 0.8mile line: currently at 9.6Mbps down 400kbps up
according to speedtest.net.

[PATCH v3 0/3] ARM: !MMU: v7-A support, dynamic vectors base handling

[Vladimir Murzin]

On 31/01/17 19:24, Russell King - ARM Linux wrote:
> On Tue, Jan 31, 2017 at 06:34:46PM +0530, afzal mohammed wrote:
>> Hi,
>>
>> ARM core changes to support !MMU Kernel on v7-A MMU processors.
>>
>> Based on the feedback from Russell, it was decided to handle vector
>> base dynamically in C for no-MMU & work towards the the goal of
>> removing VECTORS_BASE from Kconfig.
> 
> Looks good from my perspective.  If Vladimir can reply about patch 2,
> then I think we'll be good to go with these.  Thanks.
> 

My R-class and M-class setups continue to work with this series applied on
top of next-20170201 plus following fixup for PATCH 2/3

 -#define VECTORS_BASE          UL(0xffff0000)
 -
- /*
-  * We fix the TCM memories max 32 KiB ITCM resp DTCM at these
-  * locations
+ #ifdef CONFIG_XIP_KERNEL
+ #define KERNEL_START          _sdata
+ #else

FWIW: Tested-by: Vladimir Murzin <vladimir.murzin@arm.com>

Thanks!
Vladimir

[PATCH v3 0/3] ARM: !MMU: v7-A support, dynamic vectors base handling

[Afzal Mohammed]

Hi,

On Wed, Feb 01, 2017 at 10:33:17AM +0000, Vladimir Murzin wrote:
> On 31/01/17 19:24, Russell King - ARM Linux wrote:
> > On Tue, Jan 31, 2017 at 06:34:46PM +0530, afzal mohammed wrote:

> >> ARM core changes to support !MMU Kernel on v7-A MMU processors.
> >>
> >> Based on the feedback from Russell, it was decided to handle vector
> >> base dynamically in C for no-MMU & work towards the the goal of
> >> removing VECTORS_BASE from Kconfig.
> > 
> > Looks good from my perspective.  If Vladimir can reply about patch 2,
> > then I think we'll be good to go with these.  Thanks.

Patch system has been updated with this series along with Vladimir's
Tested-by on patch 2.

Thanks

> My R-class and M-class setups continue to work with this series applied on
> top of next-20170201 plus

> following fixup for PATCH 2/3

Yes, Russell has applied another patch and the context changes a little.

> 
>  -#define VECTORS_BASE          UL(0xffff0000)
>  -
> - /*
> -  * We fix the TCM memories max 32 KiB ITCM resp DTCM at these
> -  * locations
> + #ifdef CONFIG_XIP_KERNEL
> + #define KERNEL_START          _sdata
> + #else
> 
> FWIW: Tested-by: Vladimir Murzin <vladimir.murzin@arm.com>

Thanks

Regards
afzal