From: chris.packham@alliedtelesis.co.nz (Chris Packham)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v3 4/6] ARM: dts: mvebu: Add binding for mv98dx3236-soc-id
Date: Thu, 16 Feb 2017 21:50:38 +1300 [thread overview]
Message-ID: <20170216085041.28337-5-chris.packham@alliedtelesis.co.nz> (raw)
In-Reply-To: <20170216085041.28337-1-chris.packham@alliedtelesis.co.nz>
The DFX server on the 98dx3236 and compatible SoCs has an ID register.
Add documentation and a binding for this.
Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
---
Notes:
Changes in v3:
- new, split from driver
.../devicetree/bindings/arm/marvell/mv98dx3236-soc-id.txt | 14 ++++++++++++++
arch/arm/boot/dts/armada-xp-98dx3236.dtsi | 5 +++++
2 files changed, 19 insertions(+)
create mode 100644 Documentation/devicetree/bindings/arm/marvell/mv98dx3236-soc-id.txt
diff --git a/Documentation/devicetree/bindings/arm/marvell/mv98dx3236-soc-id.txt b/Documentation/devicetree/bindings/arm/marvell/mv98dx3236-soc-id.txt
new file mode 100644
index 000000000000..ed08cb126a83
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/marvell/mv98dx3236-soc-id.txt
@@ -0,0 +1,14 @@
+Marvell 98dx3236 SoC ID
+---------------------------------------------------------------
+
+Required properties:
+
+- compatible: Should be "marvell,mv98dx3236-soc-id".
+
+- reg: should be the register base and length as documented in the
+ datasheet for the Device ID Status
+
+soc-id at f8244 {
+ compatible = "marvell,mv98dx3236-soc-id";
+ reg = <0xf8244 0x4>;
+};
diff --git a/arch/arm/boot/dts/armada-xp-98dx3236.dtsi b/arch/arm/boot/dts/armada-xp-98dx3236.dtsi
index 5e7245524d46..6b81f7363d53 100644
--- a/arch/arm/boot/dts/armada-xp-98dx3236.dtsi
+++ b/arch/arm/boot/dts/armada-xp-98dx3236.dtsi
@@ -264,6 +264,11 @@
ranges = <0 MBUS_ID(0x08, 0x00) 0 0x100000>;
reg = <MBUS_ID(0x08, 0x00) 0 0x100000>;
+ soc-id at f8244 {
+ compatible = "marvell,mv98dx3236-soc-id";
+ reg = <0xf8244 0x4>;
+ };
+
dfx_coredivclk: corediv-clock at f8268 {
compatible = "marvell,mv98dx3236-corediv-clock";
reg = <0xf8268 0xc>;
--
2.11.0.24.ge6920cf
next prev parent reply other threads:[~2017-02-16 8:50 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-02-16 8:50 [PATCH v2 0/6] Updates for Marvell Switch SoCs Chris Packham
2017-02-16 8:50 ` [PATCH v3 1/6] ARM: dts: Fix typo in armada-xp-98dx4251 Chris Packham
2017-02-27 14:50 ` Rob Herring
2017-02-16 8:50 ` [PATCH v3 2/6] ARM: dts: armada-xp-98dx3236: combine dfx server nodes Chris Packham
2017-02-27 14:49 ` Rob Herring
2017-02-16 8:50 ` [PATCH v3 3/6] ARM: dts: Use armada-370-xp as a base for armada-xp-98dx3236 Chris Packham
2017-02-16 8:50 ` Chris Packham [this message]
2017-02-27 15:00 ` [PATCH v3 4/6] ARM: dts: mvebu: Add binding for mv98dx3236-soc-id Rob Herring
2017-02-16 8:50 ` [PATCH v3 5/6] ARM: mvebu: Add driver " Chris Packham
2017-02-16 13:27 ` Arnd Bergmann
2017-02-17 4:22 ` Chris Packham
2017-02-17 16:17 ` Arnd Bergmann
2017-02-21 4:16 ` Chris Packham
2017-02-16 8:50 ` [PATCH v3 6/6] ARM: dts: mvebu: Move mv98dx3236 clock bindings Chris Packham
2017-02-27 15:15 ` Rob Herring
2017-03-07 17:10 ` [PATCH v2 0/6] Updates for Marvell Switch SoCs Gregory CLEMENT
2017-03-07 19:38 ` Chris Packham
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