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From: thierry.reding@gmail.com (Thierry Reding)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 06/11] arm64: tegra: Add initial power tree for P3310
Date: Thu, 23 Feb 2017 18:30:48 +0100	[thread overview]
Message-ID: <20170223173053.19701-6-thierry.reding@gmail.com> (raw)
In-Reply-To: <20170223173053.19701-1-thierry.reding@gmail.com>

From: Thierry Reding <treding@nvidia.com>

Enable the Maxim MAX77620 PMIC found on P3310 and add some fixed
regulators to model the power tree.

Signed-off-by: Thierry Reding <treding@nvidia.com>
---
 arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi | 211 +++++++++++++++++++++++++
 1 file changed, 211 insertions(+)

diff --git a/arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi b/arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi
index ffbb4be5122e..1a9ac73b4ecb 100644
--- a/arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi
@@ -1,5 +1,7 @@
 #include "tegra186.dtsi"
 
+#include <dt-bindings/mfd/max77620.h>
+
 / {
 	model = "NVIDIA Tegra186 P3310 Processor Module";
 	compatible = "nvidia,p3310", "nvidia,tegra186";
@@ -115,6 +117,180 @@
 	bpmp {
 		i2c {
 			status = "okay";
+
+			pmic: pmic at 3c {
+				compatible = "maxim,max77620";
+				reg = <0x3c>;
+
+				interrupts = <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>;
+				#interrupt-cells = <2>;
+				interrupt-controller;
+
+				#gpio-cells = <2>;
+				gpio-controller;
+
+				pinctrl-names = "default";
+				pinctrl-0 = <&max77620_default>;
+
+				max77620_default: pinmux {
+					gpio0 {
+						pins = "gpio0";
+						function = "gpio";
+					};
+
+					gpio1 {
+						pins = "gpio1";
+						function = "fps-out";
+						maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
+					};
+
+					gpio2 {
+						pins = "gpio2";
+						function = "fps-out";
+						maxim,active-fps-source = <MAX77620_FPS_SRC_1>;
+					};
+
+					gpio3 {
+						pins = "gpio3";
+						function = "fps-out";
+						maxim,active-fps-source = <MAX77620_FPS_SRC_1>;
+					};
+
+					gpio4 {
+						pins = "gpio4";
+						function = "32k-out1";
+						drive-push-pull = <1>;
+					};
+
+					gpio5 {
+						pins = "gpio5";
+						function = "gpio";
+						drive-push-pull = <0>;
+					};
+
+					gpio6 {
+						pins = "gpio6";
+						function = "gpio";
+						drive-push-pull = <1>;
+					};
+
+					gpio7 {
+						pins = "gpio7";
+						function = "gpio";
+						drive-push-pull = <0>;
+					};
+				};
+
+				fps {
+					fps0 {
+						maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
+						maxim,shutdown-fps-time-period-us = <640>;
+					};
+
+					fps1 {
+						maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN1>;
+						maxim,shutdown-fps-time-period-us = <640>;
+					};
+
+					fps2 {
+						maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>;
+						maxim,shutdown-fps-time-period-us = <640>;
+					};
+				};
+
+				regulators {
+					in-sd0-supply = <&vdd_5v0_sys>;
+					in-sd1-supply = <&vdd_5v0_sys>;
+					in-sd2-supply = <&vdd_5v0_sys>;
+					in-sd3-supply = <&vdd_5v0_sys>;
+
+					in-ldo0-1-supply = <&vdd_5v0_sys>;
+					in-ldo2-supply = <&vdd_5v0_sys>;
+					in-ldo3-5-supply = <&vdd_5v0_sys>;
+					in-ldo4-6-supply = <&vdd_1v8>;
+					in-ldo7-8-supply = <&avdd_dsi_csi>;
+
+					sd0 {
+						regulator-name = "VDD_DDR_1V1_PMIC";
+						regulator-min-microvolt = <1100000>;
+						regulator-max-microvolt = <1100000>;
+						regulator-always-on;
+						regulator-boot-on;
+					};
+
+					avdd_dsi_csi: sd1 {
+						regulator-name = "AVDD_DSI_CSI_1V2";
+						regulator-min-microvolt = <1200000>;
+						regulator-max-microvolt = <1200000>;
+						/* XXX */
+						regulator-always-on;
+						regulator-boot-on;
+					};
+
+					vdd_1v8: sd2 {
+						regulator-name = "VDD_1V8";
+						regulator-min-microvolt = <1800000>;
+						regulator-max-microvolt = <1800000>;
+						/* XXX */
+						regulator-always-on;
+						regulator-boot-on;
+					};
+
+					vdd_3v3_sys: sd3 {
+						regulator-name = "VDD_3V3_SYS";
+						regulator-min-microvolt = <3300000>;
+						regulator-max-microvolt = <3300000>;
+						/* XXX */
+						regulator-always-on;
+						regulator-boot-on;
+					};
+
+					ldo0 {
+						regulator-name = "VDD_1V8_AP_PLL";
+						regulator-min-microvolt = <1800000>;
+						regulator-max-microvolt = <1800000>;
+						/* XXX */
+						regulator-always-on;
+						regulator-boot-on;
+					};
+
+					ldo2 {
+						regulator-name = "VDDIO_3V3_AOHV";
+						regulator-min-microvolt = <3300000>;
+						regulator-max-microvolt = <3300000>;
+						/* XXX */
+						regulator-always-on;
+						regulator-boot-on;
+					};
+
+					vddio_sdmmc1: ldo3 {
+						regulator-name = "VDDIO_SDMMC1_AP";
+						regulator-min-microvolt = <1800000>;
+						regulator-max-microvolt = <3300000>;
+					};
+
+					ldo4 {
+						regulator-name = "VDD_RTC";
+						regulator-min-microvolt = <1000000>;
+						regulator-max-microvolt = <1000000>;
+					};
+
+					vddio_sdmmc3: ldo5 {
+						regulator-name = "VDDIO_SDMMC3_AP";
+						regulator-min-microvolt = <2800000>;
+						regulator-max-microvolt = <2800000>;
+					};
+
+					vdd_pex: ldo7 {
+						regulator-name = "VDD_PEX_1V05";
+						regulator-min-microvolt = <1050000>;
+						regulator-max-microvolt = <1050000>;
+						/* XXX */
+						regulator-always-on;
+						regulator-boot-on;
+					};
+				};
+			};
 		};
 	};
 
@@ -123,4 +299,39 @@
 		status = "okay";
 		method = "smc";
 	};
+
+	regulators {
+		compatible = "simple-bus";
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		vdd_5v0_sys: regulator at 0 {
+			compatible = "regulator-fixed";
+			reg = <0>;
+
+			regulator-name = "VDD_5V0_SYS";
+			regulator-min-microvolt = <5000000>;
+			regulator-max-microvolt = <5000000>;
+			regulator-always-on;
+			regulator-boot-on;
+		};
+
+		vdd_1v8_ap: regulator at 1 {
+			compatible = "regulator-fixed";
+			reg = <1>;
+
+			regulator-name = "VDD_1V8_AP";
+			regulator-min-microvolt = <1800000>;
+			regulator-max-microvolt = <1800000>;
+
+			/* XXX */
+			regulator-always-on;
+			regulator-boot-on;
+
+			gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
+			enable-active-high;
+
+			vin-supply = <&vdd_1v8>;
+		};
+	};
 };
-- 
2.11.1

  parent reply	other threads:[~2017-02-23 17:30 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-02-23 17:30 [PATCH 01/11] arm64: tegra: Add PMC controller on Tegra186 Thierry Reding
2017-02-23 17:30 ` [PATCH 02/11] arm64: tegra: Add ethernet support for Tegra186 Thierry Reding
2017-03-07 20:42   ` Jon Hunter
2017-02-23 17:30 ` [PATCH 03/11] arm64: tegra: Invert the PMC interrupt on P3310 Thierry Reding
2017-03-07 10:25   ` Jon Hunter
2017-02-23 17:30 ` [PATCH 04/11] arm64: tegra: Enable I2C controllers " Thierry Reding
2017-03-07 10:38   ` Jon Hunter
2017-02-23 17:30 ` [PATCH 05/11] arm64: tegra: Enable ethernet " Thierry Reding
2017-03-07 21:04   ` Jon Hunter
2017-02-23 17:30 ` Thierry Reding [this message]
2017-03-08 11:18   ` [PATCH 06/11] arm64: tegra: Add initial power tree for P3310 Jon Hunter
2017-03-08 13:24   ` [PATCH v2] " Thierry Reding
2017-03-08 14:24     ` Jon Hunter
2017-02-23 17:30 ` [PATCH 07/11] arm64: tegra: Enable SDHCI controllers on P3110 Thierry Reding
2017-03-08 11:46   ` Jon Hunter
2017-03-08 13:18     ` Thierry Reding
2017-03-08 13:39   ` [PATCH v2 1/2] " Thierry Reding
2017-03-08 13:39     ` [PATCH v2 2/2] arm64: tegra: Enable SD/MMC slot on P2771 Thierry Reding
2017-03-08 14:26       ` Jon Hunter
2017-03-08 14:26     ` [PATCH v2 1/2] arm64: tegra: Enable SDHCI controllers on P3110 Jon Hunter
2017-02-23 17:30 ` [PATCH 08/11] arm64: tegra: Enable current monitors on P3310 Thierry Reding
2017-03-08 11:52   ` Jon Hunter
2017-02-23 17:30 ` [PATCH 09/11] arm64: tegra: Add GPIO keys on P2771 Thierry Reding
2017-03-08 12:03   ` Jon Hunter
2017-03-08 12:15     ` Jon Hunter
2017-03-08 13:47       ` Thierry Reding
2017-02-23 17:30 ` [PATCH 10/11] arm64: tegra: Add power monitors " Thierry Reding
2017-03-08 12:06   ` Jon Hunter
2017-02-23 17:30 ` [PATCH 11/11] arm64: tegra: Add GPIO expanders " Thierry Reding
2017-03-08 12:11   ` Jon Hunter
2017-03-07  9:48 ` [PATCH 01/11] arm64: tegra: Add PMC controller on Tegra186 Jon Hunter
2017-03-08 18:29 ` Thierry Reding

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