* [PATCH 1/2] ARM: dts: add SDC2 and SDC4 to the MSM8660 family
@ 2017-03-06 8:00 Linus Walleij
2017-03-06 13:10 ` Bjorn Andersson
2017-03-06 14:35 ` Stephen Boyd
0 siblings, 2 replies; 5+ messages in thread
From: Linus Walleij @ 2017-03-06 8:00 UTC (permalink / raw)
To: linux-arm-kernel
To make the picture complete, add DTS entries also for the
second and fourth MMC/SD blocks on the MSM8660. SDC2 is
an 8-bit interface and SDC4 is a 4-bit interface.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
arch/arm/boot/dts/qcom-msm8660.dtsi | 31 +++++++++++++++++++++++++++++++
1 file changed, 31 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-msm8660.dtsi b/arch/arm/boot/dts/qcom-msm8660.dtsi
index 91c9a62ae725..5564ad131325 100644
--- a/arch/arm/boot/dts/qcom-msm8660.dtsi
+++ b/arch/arm/boot/dts/qcom-msm8660.dtsi
@@ -392,6 +392,22 @@
cap-mmc-highspeed;
};
+ sdcc2: sdcc at 12140000 {
+ status = "disabled";
+ compatible = "arm,pl18x", "arm,primecell";
+ arm,primecell-periphid = <0x00051180>;
+ reg = <0x12140000 0x8000>;
+ interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "cmd_irq";
+ clocks = <&gcc SDC2_CLK>, <&gcc SDC2_H_CLK>;
+ clock-names = "mclk", "apb_pclk";
+ bus-width = <8>;
+ max-frequency = <48000000>;
+ non-removable;
+ cap-sd-highspeed;
+ cap-mmc-highspeed;
+ };
+
sdcc3: sdcc at 12180000 {
compatible = "arm,pl18x", "arm,primecell";
arm,primecell-periphid = <0x00051180>;
@@ -408,6 +424,21 @@
no-1-8-v;
};
+ sdcc4: sdcc at 121c0000 {
+ compatible = "arm,pl18x", "arm,primecell";
+ arm,primecell-periphid = <0x00051180>;
+ status = "disabled";
+ reg = <0x121c0000 0x8000>;
+ interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "cmd_irq";
+ clocks = <&gcc SDC4_CLK>, <&gcc SDC4_H_CLK>;
+ clock-names = "mclk", "apb_pclk";
+ bus-width = <4>;
+ cap-sd-highspeed;
+ cap-mmc-highspeed;
+ max-frequency = <48000000>;
+ };
+
sdcc5: sdcc at 12200000 {
compatible = "arm,pl18x", "arm,primecell";
arm,primecell-periphid = <0x00051180>;
--
2.9.3
^ permalink raw reply related [flat|nested] 5+ messages in thread* [PATCH 1/2] ARM: dts: add SDC2 and SDC4 to the MSM8660 family
2017-03-06 8:00 [PATCH 1/2] ARM: dts: add SDC2 and SDC4 to the MSM8660 family Linus Walleij
@ 2017-03-06 13:10 ` Bjorn Andersson
2017-03-06 14:35 ` Stephen Boyd
1 sibling, 0 replies; 5+ messages in thread
From: Bjorn Andersson @ 2017-03-06 13:10 UTC (permalink / raw)
To: linux-arm-kernel
On Mon 06 Mar 09:00 CET 2017, Linus Walleij wrote:
> To make the picture complete, add DTS entries also for the
> second and fourth MMC/SD blocks on the MSM8660. SDC2 is
> an 8-bit interface and SDC4 is a 4-bit interface.
>
> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Regards,
Bjorn
^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH 1/2] ARM: dts: add SDC2 and SDC4 to the MSM8660 family
2017-03-06 8:00 [PATCH 1/2] ARM: dts: add SDC2 and SDC4 to the MSM8660 family Linus Walleij
2017-03-06 13:10 ` Bjorn Andersson
@ 2017-03-06 14:35 ` Stephen Boyd
2017-03-15 9:15 ` Linus Walleij
1 sibling, 1 reply; 5+ messages in thread
From: Stephen Boyd @ 2017-03-06 14:35 UTC (permalink / raw)
To: linux-arm-kernel
On 03/06, Linus Walleij wrote:
> To make the picture complete, add DTS entries also for the
> second and fourth MMC/SD blocks on the MSM8660. SDC2 is
> an 8-bit interface and SDC4 is a 4-bit interface.
>
> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
> ---
> arch/arm/boot/dts/qcom-msm8660.dtsi | 31 +++++++++++++++++++++++++++++++
> 1 file changed, 31 insertions(+)
>
> diff --git a/arch/arm/boot/dts/qcom-msm8660.dtsi b/arch/arm/boot/dts/qcom-msm8660.dtsi
> index 91c9a62ae725..5564ad131325 100644
> --- a/arch/arm/boot/dts/qcom-msm8660.dtsi
> +++ b/arch/arm/boot/dts/qcom-msm8660.dtsi
> @@ -392,6 +392,22 @@
> cap-mmc-highspeed;
> };
>
> + sdcc2: sdcc at 12140000 {
> + status = "disabled";
> + compatible = "arm,pl18x", "arm,primecell";
> + arm,primecell-periphid = <0x00051180>;
> + reg = <0x12140000 0x8000>;
> + interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "cmd_irq";
> + clocks = <&gcc SDC2_CLK>, <&gcc SDC2_H_CLK>;
> + clock-names = "mclk", "apb_pclk";
> + bus-width = <8>;
> + max-frequency = <48000000>;
> + non-removable;
Should things like non-removable or max-frequency be specified in
the base dts? Those seem like board attributes.
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply [flat|nested] 5+ messages in thread* [PATCH 1/2] ARM: dts: add SDC2 and SDC4 to the MSM8660 family
2017-03-06 14:35 ` Stephen Boyd
@ 2017-03-15 9:15 ` Linus Walleij
0 siblings, 0 replies; 5+ messages in thread
From: Linus Walleij @ 2017-03-15 9:15 UTC (permalink / raw)
To: linux-arm-kernel
On Mon, Mar 6, 2017 at 3:35 PM, Stephen Boyd <sboyd@codeaurora.org> wrote:
> On 03/06, Linus Walleij wrote:
>> + bus-width = <8>;
>> + max-frequency = <48000000>;
>> + non-removable;
>
> Should things like non-removable or max-frequency be specified in
> the base dts? Those seem like board attributes.
I dropped non-removable, which is obviously a board attribute.
max-frequency in this case is a cap on how high the IP can go
in this (Qualcomm) variant, on this SoC. A board DTS may need
to override it pushing it downwards because of line characteristics.
Yours,
Linus Walleij
^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH 1/2] ARM: dts: add SDC2 and SDC4 to the MSM8660 family
@ 2017-03-15 9:16 Linus Walleij
0 siblings, 0 replies; 5+ messages in thread
From: Linus Walleij @ 2017-03-15 9:16 UTC (permalink / raw)
To: linux-arm-kernel
To make the picture complete, add DTS entries also for the
second and fourth MMC/SD blocks on the MSM8660. SDC2 is
an 8-bit interface and SDC4 is a 4-bit interface.
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
ChangeLog v1->v2:
- Drop non-removable this is a board-specific attribute.
---
arch/arm/boot/dts/qcom-msm8660.dtsi | 30 ++++++++++++++++++++++++++++++
1 file changed, 30 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-msm8660.dtsi b/arch/arm/boot/dts/qcom-msm8660.dtsi
index 91c9a62ae725..747669a62aa8 100644
--- a/arch/arm/boot/dts/qcom-msm8660.dtsi
+++ b/arch/arm/boot/dts/qcom-msm8660.dtsi
@@ -392,6 +392,21 @@
cap-mmc-highspeed;
};
+ sdcc2: sdcc at 12140000 {
+ status = "disabled";
+ compatible = "arm,pl18x", "arm,primecell";
+ arm,primecell-periphid = <0x00051180>;
+ reg = <0x12140000 0x8000>;
+ interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "cmd_irq";
+ clocks = <&gcc SDC2_CLK>, <&gcc SDC2_H_CLK>;
+ clock-names = "mclk", "apb_pclk";
+ bus-width = <8>;
+ max-frequency = <48000000>;
+ cap-sd-highspeed;
+ cap-mmc-highspeed;
+ };
+
sdcc3: sdcc at 12180000 {
compatible = "arm,pl18x", "arm,primecell";
arm,primecell-periphid = <0x00051180>;
@@ -408,6 +423,21 @@
no-1-8-v;
};
+ sdcc4: sdcc at 121c0000 {
+ compatible = "arm,pl18x", "arm,primecell";
+ arm,primecell-periphid = <0x00051180>;
+ status = "disabled";
+ reg = <0x121c0000 0x8000>;
+ interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "cmd_irq";
+ clocks = <&gcc SDC4_CLK>, <&gcc SDC4_H_CLK>;
+ clock-names = "mclk", "apb_pclk";
+ bus-width = <4>;
+ max-frequency = <48000000>;
+ cap-sd-highspeed;
+ cap-mmc-highspeed;
+ };
+
sdcc5: sdcc at 12200000 {
compatible = "arm,pl18x", "arm,primecell";
arm,primecell-periphid = <0x00051180>;
--
2.9.3
^ permalink raw reply related [flat|nested] 5+ messages in thread
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2017-03-06 8:00 [PATCH 1/2] ARM: dts: add SDC2 and SDC4 to the MSM8660 family Linus Walleij
2017-03-06 13:10 ` Bjorn Andersson
2017-03-06 14:35 ` Stephen Boyd
2017-03-15 9:15 ` Linus Walleij
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