From: antoine.tenart@free-electrons.com (Antoine Tenart)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 3/3] ARM: dts: alpine: add valid clock-frequency values
Date: Wed, 29 Mar 2017 11:38:27 +0200 [thread overview]
Message-ID: <20170329093827.18881-3-antoine.tenart@free-electrons.com> (raw)
In-Reply-To: <20170329093827.18881-1-antoine.tenart@free-electrons.com>
Update the Alpine clock-frequency values with valid default values. The
bootloader can still update these values if needed, but at least we can
boot if it does not.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
---
arch/arm/boot/dts/alpine.dtsi | 14 +++++++-------
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/arch/arm/boot/dts/alpine.dtsi b/arch/arm/boot/dts/alpine.dtsi
index d84bd7955b54..731df7a8c4e6 100644
--- a/arch/arm/boot/dts/alpine.dtsi
+++ b/arch/arm/boot/dts/alpine.dtsi
@@ -41,28 +41,28 @@
compatible = "arm,cortex-a15";
device_type = "cpu";
reg = <0>;
- clock-frequency = <0>; /* Filled by loader */
+ clock-frequency = <1700000000>;
};
cpu at 1 {
compatible = "arm,cortex-a15";
device_type = "cpu";
reg = <1>;
- clock-frequency = <0>; /* Filled by loader */
+ clock-frequency = <1700000000>;
};
cpu at 2 {
compatible = "arm,cortex-a15";
device_type = "cpu";
reg = <2>;
- clock-frequency = <0>; /* Filled by loader */
+ clock-frequency = <1700000000>;
};
cpu at 3 {
compatible = "arm,cortex-a15";
device_type = "cpu";
reg = <3>;
- clock-frequency = <0>; /* Filled by loader */
+ clock-frequency = <1700000000>;
};
};
@@ -81,7 +81,7 @@
<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
- clock-frequency = <0>; /* Filled by loader */
+ clock-frequency = <50000000>;
};
/* Interrupt Controller */
@@ -123,7 +123,7 @@
uart0: uart at fd883000 {
compatible = "ns16550a";
reg = <0x0 0xfd883000 0x0 0x1000>;
- clock-frequency = <0>; /* Filled by loader */
+ clock-frequency = <375000000>;
interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
@@ -132,7 +132,7 @@
uart1: uart at fd884000 {
compatible = "ns16550a";
reg = <0x0 0xfd884000 0x0 0x1000>;
- clock-frequency = <0>; /* Filled by loader */
+ clock-frequency = <375000000>;
interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
--
2.11.0
next prev parent reply other threads:[~2017-03-29 9:38 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-03-29 9:38 [PATCH 1/3] ARM: dts: alpine: remove 0x's from the uart1 node unit address Antoine Tenart
2017-03-29 9:38 ` [PATCH 2/3] ARM: dts: alpine: add spaces before the uart node units Antoine Tenart
2017-04-03 7:08 ` Antoine Tenart
2017-03-29 9:38 ` Antoine Tenart [this message]
2017-04-03 7:08 ` [PATCH 3/3] ARM: dts: alpine: add valid clock-frequency values Antoine Tenart
2017-04-03 7:07 ` [PATCH 1/3] ARM: dts: alpine: remove 0x's from the uart1 node unit address Antoine Tenart
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