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From: maxime.ripard@free-electrons.com (Maxime Ripard)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v4 06/11] drm/sun4i: add support for Allwinner DE2 mixers
Date: Thu, 20 Apr 2017 10:37:07 +0200	[thread overview]
Message-ID: <20170420083707.wdtrdlxpvocpzc7g@lukather> (raw)
In-Reply-To: <88F5FAC9-1873-4C76-9AB9-FF361C07664E@aosc.io>

On Tue, Apr 18, 2017 at 06:47:56PM +0800, Icenowy Zheng wrote:
> >> +	/* Get the physical address of the buffer in memory */
> >> +	gem = drm_fb_cma_get_gem_obj(fb, 0);
> >> +
> >> +	DRM_DEBUG_DRIVER("Using GEM @ %pad\n", &gem->paddr);
> >> +
> >> +	/* Compute the start of the displayed memory */
> >> +	bpp = fb->format->cpp[0];
> >> +	paddr = gem->paddr + fb->offsets[0];
> >> +	paddr += (state->src_x >> 16) * bpp;
> >> +	paddr += (state->src_y >> 16) * fb->pitches[0];
> >> +
> >> +	DRM_DEBUG_DRIVER("Setting buffer address to %pad\n", &paddr);
> >> +
> >> +	paddr_u32 = (uint32_t) paddr;
> >
> >How does that work on 64-bits systems ?
> 
> The hardware is not designed to work on 64-bit systems.
> 
> Even 64-bit A64/H5 has also 3GiB memory limit.

That's a fragile assumption.

> The address cell in mixer hardware is also only 32-bit.
> 
> So we should just keep the force conversion here. If we then really
> met 4GiB-capable AW SoC without changing DE2, I think we should have
> other way to limit CMA pool inside 4GiB.

The register name looks like this is only the lower 32 bits that you
can set here, and that there is another register for the upper 32 bits
of that address somewhere.

In that case, please use the lower_32_bits and upper_32_bits helper,
and don't cast it that way.

If it isn't the case, you should set the DMA mask (through
dma_set_mask) so that we only allocate memory that can be accessed by
this device.

Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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  reply	other threads:[~2017-04-20  8:37 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-04-16 12:08 [PATCH v4 00/11] Initial Allwinner Display Engine 2.0 Support Icenowy Zheng
2017-04-16 12:08 ` [PATCH v4 01/11] dt-bindings: add binding for the Allwinner DE2 CCU Icenowy Zheng
2017-04-20 13:58   ` Rob Herring
2017-04-16 12:08 ` [PATCH v4 02/11] clk: sunxi-ng: add support for " Icenowy Zheng
2017-04-20 14:02   ` Rob Herring
2017-04-20 14:36     ` Maxime Ripard
2017-04-20 22:36       ` Rob Herring
2017-04-16 12:08 ` [PATCH v4 03/11] dt-bindings: add bindings for DE2 on V3s SoC Icenowy Zheng
2017-04-20 14:05   ` Rob Herring
2017-04-16 12:08 ` [PATCH v4 04/11] drm/sun4i: return only planes for layers created Icenowy Zheng
2017-04-16 12:08 ` [PATCH v4 05/11] drm/sun4i: abstract a engine type Icenowy Zheng
2017-04-18  8:55   ` Maxime Ripard
2017-04-18 11:05     ` Icenowy Zheng
2017-04-20 14:39       ` Maxime Ripard
2017-04-16 12:08 ` [PATCH v4 06/11] drm/sun4i: add support for Allwinner DE2 mixers Icenowy Zheng
2017-04-18  9:00   ` Maxime Ripard
2017-04-18 10:47     ` Icenowy Zheng
2017-04-20  8:37       ` Maxime Ripard [this message]
2017-04-21  8:18         ` icenowy at aosc.io
2017-04-16 12:08 ` [PATCH v4 07/11] drm/sun4i: Add compatible string for V3s display engine Icenowy Zheng
2017-04-16 12:08 ` [PATCH v4 08/11] drm/sun4i: tcon: add support for V3s TCON Icenowy Zheng
2017-04-16 12:08 ` [PATCH v4 09/11] ARM: dts: sun8i: add DE2 nodes for V3s SoC Icenowy Zheng
2017-04-16 12:08 ` [PATCH v4 10/11] ARM: dts: sun8i: add pinmux for LCD pins of " Icenowy Zheng
2017-04-16 12:08 ` [PATCH v4 11/11] [DO NOT MERGE] ARM: dts: sun8i: enable LCD panel of Lichee Pi Zero Icenowy Zheng

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