From: david.daney@cavium.com (David Daney)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 1/2] arm64: Add MIDR values for Cavium cn83XX SoCs
Date: Mon, 24 Apr 2017 11:42:49 -0700 [thread overview]
Message-ID: <20170424184250.667-2-david.daney@cavium.com> (raw)
In-Reply-To: <20170424184250.667-1-david.daney@cavium.com>
Signed-off-by: David Daney <david.daney@cavium.com>
---
arch/arm64/include/asm/cputype.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/include/asm/cputype.h b/arch/arm64/include/asm/cputype.h
index 0984d1b..235e77d 100644
--- a/arch/arm64/include/asm/cputype.h
+++ b/arch/arm64/include/asm/cputype.h
@@ -86,6 +86,7 @@
#define CAVIUM_CPU_PART_THUNDERX 0x0A1
#define CAVIUM_CPU_PART_THUNDERX_81XX 0x0A2
+#define CAVIUM_CPU_PART_THUNDERX_83XX 0x0A3
#define BRCM_CPU_PART_VULCAN 0x516
@@ -96,6 +97,7 @@
#define MIDR_CORTEX_A73 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A73)
#define MIDR_THUNDERX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX)
#define MIDR_THUNDERX_81XX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX_81XX)
+#define MIDR_THUNDERX_83XX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX_83XX)
#define MIDR_QCOM_FALKOR_V1 MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_FALKOR_V1)
#ifndef __ASSEMBLY__
--
2.7.4
next prev parent reply other threads:[~2017-04-24 18:42 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-04-24 18:42 [PATCH 0/2] arm64: Workaround for Thunder KVM hang issues David Daney
2017-04-24 18:42 ` David Daney [this message]
2017-04-24 18:42 ` [PATCH 2/2] arm64: Add workaround for Cavium Thunder erratum 30115 David Daney
2017-05-01 4:53 ` [PATCH 0/2] arm64: Workaround for Thunder KVM hang issues Jon Masters
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