From mboxrd@z Thu Jan 1 00:00:00 1970 From: icenowy@aosc.io (Icenowy Zheng) Date: Wed, 26 Apr 2017 23:20:14 +0800 Subject: [PATCH v5 01/10] arm64: allwinner: a64: enable RSB on A64 In-Reply-To: <20170426152023.41567-1-icenowy@aosc.io> References: <20170426152023.41567-1-icenowy@aosc.io> Message-ID: <20170426152023.41567-2-icenowy@aosc.io> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Allwinner A64 have a RSB controller like the one on A23/A33 SoCs. Add it and its pinmux. Signed-off-by: Icenowy Zheng Acked-by: Chen-Yu Tsai --- Changes in v2: - Removed bonus properties in pio node. - Added Chen-Yu's ACK. arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi index c7f669f5884f..05ec9fc5e81f 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi @@ -422,6 +422,25 @@ #gpio-cells = <3>; interrupt-controller; #interrupt-cells = <3>; + + r_rsb_pins: rsb at 0 { + pins = "PL0", "PL1"; + function = "s_rsb"; + }; + }; + + r_rsb: rsb at 1f03400 { + compatible = "allwinner,sun8i-a23-rsb"; + reg = <0x01f03400 0x400>; + interrupts = ; + clocks = <&r_ccu 6>; + clock-frequency = <3000000>; + resets = <&r_ccu 2>; + pinctrl-names = "default"; + pinctrl-0 = <&r_rsb_pins>; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; }; }; }; -- 2.12.2