linux-arm-kernel.lists.infradead.org archive mirror
 help / color / mirror / Atom feed
From: vinod.koul@intel.com (Vinod Koul)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 4/6] dma: pl08x: Add support for Faraday Technology FTDMAC020
Date: Sun, 14 May 2017 18:04:18 +0530	[thread overview]
Message-ID: <20170514123418.GH6263@localhost> (raw)
In-Reply-To: <20170408120457.22750-4-linus.walleij@linaro.org>

On Sat, Apr 08, 2017 at 02:04:55PM +0200, Linus Walleij wrote:

> +#define FTDMAC020_CH_CSR_FIFOTH_MSK		(0x7 << 24)

IIUC we can have a GENMASK(27, 25), won't that be a bit better here and
other places?

> +#define FTDMAC020_CH_CSR_FIFOTH_SHIFT		(24)

and you may use ffs(FTDMAC020_CH_CSR_FIFOTH_MSK) or keep a shift define

> +#define FTDMAC020_CH_CSR_CHPR1_MSK		(0x3 << 22)
> +#define FTDMAC020_CH_CSR_PROT3			BIT(21)
> +#define FTDMAC020_CH_CSR_PROT2			BIT(20)
> +#define FTDMAC020_CH_CSR_PROT1			BIT(19)
> +#define FTDMAC020_CH_CSR_SRC_SIZE_MSK		(0x7 << 16)
> +#define FTDMAC020_CH_CSR_SRC_SIZE_SHIFT		(16)
> +#define FTDMAC020_CH_CSR_ABT			BIT(15)
> +#define FTDMAC020_CH_CSR_SRC_WIDTH_MSK		(0x7 << 11)
> +#define FTDMAC020_CH_CSR_SRC_WIDTH_SHIFT	(11)
> +#define FTDMAC020_CH_CSR_DST_WIDTH_MSK		(0x7 << 8)
> +#define FTDMAC020_CH_CSR_DST_WIDTH_SHIFT	(8)
> +#define FTDMAC020_CH_CSR_MODE			BIT(7)
> +/* 00 = increase, 01 = decrease, 10 = fix */
> +#define FTDMAC020_CH_CSR_SRCAD_CTL_MSK		(0x3 << 5)
> +#define FTDMAC020_CH_CSR_SRCAD_CTL_SHIFT	(5)
> +#define FTDMAC020_CH_CSR_DSTAD_CTL_MSK		(0x3 << 3)
> +#define FTDMAC020_CH_CSR_DSTAD_CTL_SHIFT	(3)
> +#define FTDMAC020_CH_CSR_SRC_SEL		BIT(2)
> +#define FTDMAC020_CH_CSR_DST_SEL		BIT(1)
> +#define FTDMAC020_CH_CSR_EN			BIT(0)
> +
> +/* FIFO threshold setting */
> +#define FTDMAC020_CH_CSR_FIFOTH_1		(0x0)
> +#define FTDMAC020_CH_CSR_FIFOTH_2		(0x1)
> +#define FTDMAC020_CH_CSR_FIFOTH_4		(0x2)
> +#define FTDMAC020_CH_CSR_FIFOTH_8		(0x3)
> +#define FTDMAC020_CH_CSR_FIFOTH_16		(0x4)
> +/* The FTDMAC020 supports 64bit wide transfers */
> +#define FTDMAC020_WIDTH_64BIT			(0x3)
> +/* Address can be increased, decreased or fixed */
> +#define FTDMAC020_CH_CSR_SRCAD_CTL_INC		(0x0)
> +#define FTDMAC020_CH_CSR_SRCAD_CTL_DEC		(0x1)
> +#define FTDMAC020_CH_CSR_SRCAD_CTL_FIXED	(0x2)
> +
> +#define FTDMAC020_CH_CFG_LLP_CNT_MASK		(0xf << 16)
> +#define FTDMAC020_CH_CFG_LLP_CNT_SHIFT		(16)
> +#define FTDMAC020_CH_CFG_BUSY			BIT(8)
> +#define FTDMAC020_CH_CFG_INT_ABT_MASK		BIT(2)
> +#define FTDMAC020_CH_CFG_INT_ERR_MASK		BIT(1)
> +#define FTDMAC020_CH_CFG_INT_TC_MASK		BIT(0)
> +
> +/* Inside the LLIs, the applicable CSR fields are mapped differently */
> +#define FTDMAC020_LLI_TC_MSK			BIT(28)
> +#define FTDMAC020_LLI_SRC_WIDTH_MSK		(0x7 << 25)
> +#define FTDMAC020_LLI_SRC_WIDTH_SHIFT		(25)
> +#define FTDMAC020_LLI_DST_WIDTH_MSK		(0x7 << 22)
> +#define FTDMAC020_LLI_DST_WIDTH_SHIFT		(22)
> +#define FTDMAC020_LLI_SRCAD_CTL_MSK		(0x3 << 20)
> +#define FTDMAC020_LLI_SRCAD_CTL_SHIFT		(20)
> +#define FTDMAC020_LLI_DSTAD_CTL_MSK		(0x3 << 18)
> +#define FTDMAC020_LLI_DSTAD_CTL_SHIFT		(18)
> +#define FTDMAC020_LLI_SRC_SEL			BIT(17)
> +#define FTDMAC020_LLI_DST_SEL			BIT(16)
> +#define FTDMAC020_LLI_TRANSFER_SIZE_MASK	(0xfff << 0)
> +#define FTDMAC020_LLI_TRANSFER_SIZE_SHIFT	(0)
> +
> +#define FTDMAC020_CFG_LLP_CNT_MASK		(0x0f << 16)
> +#define FTDMAC020_CFG_LLP_CNT_SHIFT		(16)
> +#define FTDMAC020_CFG_BUSY			BIT(8)
> +#define FTDMAC020_CFG_INT_ABT_MSK		BIT(2)
> +#define FTDMAC020_CFG_INT_ERR_MSK		BIT(1)
> +#define FTDMAC020_CFG_INT_TC_MSK		BIT(0)
> +
>  /* DMA linked list chain structure */
>  
>  struct pl080_lli {
> -- 
> 2.9.3
> 

-- 
~Vinod

  reply	other threads:[~2017-05-14 12:34 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-04-08 12:04 [PATCH 1/6] ARM/dma: pl08x: pass reasonable memcpy settings Linus Walleij
2017-04-08 12:04 ` [PATCH 2/6] dma: pl08x: Add Faraday FTDMAC020 to compatible list Linus Walleij
2017-04-13 20:03   ` Rob Herring
2017-04-08 12:04 ` [PATCH 3/6] dma: pl08x: Make slave engine optional Linus Walleij
2017-04-08 12:04 ` [PATCH 4/6] dma: pl08x: Add support for Faraday Technology FTDMAC020 Linus Walleij
2017-05-14 12:34   ` Vinod Koul [this message]
2017-05-20 17:56     ` Linus Walleij
2017-05-24  4:11       ` Vinod Koul
2017-04-08 12:04 ` [PATCH 5/6] ARM: gemini: select ARM_AMBA Linus Walleij
2017-04-08 12:04 ` [PATCH 6/6] ARM: dts: Add Gemini DMA controller Linus Walleij
2017-04-19 13:58 ` [PATCH 1/6] ARM/dma: pl08x: pass reasonable memcpy settings Olof Johansson
2017-04-19 19:43   ` Arnd Bergmann

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20170514123418.GH6263@localhost \
    --to=vinod.koul@intel.com \
    --cc=linux-arm-kernel@lists.infradead.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).