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From: tony@atomide.com (Tony Lindgren)
To: linux-arm-kernel@lists.infradead.org
Subject: [CFT] Always enable SMP mode on MP capable CPUs
Date: Wed, 24 May 2017 08:38:47 -0700	[thread overview]
Message-ID: <20170524153847.GY10472@atomide.com> (raw)
In-Reply-To: <20170519171526.GW22219@n2100.armlinux.org.uk>

* Russell King - ARM Linux <linux@armlinux.org.uk> [170519 10:19]:
> On Fri, May 19, 2017 at 02:07:28PM -0300, Fabio Estevam wrote:
> > On Thu, May 18, 2017 at 3:09 PM, Fabio Estevam <festevam@gmail.com> wrote:
> > 
> > > I tested this patch on a mx6ul, which is CortexA7 UP using USB serial
> > > download mode.
> > >
> > > In this boot mode the ROM code does not set the SMP bit and I can
> > > notice a very slow boot progress with CONFIG_SMP=n with an original
> > > 4.12-rc1.
> > >
> > > With this patch applied it boots with the correct speed, so:
> > 
> > However the kernel still takes a long time to decompress when the
> > bootloader or ROM does not set the SMP bit.
> > 
> > After it decompress, then it boots quickly.
> > 
> > Should the SMP bit be set inside arch/arm/boot/compressed/head.S?
> 
> We could expand the table to positively identify the SMP capable CPUs
> and enable the SMP bit there, but it's going to add a lot of entries
> there (one for each specific ARMv7 MP CPU) and is going to have to be
> endlessly added to each time a new SMP CPU comes out.

Looks like commit e414690faa81 ("ARM: always enable SMP mode on SMP cores")
causes booting to fail early at least on omap4430 duovero. It's a bit of
a mystery as it is SMP.. And pandboard es (4460) and droid 4 (4430) work
without the conditional write..

Partial revert like below seems to make it boot again.

Regards,

Tony

8< -------------------
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S
index 4d48a4cf563b..ad653ec0835e 100644
--- a/arch/arm/mm/proc-v7.S
+++ b/arch/arm/mm/proc-v7.S
@@ -289,7 +289,8 @@ __v7_ca17mp_setup:
 	mrc	p15, 0, r0, c1, c0, 1
 	orr	r10, r10, #(1 << 6)		@ Enable SMP/nAMP mode
 	orr	r10, r10, r0			@ Set required bits
-	mcr	p15, 0, r10, c1, c0, 1		@ No, update register
+	teq	r10, r0				@ Were they already set?
+	mcrne	p15, 0, r10, c1, c0, 1		@ No, update register
 	b	__v7_setup_cont
 
 /*

  reply	other threads:[~2017-05-24 15:38 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-05-18 10:52 [CFT] Always enable SMP mode on MP capable CPUs Russell King - ARM Linux
2017-05-18 18:09 ` Fabio Estevam
2017-05-19 17:07   ` Fabio Estevam
2017-05-19 17:15     ` Russell King - ARM Linux
2017-05-24 15:38       ` Tony Lindgren [this message]
2017-05-25 14:48         ` Russell King - ARM Linux
2017-05-25 15:11           ` Tony Lindgren
2017-05-25 18:05             ` Russell King - ARM Linux
2017-05-25 22:13               ` Tony Lindgren
2017-05-26 11:22                 ` afzal mohammed
2017-05-27 13:22                   ` Russell King - ARM Linux
2017-05-31 14:39                     ` Tony Lindgren
2017-05-31 14:59                       ` Russell King - ARM Linux
2017-05-31 15:07                         ` Tony Lindgren
2017-05-24 15:50 ` afzal mohammed
2017-05-25 16:15 ` Florian Fainelli
2017-05-25 16:56   ` Russell King - ARM Linux
2017-05-25 17:10     ` Tony Lindgren
2017-05-25 17:24     ` Florian Fainelli
2017-05-26  9:44 ` Vladimir Murzin

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