[PATCH 1/2] dt-bindings: timer: add nxp tpm timer binding doc

[PATCH 1/2] dt-bindings: timer: add nxp tpm timer binding doc

[Dong Aisheng]

Adding NXP Low Power Timer/Pulse Width Modulation Module (TPM)
binding doc.

Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: devicetree at vger.kernel.org
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Bai Ping <ping.bai@nxp.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
---
 .../devicetree/bindings/timer/nxp,tpm-timer.txt    | 28 ++++++++++++++++++++++
 1 file changed, 28 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/timer/nxp,tpm-timer.txt

diff --git a/Documentation/devicetree/bindings/timer/nxp,tpm-timer.txt b/Documentation/devicetree/bindings/timer/nxp,tpm-timer.txt
new file mode 100644
index 0000000..b4aa7dd
--- /dev/null
+++ b/Documentation/devicetree/bindings/timer/nxp,tpm-timer.txt
@@ -0,0 +1,28 @@
+NXP Low Power Timer/Pulse Width Modulation Module (TPM)
+
+The Timer/PWM Module (TPM) supports input capture, output compare,
+and the generation of PWM signals to control electric motor and power
+management applications. The counter, compare and capture registers
+are clocked by an asynchronous clock that can remain enabled in low
+power modes. TPM can support global counter bus where one TPM drives
+the counter bus for the others, provided bit width is the same.
+
+Required properties:
+
+- compatible :	should be "fsl,imx7ulp-tpm"
+- reg :		Specifies base physical address and size of the register sets
+		for the clock event device and clock source device.
+- interrupts :	Should be the clock event device interrupt.
+- clocks :	The clocks provided by the SoC to drive the timer, must contain
+		an entry for each entry in clock-names.
+- clock-names : Must include the following entries: "igp" and "per".
+
+Example:
+tpm5: tpm at 40260000 {
+	compatible = "fsl,imx7ulp-tpm";
+	reg = <0x40260000 0x1000>;
+	interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
+	clocks = <&clks IMX7ULP_CLK_NIC1_BUS_DIV>,
+		 <&clks IMX7ULP_CLK_LPTPM5>;
+	clock-names = "ipg", "per";
+};
-- 
2.7.4

[PATCH 2/2] timer: imx-tpm: add imx tpm timer support

[Dong Aisheng]

IMX Timer/PWM Module (TPM) supports both timer and pwm function while
this patch only adds the timer support. PWM would be added later.

The TPM counter, compare and capture registers are clocked by an
asynchronous clock that can remain enabled in low power modes.

Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Bai Ping <ping.bai@nxp.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
---
 drivers/clocksource/Kconfig         |   5 +
 drivers/clocksource/Makefile        |   1 +
 drivers/clocksource/timer-imx-tpm.c | 204 ++++++++++++++++++++++++++++++++++++
 3 files changed, 210 insertions(+)
 create mode 100644 drivers/clocksource/timer-imx-tpm.c

diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
index 3356ab8..03dfd6a 100644
--- a/drivers/clocksource/Kconfig
+++ b/drivers/clocksource/Kconfig
@@ -590,6 +590,11 @@ config CLKSRC_IMX_GPT
 	depends on ARM && CLKDEV_LOOKUP
 	select CLKSRC_MMIO
 
+config CLKSRC_IMX_TPM
+	bool "Clocksource using i.MX TPM" if COMPILE_TEST
+	depends on ARM && CLKDEV_LOOKUP && GENERIC_CLOCKEVENTS
+	select CLKSRC_MMIO
+
 config CLKSRC_ST_LPC
 	bool "Low power clocksource found in the LPC" if COMPILE_TEST
 	select CLKSRC_OF if OF
diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile
index d227d13..7a8c0d1 100644
--- a/drivers/clocksource/Makefile
+++ b/drivers/clocksource/Makefile
@@ -67,6 +67,7 @@ obj-$(CONFIG_CLKSRC_VERSATILE)		+= versatile.o
 obj-$(CONFIG_CLKSRC_MIPS_GIC)		+= mips-gic-timer.o
 obj-$(CONFIG_CLKSRC_TANGO_XTAL)		+= tango_xtal.o
 obj-$(CONFIG_CLKSRC_IMX_GPT)		+= timer-imx-gpt.o
+obj-$(CONFIG_CLKSRC_IMX_TPM)		+= timer-imx-tpm.o
 obj-$(CONFIG_ASM9260_TIMER)		+= asm9260_timer.o
 obj-$(CONFIG_H8300_TMR8)		+= h8300_timer8.o
 obj-$(CONFIG_H8300_TMR16)		+= h8300_timer16.o
diff --git a/drivers/clocksource/timer-imx-tpm.c b/drivers/clocksource/timer-imx-tpm.c
new file mode 100644
index 0000000..f8a8a04
--- /dev/null
+++ b/drivers/clocksource/timer-imx-tpm.c
@@ -0,0 +1,204 @@
+/*
+ * Copyright 2016 Freescale Semiconductor, Inc.
+ * Copyright 2017 NXP
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ */
+
+#include <linux/clk.h>
+#include <linux/clockchips.h>
+#include <linux/clocksource.h>
+#include <linux/delay.h>
+#include <linux/interrupt.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
+#include <linux/sched_clock.h>
+
+#define TPM_SC				0x10
+#define TPM_SC_CMOD_INC_PER_CNT		(0x1 << 3)
+#define TPM_SC_CMOD_DIV_DEFAULT		0x3
+#define TPM_CNT				0x14
+#define TPM_MOD				0x18
+#define TPM_STATUS			0x1c
+#define TPM_STATUS_CH0F			BIT(0)
+#define TPM_C0SC			0x20
+#define TPM_C0SC_CHIE			BIT(6)
+#define TPM_C0SC_MODE_SHIFT		2
+#define TPM_C0SC_MODE_MASK		0x3c
+#define TPM_C0SC_MODE_SW_COMPARE	0x4
+#define TPM_C0V				0x24
+
+static void __iomem *timer_base;
+static struct clock_event_device clockevent_tpm;
+
+static inline void tpm_timer_disable(void)
+{
+	unsigned int val;
+
+	/* channel disable */
+	val = __raw_readl(timer_base + TPM_C0SC);
+	val &= ~(TPM_C0SC_MODE_MASK | TPM_C0SC_CHIE);
+	__raw_writel(val, timer_base + TPM_C0SC);
+}
+
+static inline void tpm_timer_enable(void)
+{
+	unsigned int val;
+
+	/* channel enabled in sw compare mode */
+	val = __raw_readl(timer_base + TPM_C0SC);
+	val |= (TPM_C0SC_MODE_SW_COMPARE << TPM_C0SC_MODE_SHIFT) |
+	       TPM_C0SC_CHIE;
+	__raw_writel(val, timer_base + TPM_C0SC);
+}
+
+static inline void tpm_irq_acknowledge(void)
+{
+	__raw_writel(TPM_STATUS_CH0F, timer_base + TPM_STATUS);
+}
+
+static struct delay_timer tpm_delay_timer;
+
+static unsigned long tpm_read_current_timer(void)
+{
+	return __raw_readl(timer_base + TPM_CNT);
+}
+
+static u64 notrace tpm_read_sched_clock(void)
+{
+	return __raw_readl(timer_base + TPM_CNT);
+}
+
+static int __init tpm_clocksource_init(unsigned long rate)
+{
+	tpm_delay_timer.read_current_timer = &tpm_read_current_timer;
+	tpm_delay_timer.freq = rate;
+	register_current_timer_delay(&tpm_delay_timer);
+
+	sched_clock_register(tpm_read_sched_clock, 32, rate);
+
+	return clocksource_mmio_init(timer_base + TPM_CNT, "imx-tpm",
+				     rate, 200, 32, clocksource_mmio_readl_up);
+}
+
+static int tpm_set_next_event(unsigned long delta,
+				struct clock_event_device *evt)
+{
+	unsigned long next, now;
+
+	next = __raw_readl(timer_base + TPM_CNT) + delta;
+	__raw_writel(next, timer_base + TPM_C0V);
+	now = __raw_readl(timer_base + TPM_CNT);
+
+	return (int)((next - now) <= 0) ? -ETIME : 0;
+}
+
+static int tpm_set_state_oneshot(struct clock_event_device *evt)
+{
+	tpm_timer_enable();
+
+	return 0;
+}
+
+static int tpm_set_state_shutdown(struct clock_event_device *evt)
+{
+	tpm_timer_disable();
+
+	return 0;
+}
+
+static irqreturn_t tpm_timer_interrupt(int irq, void *dev_id)
+{
+	struct clock_event_device *evt = &clockevent_tpm;
+
+	tpm_irq_acknowledge();
+
+	evt->event_handler(evt);
+
+	return IRQ_HANDLED;
+}
+
+static struct clock_event_device clockevent_tpm = {
+	.name			= "i.MX7ULP TPM Timer",
+	.features		= CLOCK_EVT_FEAT_ONESHOT,
+	.set_state_oneshot	= tpm_set_state_oneshot,
+	.set_next_event		= tpm_set_next_event,
+	.set_state_shutdown	= tpm_set_state_shutdown,
+	.rating			= 200,
+};
+
+static struct irqaction tpm_timer_irq = {
+	.name		= "i.MX7ULP TPM Timer",
+	.flags		= IRQF_TIMER | IRQF_IRQPOLL,
+	.handler	= tpm_timer_interrupt,
+	.dev_id		= &clockevent_tpm,
+};
+
+static int __init tpm_clockevent_init(unsigned long rate, int irq)
+{
+	setup_irq(irq, &tpm_timer_irq);
+
+	clockevent_tpm.cpumask = cpumask_of(0);
+	clockevent_tpm.irq = irq;
+	clockevents_config_and_register(&clockevent_tpm,
+					rate, 0xff, 0xfffffffe);
+
+	return 0;
+}
+
+static int __init tpm_timer_init(struct device_node *np)
+{
+	struct clk *ipg, *per;
+	u32 rate;
+	int irq;
+
+	timer_base = of_iomap(np, 0);
+	if (!timer_base) {
+		pr_err("tpm: failed to get base address\n");
+		return -ENXIO;
+	}
+
+	irq = irq_of_parse_and_map(np, 0);
+	if (!irq)
+		return -EINVAL;
+
+	ipg = of_clk_get_by_name(np, "ipg");
+	per = of_clk_get_by_name(np, "per");
+	if (IS_ERR(ipg) || IS_ERR(per)) {
+		pr_err("tpm: failed to get igp or per clk\n");
+		return -ENODEV;
+	}
+
+	/* enable clk before accessing registers */
+	clk_prepare_enable(ipg);
+	clk_prepare_enable(per);
+
+	/*
+	 * Initialize tpm module to a known state
+	 * 1) Counter disabled
+	 * 2) TPM counter operates in up counting mode
+	 * 3) Timer Overflow Interrupt disabled
+	 * 4) Channel0 disabled
+	 * 5) DMA transfers disabled
+	 */
+	__raw_writel(0, timer_base + TPM_SC);
+	__raw_writel(0, timer_base + TPM_CNT);
+	__raw_writel(0, timer_base + TPM_C0SC);
+
+	/* increase per cnt, div 8 by default */
+	__raw_writel(TPM_SC_CMOD_INC_PER_CNT | TPM_SC_CMOD_DIV_DEFAULT,
+		     timer_base + TPM_SC);
+
+	/* set MOD register to maximum for free running mode */
+	__raw_writel(0xffffffff, timer_base + TPM_MOD);
+
+	rate = clk_get_rate(per) / 8;
+	tpm_clocksource_init(rate);
+	tpm_clockevent_init(rate, irq);
+
+	return 0;
+}
+CLOCKSOURCE_OF_DECLARE(imx7ulp, "fsl,imx7ulp-tpm", tpm_timer_init);
-- 
2.7.4

[PATCH 1/2] dt-bindings: timer: add nxp tpm timer binding doc

[Rob Herring]

On Sat, May 13, 2017 at 03:29:34PM +0800, Dong Aisheng wrote:
> Adding NXP Low Power Timer/Pulse Width Modulation Module (TPM)
> binding doc.
> 
> Cc: Rob Herring <robh+dt@kernel.org>
> Cc: Mark Rutland <mark.rutland@arm.com>
> Cc: devicetree at vger.kernel.org
> Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
> Cc: Thomas Gleixner <tglx@linutronix.de>
> Cc: Shawn Guo <shawnguo@kernel.org>
> Cc: Bai Ping <ping.bai@nxp.com>
> Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
> ---
>  .../devicetree/bindings/timer/nxp,tpm-timer.txt    | 28 ++++++++++++++++++++++
>  1 file changed, 28 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/timer/nxp,tpm-timer.txt

Acked-by: Rob Herring <robh@kernel.org>

[PATCH 2/2] timer: imx-tpm: add imx tpm timer support

[Daniel Lezcano]

On Sat, May 13, 2017 at 03:29:35PM +0800, Dong Aisheng wrote:
> IMX Timer/PWM Module (TPM) supports both timer and pwm function while
> this patch only adds the timer support. PWM would be added later.
> 
> The TPM counter, compare and capture registers are clocked by an
> asynchronous clock that can remain enabled in low power modes.
> 
> Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
> Cc: Thomas Gleixner <tglx@linutronix.de>
> Cc: Shawn Guo <shawnguo@kernel.org>
> Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
> Signed-off-by: Bai Ping <ping.bai@nxp.com>
> Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
> ---

[ ... ]

> +	val = __raw_readl(timer_base + TPM_C0SC);
> +	val &= ~(TPM_C0SC_MODE_MASK | TPM_C0SC_CHIE);
> +	__raw_writel(val, timer_base + TPM_C0SC);

Hi Dong,

why are you using __raw_write/__raw_read instead of regular readl/writel?

[PATCH 2/2] timer: imx-tpm: add imx tpm timer support

[Arnd Bergmann]

On Sat, May 13, 2017 at 9:29 AM, Dong Aisheng <aisheng.dong@nxp.com> wrote:

> diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
> index 3356ab8..03dfd6a 100644
> --- a/drivers/clocksource/Kconfig
> +++ b/drivers/clocksource/Kconfig
> @@ -590,6 +590,11 @@ config CLKSRC_IMX_GPT
>         depends on ARM && CLKDEV_LOOKUP
>         select CLKSRC_MMIO
>
> +config CLKSRC_IMX_TPM
> +       bool "Clocksource using i.MX TPM" if COMPILE_TEST
> +       depends on ARM && CLKDEV_LOOKUP && GENERIC_CLOCKEVENTS
> +       select CLKSRC_MMIO
> +

This needs a help text


> +static inline void tpm_timer_disable(void)
> +{
> +       unsigned int val;
> +
> +       /* channel disable */
> +       val = __raw_readl(timer_base + TPM_C0SC);
> +       val &= ~(TPM_C0SC_MODE_MASK | TPM_C0SC_CHIE);
> +       __raw_writel(val, timer_base + TPM_C0SC);
> +}

__raw_readl/__raw_writel is broken on big-endian kernels, please
use readl/writel instead.

        Arnd

[PATCH 2/2] timer: imx-tpm: add imx tpm timer support

[Dong Aisheng]

Hi Arnd,

On Thu, May 25, 2017 at 11:02:22PM +0200, Arnd Bergmann wrote:
> On Sat, May 13, 2017 at 9:29 AM, Dong Aisheng <aisheng.dong@nxp.com> wrote:
> 
> > diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
> > index 3356ab8..03dfd6a 100644
> > --- a/drivers/clocksource/Kconfig
> > +++ b/drivers/clocksource/Kconfig
> > @@ -590,6 +590,11 @@ config CLKSRC_IMX_GPT
> >         depends on ARM && CLKDEV_LOOKUP
> >         select CLKSRC_MMIO
> >
> > +config CLKSRC_IMX_TPM
> > +       bool "Clocksource using i.MX TPM" if COMPILE_TEST
> > +       depends on ARM && CLKDEV_LOOKUP && GENERIC_CLOCKEVENTS
> > +       select CLKSRC_MMIO
> > +
> 
> This needs a help text
> 

Got it

> 
> > +static inline void tpm_timer_disable(void)
> > +{
> > +       unsigned int val;
> > +
> > +       /* channel disable */
> > +       val = __raw_readl(timer_base + TPM_C0SC);
> > +       val &= ~(TPM_C0SC_MODE_MASK | TPM_C0SC_CHIE);
> > +       __raw_writel(val, timer_base + TPM_C0SC);
> > +}
> 
> __raw_readl/__raw_writel is broken on big-endian kernels, please
> use readl/writel instead.
> 

That's true.

Thanks for the kind reminder.

Regards
Dong Aisheng

>         Arnd

[PATCH 2/2] timer: imx-tpm: add imx tpm timer support

[Dong Aisheng]

Hi Daniel,

On Thu, May 25, 2017 at 10:54:55PM +0200, Daniel Lezcano wrote:
> On Sat, May 13, 2017 at 03:29:35PM +0800, Dong Aisheng wrote:
> > IMX Timer/PWM Module (TPM) supports both timer and pwm function while
> > this patch only adds the timer support. PWM would be added later.
> > 
> > The TPM counter, compare and capture registers are clocked by an
> > asynchronous clock that can remain enabled in low power modes.
> > 
> > Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
> > Cc: Thomas Gleixner <tglx@linutronix.de>
> > Cc: Shawn Guo <shawnguo@kernel.org>
> > Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
> > Signed-off-by: Bai Ping <ping.bai@nxp.com>
> > Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
> > ---
> 
> [ ... ]
> 
> > +	val = __raw_readl(timer_base + TPM_C0SC);
> > +	val &= ~(TPM_C0SC_MODE_MASK | TPM_C0SC_CHIE);
> > +	__raw_writel(val, timer_base + TPM_C0SC);
> 
> Hi Dong,
> 
> why are you using __raw_write/__raw_read instead of regular readl/writel?
> 

Sorry for missing the second throught of it.

Will change to readl/writel as Arnd pointed out in another mail.

Regards
Dong Aisheng