From mboxrd@z Thu Jan 1 00:00:00 1970 From: leo.yan@linaro.org (Leo Yan) Date: Tue, 30 May 2017 18:44:55 +0800 Subject: [PATCH v13 9/9] arm64: dts: qcom: msm8916: Add debug unit In-Reply-To: <1495728253-30970-1-git-send-email-leo.yan@linaro.org> References: <1495728253-30970-1-git-send-email-leo.yan@linaro.org> Message-ID: <20170530104455.GD7177@leoy-ThinkPad-T440> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Hi Andy, David, [ + Nico ] On Fri, May 26, 2017 at 12:04:13AM +0800, Leo Yan wrote: > Add debug unit on Qualcomm msm8916 based platforms, including the > DragonBoard 410c board. Could you take a look for this patch? After get your ACK I think Mathieu could help pick up this patch through coresight repository. If you want me to send a separate patch to you directly, also is okay. Please let me know which is your preferring. Thanks, Leo Yan > Reviewed-by: Mathieu Poirier > Signed-off-by: Leo Yan > --- > arch/arm64/boot/dts/qcom/msm8916.dtsi | 32 ++++++++++++++++++++++++++++++++ > 1 file changed, 32 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi > index ab30939..17691ab 100644 > --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi > +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi > @@ -1116,6 +1116,38 @@ > }; > }; > > + debug at 850000 { > + compatible = "arm,coresight-cpu-debug","arm,primecell"; > + reg = <0x850000 0x1000>; > + clocks = <&rpmcc RPM_QDSS_CLK>; > + clock-names = "apb_pclk"; > + cpu = <&CPU0>; > + }; > + > + debug at 852000 { > + compatible = "arm,coresight-cpu-debug","arm,primecell"; > + reg = <0x852000 0x1000>; > + clocks = <&rpmcc RPM_QDSS_CLK>; > + clock-names = "apb_pclk"; > + cpu = <&CPU1>; > + }; > + > + debug at 854000 { > + compatible = "arm,coresight-cpu-debug","arm,primecell"; > + reg = <0x854000 0x1000>; > + clocks = <&rpmcc RPM_QDSS_CLK>; > + clock-names = "apb_pclk"; > + cpu = <&CPU2>; > + }; > + > + debug at 856000 { > + compatible = "arm,coresight-cpu-debug","arm,primecell"; > + reg = <0x856000 0x1000>; > + clocks = <&rpmcc RPM_QDSS_CLK>; > + clock-names = "apb_pclk"; > + cpu = <&CPU3>; > + }; > + > etm at 85c000 { > compatible = "arm,coresight-etm4x", "arm,primecell"; > reg = <0x85c000 0x1000>; > -- > 2.7.4 >