From: cdall@linaro.org (Christoffer Dall)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 05/25] KVM: arm64: vgic-v3: Add ICV_BPR1_EL1 handler
Date: Tue, 6 Jun 2017 11:41:00 +0200 [thread overview]
Message-ID: <20170606094100.GK9464@cbox> (raw)
In-Reply-To: <5b8acdaf-e5a5-25fd-fffe-5ff42d501ee0@arm.com>
On Mon, Jun 05, 2017 at 10:58:57AM +0100, Marc Zyngier wrote:
> On 04/06/17 21:25, Christoffer Dall wrote:
> > On Thu, Jun 01, 2017 at 11:20:57AM +0100, Marc Zyngier wrote:
> >> Add a handler for reading/writing the guest's view of the ICC_BPR1_EL1
> >> register, which is located in the ICH_VMCR_EL2.BPR1 field.
> >>
> >> Reviewed-by: Eric Auger <eric.auger@redhat.com>
> >> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
> >> ---
> >> virt/kvm/arm/hyp/vgic-v3-sr.c | 51 +++++++++++++++++++++++++++++++++++++++++++
> >> 1 file changed, 51 insertions(+)
> >>
> >> diff --git a/virt/kvm/arm/hyp/vgic-v3-sr.c b/virt/kvm/arm/hyp/vgic-v3-sr.c
> >> index 943bf11252d9..6254eaf72a77 100644
> >> --- a/virt/kvm/arm/hyp/vgic-v3-sr.c
> >> +++ b/virt/kvm/arm/hyp/vgic-v3-sr.c
> >> @@ -375,6 +375,51 @@ void __hyp_text __vgic_v3_write_vmcr(u32 vmcr)
> >>
> >> #ifdef CONFIG_ARM64
> >>
> >> +static unsigned int __hyp_text __vgic_v3_get_bpr0(u32 vmcr)
> >> +{
> >> + return (vmcr & ICH_VMCR_BPR0_MASK) >> ICH_VMCR_BPR0_SHIFT;
> >> +}
> >> +
> >> +static unsigned int __hyp_text __vgic_v3_get_bpr1(u32 vmcr)
> >> +{
> >> + unsigned int bpr;
> >> +
> >> + if (vmcr & ICH_VMCR_CBPR_MASK) {
> >> + bpr = __vgic_v3_get_bpr0(vmcr);
> >> + if (bpr < 7)
> >> + bpr++;
> >> + } else {
> >> + bpr = (vmcr & ICH_VMCR_BPR1_MASK) >> ICH_VMCR_BPR1_SHIFT;
> >> + }
> >> +
> >> + return bpr;
> >> +}
> >> +
> >> +static void __hyp_text __vgic_v3_read_bpr1(struct kvm_vcpu *vcpu, u32 vmcr, int rt)
> >> +{
> >> + vcpu_set_reg(vcpu, rt, __vgic_v3_get_bpr1(vmcr));
> >> +}
> >> +
> >> +static void __hyp_text __vgic_v3_write_bpr1(struct kvm_vcpu *vcpu, u32 vmcr, int rt)
> >> +{
> >> + u64 val = vcpu_get_reg(vcpu, rt);
> >> + u8 bpr_min = 8 - vtr_to_nr_pre_bits(read_gicreg(ICH_VTR_EL2));
> >
> > I can't seem to find where this behavior is documented, is it that 8 is
> > the theoretical max, and it's the upper preemption levels that apply, so
> > it must be 8 - number supported?
>
> I took inspiration from the VPriorityGroup() helper in the GICv3
> pseudocode. You can also deduct this from the table described in the
> ICC_BPR0_EL1 documentation, though that's admittedly not very clear.
>
Ah, yes, now I understand this. Since you can at most support
ICH_VTR_EL2.PREbits than the minimal value must be one that doesn't
define more preemmption levels. I don't know why this was so hard for
me to realize.
Thanks,
-Christoffer
next prev parent reply other threads:[~2017-06-06 9:41 UTC|newest]
Thread overview: 76+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-06-01 10:20 [PATCH v2 00/25] arm64: KVM: Mediate access to GICv3 sysregs at EL2 Marc Zyngier
2017-06-01 10:20 ` [PATCH v2 01/25] arm64: Add a facility to turn an ESR syndrome into a sysreg encoding Marc Zyngier
2017-06-01 10:20 ` [PATCH v2 02/25] KVM: arm/arm64: vgic-v3: Add accessors for the ICH_APxRn_EL2 registers Marc Zyngier
2017-06-01 10:20 ` [PATCH v2 03/25] KVM: arm64: Make kvm_condition_valid32() accessible from EL2 Marc Zyngier
2017-06-04 12:11 ` Christoffer Dall
2017-06-05 8:13 ` Marc Zyngier
2017-06-05 8:23 ` Christoffer Dall
2017-06-05 9:10 ` Marc Zyngier
2017-06-01 10:20 ` [PATCH v2 04/25] KVM: arm64: vgic-v3: Add hook to handle guest GICv3 sysreg accesses at EL2 Marc Zyngier
2017-06-04 14:59 ` Christoffer Dall
2017-06-01 10:20 ` [PATCH v2 05/25] KVM: arm64: vgic-v3: Add ICV_BPR1_EL1 handler Marc Zyngier
2017-06-04 20:25 ` Christoffer Dall
2017-06-05 9:58 ` Marc Zyngier
2017-06-05 10:16 ` Christoffer Dall
2017-06-05 10:27 ` Peter Maydell
2017-06-06 9:41 ` Christoffer Dall [this message]
2017-06-01 10:20 ` [PATCH v2 06/25] KVM: arm64: vgic-v3: Add ICV_IGRPEN1_EL1 handler Marc Zyngier
2017-06-06 13:22 ` Christoffer Dall
2017-06-01 10:20 ` [PATCH v2 07/25] KVM: arm64: vgic-v3: Add ICV_IAR1_EL1 handler Marc Zyngier
2017-06-05 9:21 ` Christoffer Dall
2017-06-05 10:33 ` Marc Zyngier
2017-06-06 11:09 ` Christoffer Dall
2017-06-06 13:35 ` Marc Zyngier
2017-06-06 13:50 ` Christoffer Dall
2017-06-01 10:21 ` [PATCH v2 08/25] KVM: arm64: vgic-v3: Add ICV_EOIR1_EL1 handler Marc Zyngier
2017-06-05 10:32 ` Christoffer Dall
2017-06-05 11:00 ` Marc Zyngier
2017-06-06 13:19 ` Christoffer Dall
2017-06-01 10:21 ` [PATCH v2 09/25] KVM: arm64: vgic-v3: Add ICV_AP1Rn_EL1 handler Marc Zyngier
2017-06-06 13:22 ` Christoffer Dall
2017-06-01 10:21 ` [PATCH v2 10/25] KVM: arm64: vgic-v3: Add ICV_HPPIR1_EL1 handler Marc Zyngier
2017-06-06 11:51 ` Christoffer Dall
2017-06-06 13:57 ` Marc Zyngier
2017-06-06 14:41 ` Christoffer Dall
2017-06-01 10:21 ` [PATCH v2 11/25] KVM: arm64: vgic-v3: Enable trapping of Group-1 system registers Marc Zyngier
2017-06-06 13:22 ` Christoffer Dall
2017-06-01 10:21 ` [PATCH v2 12/25] KVM: arm64: Enable GICv3 Group-1 sysreg trapping via command-line Marc Zyngier
2017-06-06 12:06 ` Christoffer Dall
2017-06-06 13:59 ` Marc Zyngier
2017-06-06 14:42 ` Christoffer Dall
2017-06-01 10:21 ` [PATCH v2 13/25] KVM: arm64: vgic-v3: Add ICV_BPR0_EL1 handler Marc Zyngier
2017-06-06 12:11 ` Christoffer Dall
2017-06-06 15:15 ` Marc Zyngier
2017-06-06 15:46 ` Christoffer Dall
2017-06-06 15:56 ` Peter Maydell
2017-06-06 16:56 ` Marc Zyngier
2017-06-06 17:23 ` Christoffer Dall
2017-06-06 17:36 ` Peter Maydell
2017-06-01 10:21 ` [PATCH v2 14/25] KVM: arm64: vgic-v3: Add ICV_IGNREN0_EL1 handler Marc Zyngier
2017-06-06 13:22 ` Christoffer Dall
2017-06-01 10:21 ` [PATCH v2 15/25] KVM: arm64: vgic-v3: Add misc Group-0 handlers Marc Zyngier
2017-06-06 13:22 ` Christoffer Dall
2017-06-01 10:21 ` [PATCH v2 16/25] KVM: arm64: vgic-v3: Enable trapping of Group-0 system registers Marc Zyngier
2017-06-06 13:22 ` Christoffer Dall
2017-06-01 10:21 ` [PATCH v2 17/25] KVM: arm64: Enable GICv3 Group-0 sysreg trapping via command-line Marc Zyngier
2017-06-06 12:44 ` Christoffer Dall
2017-06-06 15:15 ` Marc Zyngier
2017-06-01 10:21 ` [PATCH v2 18/25] arm64: Add MIDR values for Cavium cn83XX SoCs Marc Zyngier
2017-06-01 10:21 ` [PATCH v2 19/25] arm64: Add workaround for Cavium Thunder erratum 30115 Marc Zyngier
2017-06-06 12:48 ` Christoffer Dall
2017-06-06 15:18 ` Marc Zyngier
2017-06-01 10:21 ` [PATCH v2 20/25] KVM: arm64: vgic-v3: Add ICV_DIR_EL1 handler Marc Zyngier
2017-06-06 12:59 ` Christoffer Dall
2017-06-01 10:21 ` [PATCH v2 21/25] KVM: arm64: vgic-v3: Add ICV_RPR_EL1 handler Marc Zyngier
2017-06-06 13:23 ` Christoffer Dall
2017-06-01 10:21 ` [PATCH v2 22/25] KVM: arm64: vgic-v3: Add ICV_CTLR_EL1 handler Marc Zyngier
2017-06-06 13:23 ` Christoffer Dall
2017-06-01 10:21 ` [PATCH v2 23/25] KVM: arm64: vgic-v3: Add ICV_PMR_EL1 handler Marc Zyngier
2017-06-06 13:23 ` Christoffer Dall
2017-06-01 10:21 ` [PATCH v2 24/25] KVM: arm64: Enable GICv3 common sysreg trapping via command-line Marc Zyngier
2017-06-01 10:21 ` [PATCH v2 25/25] KVM: arm64: vgic-v3: Log which GICv3 system registers are trapped Marc Zyngier
2017-06-06 13:23 ` Christoffer Dall
2017-06-01 21:00 ` [PATCH v2 00/25] arm64: KVM: Mediate access to GICv3 sysregs at EL2 David Daney
2017-06-02 9:11 ` Marc Zyngier
2017-06-02 16:24 ` David Daney
2017-06-08 14:35 ` Alexander Graf
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20170606094100.GK9464@cbox \
--to=cdall@linaro.org \
--cc=linux-arm-kernel@lists.infradead.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).