From: cdall@linaro.org (Christoffer Dall)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v3 12/27] KVM: arm64: Enable GICv3 Group-1 sysreg trapping via command-line
Date: Fri, 9 Jun 2017 17:29:13 +0200 [thread overview]
Message-ID: <20170609152913.GE11099@cbox> (raw)
In-Reply-To: <20170609114956.25963-13-marc.zyngier@arm.com>
On Fri, Jun 09, 2017 at 12:49:41PM +0100, Marc Zyngier wrote:
> Now that we're able to safely handle Group-1 sysreg access, let's
> give the user the opportunity to enable it by passing a specific
> command-line option (vgic_v3.group1_trap).
>
> Tested-by: Alexander Graf <agraf@suse.de>
> Acked-by: David Daney <david.daney@cavium.com>
> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Christoffer Dall <cdall@linaro.org>
> ---
> Documentation/admin-guide/kernel-parameters.txt | 4 ++++
> virt/kvm/arm/vgic/vgic-v3.c | 11 +++++++++++
> 2 files changed, 15 insertions(+)
>
> diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt
> index 15f79c27748d..42fe395be6c8 100644
> --- a/Documentation/admin-guide/kernel-parameters.txt
> +++ b/Documentation/admin-guide/kernel-parameters.txt
> @@ -1829,6 +1829,10 @@
> for all guests.
> Default is 1 (enabled) if in 64-bit or 32-bit PAE mode.
>
> + kvm-arm.vgic_v3_group1_trap=
> + [KVM,ARM] Trap guest accesses to GICv3 group-1
> + system registers
> +
> kvm-intel.ept= [KVM,Intel] Disable extended page tables
> (virtualized MMU) support on capable Intel chips.
> Default is 1 (enabled)
> diff --git a/virt/kvm/arm/vgic/vgic-v3.c b/virt/kvm/arm/vgic/vgic-v3.c
> index fbd678bc046d..df55818f095c 100644
> --- a/virt/kvm/arm/vgic/vgic-v3.c
> +++ b/virt/kvm/arm/vgic/vgic-v3.c
> @@ -416,6 +416,12 @@ int vgic_v3_map_resources(struct kvm *kvm)
>
> DEFINE_STATIC_KEY_FALSE(vgic_v3_cpuif_trap);
>
> +static int __init early_group1_trap_cfg(char *buf)
> +{
> + return strtobool(buf, &group1_trap);
> +}
> +early_param("kvm-arm.vgic_v3_group1_trap", early_group1_trap_cfg);
> +
> /**
> * vgic_v3_probe - probe for a GICv3 compatible interrupt controller in DT
> * @node: pointer to the DT node
> @@ -467,6 +473,11 @@ int vgic_v3_probe(const struct gic_kvm_info *info)
> if (kvm_vgic_global_state.vcpu_base == 0)
> kvm_info("disabling GICv2 emulation\n");
>
> + if (group1_trap) {
> + kvm_info("GICv3 sysreg trapping enabled (reduced performance)\n");
> + static_branch_enable(&vgic_v3_cpuif_trap);
> + }
> +
> kvm_vgic_global_state.vctrl_base = NULL;
> kvm_vgic_global_state.type = VGIC_V3;
> kvm_vgic_global_state.max_gic_vcpus = VGIC_V3_MAX_CPUS;
> --
> 2.11.0
>
next prev parent reply other threads:[~2017-06-09 15:29 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-06-09 11:49 [PATCH v3 00/27] arm64: KVM: Mediate access to GICv3 sysregs at EL2 Marc Zyngier
2017-06-09 11:49 ` [PATCH v3 01/27] arm64: Add a facility to turn an ESR syndrome into a sysreg encoding Marc Zyngier
2017-06-09 11:49 ` [PATCH v3 02/27] KVM: arm/arm64: vgic-v3: Add accessors for the ICH_APxRn_EL2 registers Marc Zyngier
2017-06-09 11:49 ` [PATCH v3 03/27] KVM: arm64: Make kvm_condition_valid32() accessible from EL2 Marc Zyngier
2017-06-09 11:49 ` [PATCH v3 04/27] KVM: arm64: vgic-v3: Add hook to handle guest GICv3 sysreg accesses at EL2 Marc Zyngier
2017-06-09 11:49 ` [PATCH v3 05/27] KVM: arm64: vgic-v3: Add ICV_BPR1_EL1 handler Marc Zyngier
2017-06-09 15:23 ` Christoffer Dall
2017-06-09 11:49 ` [PATCH v3 06/27] KVM: arm64: vgic-v3: Add ICV_IGRPEN1_EL1 handler Marc Zyngier
2017-06-09 11:49 ` [PATCH v3 07/27] KVM: arm64: vgic-v3: Add ICV_IAR1_EL1 handler Marc Zyngier
2017-06-09 15:26 ` Christoffer Dall
2017-06-09 11:49 ` [PATCH v3 08/27] KVM: arm64: vgic-v3: Add ICV_EOIR1_EL1 handler Marc Zyngier
2017-06-09 15:27 ` Christoffer Dall
2017-06-09 11:49 ` [PATCH v3 09/27] KVM: arm64: vgic-v3: Add ICV_AP1Rn_EL1 handler Marc Zyngier
2017-06-09 11:49 ` [PATCH v3 10/27] KVM: arm64: vgic-v3: Add ICV_HPPIR1_EL1 handler Marc Zyngier
2017-06-09 15:28 ` Christoffer Dall
2017-06-09 11:49 ` [PATCH v3 11/27] KVM: arm64: vgic-v3: Enable trapping of Group-1 system registers Marc Zyngier
2017-06-09 11:49 ` [PATCH v3 12/27] KVM: arm64: Enable GICv3 Group-1 sysreg trapping via command-line Marc Zyngier
2017-06-09 15:29 ` Christoffer Dall [this message]
2017-06-09 11:49 ` [PATCH v3 13/27] KVM: arm64: vgic-v3: Add ICV_BPR0_EL1 handler Marc Zyngier
2017-06-09 15:29 ` Christoffer Dall
2017-06-09 11:49 ` [PATCH v3 14/27] KVM: arm64: vgic-v3: Add ICV_IGNREN0_EL1 handler Marc Zyngier
2017-06-09 11:49 ` [PATCH v3 15/27] KVM: arm64: vgic-v3: Add misc Group-0 handlers Marc Zyngier
2017-06-09 11:49 ` [PATCH v3 16/27] KVM: arm64: vgic-v3: Enable trapping of Group-0 system registers Marc Zyngier
2017-06-09 11:49 ` [PATCH v3 17/27] KVM: arm64: Enable GICv3 Group-0 sysreg trapping via command-line Marc Zyngier
2017-06-09 11:49 ` [PATCH v3 18/27] arm64: Add MIDR values for Cavium cn83XX SoCs Marc Zyngier
2017-06-09 11:49 ` [PATCH v3 19/27] arm64: Add workaround for Cavium Thunder erratum 30115 Marc Zyngier
2017-06-09 11:49 ` [PATCH v3 20/27] KVM: arm64: vgic-v3: Add ICV_DIR_EL1 handler Marc Zyngier
2017-06-09 11:49 ` [PATCH v3 21/27] KVM: arm64: vgic-v3: Add ICV_RPR_EL1 handler Marc Zyngier
2017-06-09 11:49 ` [PATCH v3 22/27] KVM: arm64: vgic-v3: Add ICV_CTLR_EL1 handler Marc Zyngier
2017-06-09 11:49 ` [PATCH v3 23/27] KVM: arm64: vgic-v3: Add ICV_PMR_EL1 handler Marc Zyngier
2017-06-09 11:49 ` [PATCH v3 24/27] KVM: arm64: Enable GICv3 common sysreg trapping via command-line Marc Zyngier
2017-06-09 15:31 ` Christoffer Dall
2017-06-09 11:49 ` [PATCH v3 25/27] KVM: arm64: vgic-v3: Log which GICv3 system registers are trapped Marc Zyngier
2017-06-09 11:49 ` [PATCH v3 26/27] KVM: arm64: Log an error if trapping a read-from-write-only GICv3 access Marc Zyngier
2017-06-09 15:33 ` Christoffer Dall
2017-06-09 11:49 ` [PATCH v3 27/27] KVM: arm64: Log an error if trapping a write-to-read-only " Marc Zyngier
2017-06-09 15:34 ` Christoffer Dall
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20170609152913.GE11099@cbox \
--to=cdall@linaro.org \
--cc=linux-arm-kernel@lists.infradead.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).