From: tony@atomide.com (Tony Lindgren)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 0/6] Init Clock frequences for accelerators
Date: Mon, 12 Jun 2017 00:36:36 -0700 [thread overview]
Message-ID: <20170612073635.GT3730@atomide.com> (raw)
In-Reply-To: <20170607212730.33002-1-s-anna@ti.com>
* Suman Anna <s-anna@ti.com> [170607 14:31]:
> Hi Tony,
>
> The following series configures the initial frequencies for the required
> DPLLs and corresponding output divider clocks used by various remoteproc
> accelerators (DSP, IVAHD) on OMAP4, OMAP5 & DRA7xx/AM57xx SoCs and the
> GPU on DRA7xx/AM57xx SoCs. All these devices require Adaptive Voltage
> Scaling (AVS) to be programmed at all OPPs at boot time, which is
> programmed in the bootloader. Furthermore, DVFS is not supported on
> these domains implying a one-time OPP clock frequency setup.
Tero, care to comment or ack this series?
Regards,
Tony
next prev parent reply other threads:[~2017-06-12 7:36 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-06-07 21:27 [PATCH 0/6] Init Clock frequences for accelerators Suman Anna
2017-06-07 21:27 ` [PATCH 1/6] ARM: dts: omap44xx-clocks: Set IVA DPLL and its output clock rates Suman Anna
2017-06-07 21:27 ` [PATCH 2/6] ARM: dts: omap54xx-clocks: " Suman Anna
2017-06-07 21:27 ` [PATCH 3/6] ARM: dts: dra7xx-clocks: Source IPU1 functional clock from CORE DPLL Suman Anna
2017-06-07 21:27 ` [PATCH 4/6] ARM: dts: dra7xx-clocks: Set DSP DPLL and its output clock rates Suman Anna
2017-06-07 21:27 ` [PATCH 5/6] ARM: dts: dra7xx-clocks: Set IVA " Suman Anna
2017-06-07 21:27 ` [PATCH 6/6] ARM: dts: dra7xx-clocks: Use DPLL_GPU for GPU clocks Suman Anna
2017-06-12 7:36 ` Tony Lindgren [this message]
2017-06-12 8:32 ` [PATCH 0/6] Init Clock frequences for accelerators Tero Kristo
2017-06-12 10:06 ` Tony Lindgren
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