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From: dongas86@gmail.com (Dong Aisheng)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH V3 1/7] tty: serial: lpuart: introduce lpuart_soc_data to represent SoC property
Date: Tue, 13 Jun 2017 10:28:48 +0800	[thread overview]
Message-ID: <20170613022848.GA15770@b29396-OptiPlex-7040> (raw)
In-Reply-To: <CAHp75Vdi8_cxkVuwnvBo7TmceMuA1n1mUg+D5v3xN4ck67MTMA@mail.gmail.com>

On Mon, Jun 12, 2017 at 08:49:36PM +0300, Andy Shevchenko wrote:
> On Mon, Jun 12, 2017 at 6:37 PM, Dong Aisheng <aisheng.dong@nxp.com> wrote:
> > This is used to dynamically check the SoC specific lpuart properies.
> > Currently only the iotype is added, it functions the same as before.
> > With this, new chips with different iotype will be more easily added.
> 
> 
> > +struct lpuart_soc_data {
> > +       char    iotype;
> > +};
> > +
> > +static const struct lpuart_soc_data vf_data = {
> > +       .iotype = UPIO_MEM,
> > +};
> > +
> > +static const struct lpuart_soc_data ls_data = {
> > +       .iotype = UPIO_MEM32BE,
> 
> > +
> 
> Redundant.

My mistake to introduce one more extra blank line...

> 
> > +};
> 
> And now most interesting part...
> 
> > -               if (sport->lpuart32)
> > +               if (sport->port.iotype & UPIO_MEM32BE)
> >                         lpuart32_write(sport->port.x_char, sport->port.membase + UARTDATA);
> >                 else
> >                         writeb(sport->port.x_char, sport->port.membase + UARTDR);
> 
> > -               if (sport->lpuart32)
> > +               if (sport->port.iotype & UPIO_MEM32BE)
> >                         lpuart32_stop_tx(&sport->port);
> >                 else
> >                         lpuart_stop_tx(&sport->port);
> 
> > -       if (sport->lpuart32)
> > +       if (sport->port.iotype & UPIO_MEM32BE)
> >                 lpuart32_transmit_buffer(sport);
> >         else
> >                 lpuart_transmit_buffer(sport);
> 
> > -               if (sport->lpuart32)
> > +               if (sport->port.iotype & UPIO_MEM32BE)
> >                         lpuart32_console_get_options(sport, &baud, &parity, &bits);
> >                 else
> >                         lpuart_console_get_options(sport, &baud, &parity, &bits);
> 
> > -       if (sport->lpuart32)
> > +       if (sport->port.iotype & UPIO_MEM32BE)
> >                 lpuart32_setup_watermark(sport);
> >         else
> >                 lpuart_setup_watermark(sport);
> 
> > -       if (sport->lpuart32)
> > +       sport->port.iotype = sdata->iotype;
> > +       if (sport->port.iotype & UPIO_MEM32BE)
> >                 sport->port.ops = &lpuart32_pops;
> >         else
> >                 sport->port.ops = &lpuart_pops;
> 
> > -       if (sport->lpuart32)
> > +       if (sport->port.iotype & UPIO_MEM32BE)
> >                 lpuart_reg.cons = LPUART32_CONSOLE;
> >         else
> >                 lpuart_reg.cons = LPUART_CONSOLE;
> 
> ...all above since you introduced nice struct, can get rid of conditionals.
> Instead it might be a members of the struct above.
> 
> (I dunno if it's good to have in this patch, but at list a follow up
> could be nice to have)
> 

Yes, to clean up all conditionals, much more things need to be done,
so a separate follow up patch may be better.

This patch only address iotype which is just the same as before.

> > -       if (sport->lpuart32) {
> > +       if (sport->port.iotype & UPIO_MEM32BE) {
> >                 /* disable Rx/Tx and interrupts */
> >                 temp = lpuart32_read(sport->port.membase + UARTCTRL);
> >                 temp &= ~(UARTCTRL_TE | UARTCTRL_TIE | UARTCTRL_TCIE);
> 
> > -       if (sport->lpuart32) {
> > +       if (sport->port.iotype & UPIO_MEM32BE) {
> >                 lpuart32_setup_watermark(sport);
> >                 temp = lpuart32_read(sport->port.membase + UARTCTRL);
> >                 temp |= (UARTCTRL_RIE | UARTCTRL_TIE | UARTCTRL_RE |
> 
> Above are questionable, might be not need to convert them.
> 
> So, in any case above is a sighting which you could address (separately).

Yes, seems not a easy convert which can be investigated later.

Thanks for the review.

Regards
Dong Aisheng

> 
> -- 
> With Best Regards,
> Andy Shevchenko

  reply	other threads:[~2017-06-13  2:28 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-06-12 15:37 [PATCH V3 0/7] tty: serial: lpuart: add imx7ulp support Dong Aisheng
2017-06-12 15:37 ` [PATCH V3 1/7] tty: serial: lpuart: introduce lpuart_soc_data to represent SoC property Dong Aisheng
2017-06-12 17:49   ` Andy Shevchenko
2017-06-13  2:28     ` Dong Aisheng [this message]
2017-06-12 15:37 ` [PATCH V3 2/7] tty: serial: lpuart: refactor lpuart32_{read|write} prototype Dong Aisheng
2017-06-12 15:37 ` [PATCH V3 3/7] tty: serial: lpuart: add little endian 32 bit register support Dong Aisheng
2017-06-13  0:28   ` kbuild test robot
2017-06-13  0:28   ` [PATCH] tty: serial: lpuart: fix semicolon.cocci warnings kbuild test robot
2017-06-13  2:38     ` Dong Aisheng
2017-06-13  3:09   ` [PATCH V3 3/7] tty: serial: lpuart: add little endian 32 bit register support Andy Duan
2017-06-13  3:27     ` A.s. Dong
2017-06-12 15:37 ` [PATCH V3 4/7] dt-bindings: serial: fsl-lpuart: add i.MX7ULP support Dong Aisheng
2017-06-12 15:37 ` [PATCH V3 5/7] tty: serial: lpuart: add imx7ulp support Dong Aisheng
2017-06-13  3:02   ` Andy Duan
2017-06-13  3:32     ` A.s. Dong
2017-06-12 15:37 ` [PATCH V3 6/7] tty: serial: lpuart: add earlycon support for imx7ulp Dong Aisheng
2017-06-12 15:37 ` [PATCH V3 7/7] tty: serial: lpuart: add a more accurate baud rate calculation method Dong Aisheng

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