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From: mathieu.poirier@linaro.org (Mathieu Poirier)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 03/12] coresight: Extend the PIDR mask to cover relevant bits in PIDR2
Date: Tue, 13 Jun 2017 11:53:36 -0600	[thread overview]
Message-ID: <20170613175336.GC6392@xps15> (raw)
In-Reply-To: <1497278211-5001-4-git-send-email-suzuki.poulose@arm.com>

On Mon, Jun 12, 2017 at 03:36:42PM +0100, Suzuki K Poulose wrote:
> As per coresight standards, PIDR2 register has the following format :
> 
>  [2-0]	- JEP106_bits6to4
>  [3]	- JEDEC, designer ID is specified by JEDEC.
> 
> However some of the drivers only use mask of 0x3 for the PIDR2 leaving
> bits [3-2] unchecked, which could potentially match the component for
> a different device altogether. This patch fixes the mask and the
> corresponding id bits for the existing devices.
> 
> Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
> Cc: Linus Walleij <linus.walleij@linaro.org>
> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
> ---
> I have not touched the TPIU ids for Ux500 (see commit: 4339b699),
> as I don't have a platform to fix/correct the ids.
> ---
>  drivers/hwtracing/coresight/coresight-funnel.c          | 4 ++--
>  drivers/hwtracing/coresight/coresight-replicator-qcom.c | 4 ++--
>  drivers/hwtracing/coresight/coresight-stm.c             | 8 ++++----
>  drivers/hwtracing/coresight/coresight-tmc.c             | 4 ++--
>  drivers/hwtracing/coresight/coresight-tpiu.c            | 4 ++--

Any reason for not adding ETMv3 to the list?  From what I see in the
documentation bit [2-0] need to 0b011 and the JEDEC bit is always 1.

>  5 files changed, 12 insertions(+), 12 deletions(-)
> 
> diff --git a/drivers/hwtracing/coresight/coresight-funnel.c b/drivers/hwtracing/coresight/coresight-funnel.c
> index 860fe6e..6f7f3d3 100644
> --- a/drivers/hwtracing/coresight/coresight-funnel.c
> +++ b/drivers/hwtracing/coresight/coresight-funnel.c
> @@ -248,8 +248,8 @@ static const struct dev_pm_ops funnel_dev_pm_ops = {
>  
>  static struct amba_id funnel_ids[] = {
>  	{
> -		.id     = 0x0003b908,
> -		.mask   = 0x0003ffff,
> +		.id     = 0x000bb908,
> +		.mask   = 0x000fffff,
>  	},
>  	{ 0, 0},
>  };
> diff --git a/drivers/hwtracing/coresight/coresight-replicator-qcom.c b/drivers/hwtracing/coresight/coresight-replicator-qcom.c
> index b7e44d1..b029a5f 100644
> --- a/drivers/hwtracing/coresight/coresight-replicator-qcom.c
> +++ b/drivers/hwtracing/coresight/coresight-replicator-qcom.c
> @@ -177,8 +177,8 @@ static const struct dev_pm_ops replicator_dev_pm_ops = {
>  
>  static struct amba_id replicator_ids[] = {
>  	{
> -		.id     = 0x0003b909,
> -		.mask   = 0x0003ffff,
> +		.id     = 0x000bb909,
> +		.mask   = 0x000bffff,
>  		.data	= "REPLICATOR 1.0",
>  	},
>  	{ 0, 0 },
> diff --git a/drivers/hwtracing/coresight/coresight-stm.c b/drivers/hwtracing/coresight/coresight-stm.c
> index 93fc26f..1bcda80 100644
> --- a/drivers/hwtracing/coresight/coresight-stm.c
> +++ b/drivers/hwtracing/coresight/coresight-stm.c
> @@ -916,13 +916,13 @@ static const struct dev_pm_ops stm_dev_pm_ops = {
>  
>  static struct amba_id stm_ids[] = {
>  	{
> -		.id     = 0x0003b962,
> -		.mask   = 0x0003ffff,
> +		.id     = 0x000bb962,
> +		.mask   = 0x000fffff,
>  		.data	= "STM32",
>  	},
>  	{
> -		.id	= 0x0003b963,
> -		.mask	= 0x0003ffff,
> +		.id	= 0x000bb963,
> +		.mask	= 0x000fffff,
>  		.data	= "STM500",
>  	},
>  	{ 0, 0},
> diff --git a/drivers/hwtracing/coresight/coresight-tmc.c b/drivers/hwtracing/coresight/coresight-tmc.c
> index 8644887..eb0c7b3 100644
> --- a/drivers/hwtracing/coresight/coresight-tmc.c
> +++ b/drivers/hwtracing/coresight/coresight-tmc.c
> @@ -393,8 +393,8 @@ static int tmc_probe(struct amba_device *adev, const struct amba_id *id)
>  
>  static struct amba_id tmc_ids[] = {
>  	{
> -		.id     = 0x0003b961,
> -		.mask   = 0x0003ffff,
> +		.id     = 0x000bb961,
> +		.mask   = 0x000fffff,
>  	},
>  	{ 0, 0},
>  };
> diff --git a/drivers/hwtracing/coresight/coresight-tpiu.c b/drivers/hwtracing/coresight/coresight-tpiu.c
> index 0673baf..59c1510 100644
> --- a/drivers/hwtracing/coresight/coresight-tpiu.c
> +++ b/drivers/hwtracing/coresight/coresight-tpiu.c
> @@ -194,8 +194,8 @@ static const struct dev_pm_ops tpiu_dev_pm_ops = {
>  
>  static struct amba_id tpiu_ids[] = {
>  	{
> -		.id	= 0x0003b912,
> -		.mask	= 0x0003ffff,
> +		.id	= 0x000bb912,
> +		.mask	= 0x000fffff,
>  	},
>  	{
>  		.id	= 0x0004b912,
> -- 
> 2.7.4
> 

  reply	other threads:[~2017-06-13 17:53 UTC|newest]

Thread overview: 39+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-06-12 14:36 [PATCH 00/12] coresight: Support for ARM Coresight SoC-600 Suzuki K Poulose
2017-06-12 14:36 ` [PATCH 01/12] coresight replicator: Cleanup programmable replicator naming Suzuki K Poulose
2017-06-13 16:55   ` Mathieu Poirier
2017-06-13 17:56     ` Suzuki K Poulose
2017-06-18 14:04     ` Rob Herring
2017-06-20 16:44       ` Mathieu Poirier
2017-06-22  3:21         ` Rob Herring
2017-06-12 14:36 ` [PATCH 02/12] arm64: dts: juno: Use the new coresight replicator string Suzuki K Poulose
2017-06-12 14:36 ` [PATCH 03/12] coresight: Extend the PIDR mask to cover relevant bits in PIDR2 Suzuki K Poulose
2017-06-13 17:53   ` Mathieu Poirier [this message]
2017-06-13 17:55     ` Suzuki K Poulose
2017-06-13 19:06       ` Mathieu Poirier
2017-06-12 14:36 ` [PATCH 04/12] coresight: Add support for reading 64bit registers Suzuki K Poulose
2017-06-13 17:45   ` Mathieu Poirier
2017-06-13 17:57     ` Suzuki K Poulose
2017-06-12 14:36 ` [PATCH 05/12] coresight tmc: Add helpers for accessing " Suzuki K Poulose
2017-06-14 17:49   ` Mathieu Poirier
2017-06-15 10:13     ` Suzuki K Poulose
2017-06-15 13:29       ` Mike Leach
2017-06-15 14:24       ` Mathieu Poirier
2017-06-12 14:36 ` [PATCH 06/12] coresight tmc: Expose DBA and AXICTL Suzuki K Poulose
2017-06-14 17:50   ` Mathieu Poirier
2017-06-15 10:19     ` Suzuki K Poulose
2017-06-12 14:36 ` [PATCH 07/12] coresight replicator: Expose replicator management registers Suzuki K Poulose
2017-06-14 17:54   ` Mathieu Poirier
2017-06-15 10:23     ` Suzuki K Poulose
2017-06-12 14:36 ` [PATCH 08/12] coresight tmc: Handle configuration types properly Suzuki K Poulose
2017-06-14 17:59   ` Mathieu Poirier
2017-06-15 10:25     ` Suzuki K Poulose
2017-06-15 14:33       ` Mathieu Poirier
2017-06-12 14:36 ` [PATCH 09/12] coresight tmc: Add capability information Suzuki K Poulose
2017-06-14 18:22   ` Mathieu Poirier
2017-06-15 10:30     ` Suzuki K Poulose
2017-06-15 14:37       ` Mathieu Poirier
2017-06-12 14:36 ` [PATCH 10/12] coresight tmc: Support for save-restore in ETR Suzuki K Poulose
2017-06-12 14:36 ` [PATCH 11/12] coresight tmc: Add support for Coresight SoC 600 TMC Suzuki K Poulose
2017-06-14 18:25   ` Mathieu Poirier
2017-06-15 10:31     ` Suzuki K Poulose
2017-06-12 14:36 ` [PATCH 12/12] coresight: Add support for Coresight SoC 600 components Suzuki K Poulose

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