From mboxrd@z Thu Jan 1 00:00:00 1970 From: o.rempel@pengutronix.de (Oleksij Rempel) Date: Tue, 20 Jun 2017 06:40:56 +0200 Subject: [PATCH v6 1/4] nvmem: dt: document SNVS LPGPR binding In-Reply-To: <20170620044059.16113-1-o.rempel@pengutronix.de> References: <20170620044059.16113-1-o.rempel@pengutronix.de> Message-ID: <20170620044059.16113-2-o.rempel@pengutronix.de> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Documentation bindings for the Low Power General Purpose Register available on i.MX6 SoCs in the Secure Non-Volatile Storage. Signed-off-by: Oleksij Rempel --- .../devicetree/bindings/nvmem/snvs-lpgpr.txt | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) create mode 100644 Documentation/devicetree/bindings/nvmem/snvs-lpgpr.txt diff --git a/Documentation/devicetree/bindings/nvmem/snvs-lpgpr.txt b/Documentation/devicetree/bindings/nvmem/snvs-lpgpr.txt new file mode 100644 index 000000000000..21910fb3159f --- /dev/null +++ b/Documentation/devicetree/bindings/nvmem/snvs-lpgpr.txt @@ -0,0 +1,19 @@ +Device tree bindings for Low Power General Purpose Register found in i.MX6Q/D +Secure Non-Volatile Storage. + +This DT node should be represented as a sub-node of a "syscon", +"simple-mfd" node. + +Required properties: +- compatible: should be: + "fsl,imx6q-snvs-lpgpr" for Freescale i.MX6Q/D/DL/S + +Example: +snvs: snvs at 020cc000 { + compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd"; + reg = <0x020cc000 0x4000>; + + snvs_lpgpr: snvs-lpgpr { + compatible = "fsl,imx6q-snvs-lpgpr"; + }; +}; -- 2.11.0