From: will.deacon@arm.com (Will Deacon)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v8 1/3] ACPI/IORT: Fixup SMMUv3 resource size for Cavium ThunderX2 SMMUv3 model
Date: Tue, 20 Jun 2017 19:01:02 +0100 [thread overview]
Message-ID: <20170620180101.GD28035@arm.com> (raw)
In-Reply-To: <1497968259-16390-2-git-send-email-gakula@caviumnetworks.com>
On Tue, Jun 20, 2017 at 07:47:37PM +0530, Geetha sowjanya wrote:
> From: Linu Cherian <linu.cherian@cavium.com>
>
> Cavium ThunderX2 implementation doesn't support second page in SMMU
> register space. Hence, resource size is set as 64k for this model.
>
> Signed-off-by: Linu Cherian <linu.cherian@cavium.com>
> Signed-off-by: Geetha Sowjanya <geethasowjanya.akula@cavium.com>
> ---
> drivers/acpi/arm64/iort.c | 15 ++++++++++++++-
> 1 files changed, 14 insertions(+), 1 deletions(-)
Looks fine to me, but I need Lorenzo's ack on this.
Will
next prev parent reply other threads:[~2017-06-20 18:01 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-06-20 14:17 [PATCH v8 0/3] Cavium ThunderX2 SMMUv3 errata workarounds Geetha sowjanya
2017-06-20 14:17 ` [PATCH v8 1/3] ACPI/IORT: Fixup SMMUv3 resource size for Cavium ThunderX2 SMMUv3 model Geetha sowjanya
2017-06-20 18:01 ` Will Deacon [this message]
2017-06-20 19:27 ` Lorenzo Pieralisi
2017-06-20 14:17 ` [PATCH v8 2/3] iommu/arm-smmu-v3: Add workaround for Cavium ThunderX2 erratum #74 Geetha sowjanya
2017-06-20 18:06 ` Will Deacon
2017-06-20 14:17 ` [PATCH v8 3/3] iommu/arm-smmu-v3: Add workaround for Cavium ThunderX2 erratum #126 Geetha sowjanya
2017-06-20 18:00 ` Will Deacon
2017-06-21 6:39 ` Geetha Akula
2017-06-21 9:08 ` Will Deacon
2017-06-21 9:30 ` Marc Zyngier
2017-06-21 18:19 ` Robert Richter
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