From: robert.richter@cavium.com (Robert Richter)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v8 3/3] iommu/arm-smmu-v3: Add workaround for Cavium ThunderX2 erratum #126
Date: Wed, 21 Jun 2017 20:19:47 +0200 [thread overview]
Message-ID: <20170621181947.GH16981@rric.localdomain> (raw)
In-Reply-To: <1497968259-16390-4-git-send-email-gakula@caviumnetworks.com>
On 20.06.17 19:47:39, Geetha sowjanya wrote:
> From: Geetha Sowjanya <geethasowjanya.akula@cavium.com>
>
> Cavium ThunderX2 SMMU doesn't support MSI and also doesn't have unique irq
> lines for gerror, eventq and cmdq-sync.
>
> SHARED_IRQ option is set as a errata workaround, which allows to share the irq
> line by register single irq handler for all the interrupts.
I found the entry in silicon-errata.txt missing, is that on purpose?
-Robert
>
> Signed-off-by: Geetha sowjanya <gakula@caviumnetworks.com>
> ---
> .../devicetree/bindings/iommu/arm,smmu-v3.txt | 5 ++
> drivers/iommu/arm-smmu-v3.c | 73 ++++++++++++++++----
> 2 files changed, 64 insertions(+), 14 deletions(-)
prev parent reply other threads:[~2017-06-21 18:19 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-06-20 14:17 [PATCH v8 0/3] Cavium ThunderX2 SMMUv3 errata workarounds Geetha sowjanya
2017-06-20 14:17 ` [PATCH v8 1/3] ACPI/IORT: Fixup SMMUv3 resource size for Cavium ThunderX2 SMMUv3 model Geetha sowjanya
2017-06-20 18:01 ` Will Deacon
2017-06-20 19:27 ` Lorenzo Pieralisi
2017-06-20 14:17 ` [PATCH v8 2/3] iommu/arm-smmu-v3: Add workaround for Cavium ThunderX2 erratum #74 Geetha sowjanya
2017-06-20 18:06 ` Will Deacon
2017-06-20 14:17 ` [PATCH v8 3/3] iommu/arm-smmu-v3: Add workaround for Cavium ThunderX2 erratum #126 Geetha sowjanya
2017-06-20 18:00 ` Will Deacon
2017-06-21 6:39 ` Geetha Akula
2017-06-21 9:08 ` Will Deacon
2017-06-21 9:30 ` Marc Zyngier
2017-06-21 18:19 ` Robert Richter [this message]
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