[GIT PULL v3] updates to qbman (soc drivers) to support arm/arm64

[linux@armlinux.org.uk (Russell King - ARM Linux)]

On Tue, Jun 27, 2017 at 09:17:48AM +0200, Arnd Bergmann wrote:
> I'd suggest we start out by converting this to some standard API
> first, regardless of performance, to get it working properly with code
> that should be maintainable at least, and make progress with your
> hardware enablement.

I think Roy is rather confused right now about what the driver does
and doesn't do.

With his patches, two areas are mapped on ARM:

1. The addr.ci area is mapped using ioremap().  This is a device mapping,
   and is used by the "Cache-inhibited register access." functions.

2. The addr.ce area is mapped using ioremap_wc(), and all other stuff
   including the verb accesses go through this region.  This is a
   memory, non-cacheable mapping.

The addr.ce region is the area that has a mixture of memset(), MMIO
accessors, direct CPU accesses, cache flushes and prefetches used on
it.

As it is marked non-cacheable, the cache flushes are a pure waste of
CPU cycles.  Prefetching to a non-cacheable area doesn't make much
sense either.

So, I think for ARM: just kill the cache flushing - its doing nothing
useful.  The prefetching could also be removed as well to recover a
few more CPU cycles.

-- 
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