* [PATCH 01/20] compat ABI: use non-compat openat and open_by_handle_at variants
2017-06-19 15:49 [PATCH v8 00/20] ILP32 for ARM64 Yury Norov
@ 2017-06-19 15:49 ` Yury Norov
2017-06-19 15:49 ` [PATCH 02/20] 32-bit userspace ABI: introduce ARCH_32BIT_OFF_T config option Yury Norov
` (21 subsequent siblings)
22 siblings, 0 replies; 37+ messages in thread
From: Yury Norov @ 2017-06-19 15:49 UTC (permalink / raw)
To: linux-arm-kernel
The only difference is that non-compat version forces O_LARGEFILE,
and it should be the default behaviour for all architectures, as
we are going to drop the support of 32-bit userspace off_t.
The exception is tile32 that continues with compat version of syscalls.
Signed-off-by: Yury Norov <ynorov@caviumnetworks.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Chris Metcalf <cmetcalf@ezchip.com> [for tile]
---
arch/tile/kernel/compat.c | 3 +++
include/uapi/asm-generic/unistd.h | 5 ++---
2 files changed, 5 insertions(+), 3 deletions(-)
diff --git a/arch/tile/kernel/compat.c b/arch/tile/kernel/compat.c
index bdaf71d31a4a..3b7853c59395 100644
--- a/arch/tile/kernel/compat.c
+++ b/arch/tile/kernel/compat.c
@@ -103,6 +103,9 @@ COMPAT_SYSCALL_DEFINE5(llseek, unsigned int, fd, unsigned int, offset_high,
#define compat_sys_readahead sys32_readahead
#define sys_llseek compat_sys_llseek
+#define sys_openat compat_sys_openat
+#define sys_open_by_handle_at compat_sys_open_by_handle_at
+
/* Call the assembly trampolines where necessary. */
#define compat_sys_rt_sigreturn _compat_sys_rt_sigreturn
#define sys_clone _sys_clone
diff --git a/include/uapi/asm-generic/unistd.h b/include/uapi/asm-generic/unistd.h
index 061185a5eb51..429dd335def6 100644
--- a/include/uapi/asm-generic/unistd.h
+++ b/include/uapi/asm-generic/unistd.h
@@ -178,7 +178,7 @@ __SYSCALL(__NR_fchownat, sys_fchownat)
#define __NR_fchown 55
__SYSCALL(__NR_fchown, sys_fchown)
#define __NR_openat 56
-__SC_COMP(__NR_openat, sys_openat, compat_sys_openat)
+__SYSCALL(__NR_openat, sys_openat)
#define __NR_close 57
__SYSCALL(__NR_close, sys_close)
#define __NR_vhangup 58
@@ -675,8 +675,7 @@ __SYSCALL(__NR_fanotify_mark, sys_fanotify_mark)
#define __NR_name_to_handle_at 264
__SYSCALL(__NR_name_to_handle_at, sys_name_to_handle_at)
#define __NR_open_by_handle_at 265
-__SC_COMP(__NR_open_by_handle_at, sys_open_by_handle_at, \
- compat_sys_open_by_handle_at)
+__SYSCALL(__NR_open_by_handle_at, sys_open_by_handle_at)
#define __NR_clock_adjtime 266
__SC_COMP(__NR_clock_adjtime, sys_clock_adjtime, compat_sys_clock_adjtime)
#define __NR_syncfs 267
--
2.11.0
^ permalink raw reply related [flat|nested] 37+ messages in thread* [PATCH 02/20] 32-bit userspace ABI: introduce ARCH_32BIT_OFF_T config option
2017-06-19 15:49 [PATCH v8 00/20] ILP32 for ARM64 Yury Norov
2017-06-19 15:49 ` [PATCH 01/20] compat ABI: use non-compat openat and open_by_handle_at variants Yury Norov
@ 2017-06-19 15:49 ` Yury Norov
2017-06-19 15:49 ` [PATCH 04/20] arm64: ilp32: add documentation on the ILP32 ABI for ARM64 Yury Norov
` (20 subsequent siblings)
22 siblings, 0 replies; 37+ messages in thread
From: Yury Norov @ 2017-06-19 15:49 UTC (permalink / raw)
To: linux-arm-kernel
All new 32-bit architectures should have 64-bit userspace off_t type, but
existing architectures has 32-bit ones.
To handle it, new config option is added to arch/Kconfig that defaults
ARCH_32BIT_OFF_T to be disabled for non-64 bit architectures. All existing
32-bit architectures enable it explicitly here.
New option affects force_o_largefile() behaviour. Namely, if userspace off_t
is 64-bits long, we have no reason to reject user to open big files.
Note that even if architectures has only 64-bit off_t in the kernel
(arc, c6x, h8300, hexagon, metag, nios2, openrisc, tile32 and unicore32),
a libc may use 32-bit off_t, and therefore want to limit the file size
to 4GB unless specified differently in the open flags.
Signed-off-by: Yury Norov <ynorov@caviumnetworks.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
---
arch/Kconfig | 15 +++++++++++++++
arch/arc/Kconfig | 1 +
arch/arm/Kconfig | 1 +
arch/blackfin/Kconfig | 1 +
arch/cris/Kconfig | 1 +
arch/frv/Kconfig | 1 +
arch/h8300/Kconfig | 1 +
arch/hexagon/Kconfig | 1 +
arch/m32r/Kconfig | 1 +
arch/m68k/Kconfig | 1 +
arch/metag/Kconfig | 1 +
arch/microblaze/Kconfig | 1 +
arch/mips/Kconfig | 1 +
arch/mn10300/Kconfig | 1 +
arch/nios2/Kconfig | 1 +
arch/openrisc/Kconfig | 1 +
arch/parisc/Kconfig | 1 +
arch/powerpc/Kconfig | 1 +
arch/score/Kconfig | 1 +
arch/sh/Kconfig | 1 +
arch/sparc/Kconfig | 1 +
arch/tile/Kconfig | 1 +
arch/unicore32/Kconfig | 1 +
arch/x86/Kconfig | 1 +
arch/x86/um/Kconfig | 1 +
arch/xtensa/Kconfig | 1 +
include/linux/fcntl.h | 2 +-
27 files changed, 41 insertions(+), 1 deletion(-)
diff --git a/arch/Kconfig b/arch/Kconfig
index 3eac97a4c7b3..350822854148 100644
--- a/arch/Kconfig
+++ b/arch/Kconfig
@@ -246,6 +246,21 @@ config ARCH_THREAD_STACK_ALLOCATOR
config ARCH_WANTS_DYNAMIC_TASK_STRUCT
bool
+config ARCH_32BIT_OFF_T
+ bool
+ depends on !64BIT
+ help
+ All new 32-bit architectures should have 64-bit off_t type on
+ userspace side which corresponds to the loff_t kernel type. This
+ is the requirement for modern ABIs. Some existing architectures
+ already have 32-bit off_t. This option is enabled for all such
+ architectures explicitly. Namely: arc, arm, blackfin, cris, frv,
+ h8300, hexagon, m32r, m68k, metag, microblaze, mips32, mn10300,
+ nios2, openrisc, parisc32, powerpc32, score, sh, sparc, tile32,
+ unicore32, x86_32 and xtensa. This is the complete list. Any
+ new 32-bit architecture should declare 64-bit off_t type on user
+ side and so should not enable this option.
+
config HAVE_REGS_AND_STACK_ACCESS_API
bool
help
diff --git a/arch/arc/Kconfig b/arch/arc/Kconfig
index a5459698f0ee..cab9c53e0354 100644
--- a/arch/arc/Kconfig
+++ b/arch/arc/Kconfig
@@ -11,6 +11,7 @@ config ARC
select ARC_TIMERS
select ARCH_HAS_SG_CHAIN
select ARCH_SUPPORTS_ATOMIC_RMW if ARC_HAS_LLSC
+ select ARCH_32BIT_OFF_T
select BUILDTIME_EXTABLE_SORT
select CLONE_BACKWARDS
select COMMON_CLK
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 43f45d3b40e8..dfa038164209 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1,6 +1,7 @@
config ARM
bool
default y
+ select ARCH_32BIT_OFF_T
select ARCH_CLOCKSOURCE_DATA
select ARCH_HAS_DEBUG_VIRTUAL
select ARCH_HAS_DEVMEM_IS_ALLOWED
diff --git a/arch/blackfin/Kconfig b/arch/blackfin/Kconfig
index 3c1bd640042a..26418e78f06b 100644
--- a/arch/blackfin/Kconfig
+++ b/arch/blackfin/Kconfig
@@ -12,6 +12,7 @@ config RWSEM_XCHGADD_ALGORITHM
config BLACKFIN
def_bool y
+ select ARCH_32BIT_OFF_T
select HAVE_ARCH_KGDB
select HAVE_ARCH_TRACEHOOK
select HAVE_DYNAMIC_FTRACE
diff --git a/arch/cris/Kconfig b/arch/cris/Kconfig
index 71b758dc3a96..8c059f07ddb6 100644
--- a/arch/cris/Kconfig
+++ b/arch/cris/Kconfig
@@ -50,6 +50,7 @@ config LOCKDEP_SUPPORT
config CRIS
bool
default y
+ select ARCH_32BIT_OFF_T
select HAVE_IDE
select GENERIC_ATOMIC64
select HAVE_UID16
diff --git a/arch/frv/Kconfig b/arch/frv/Kconfig
index eefd9a4ed156..2f1490448fd4 100644
--- a/arch/frv/Kconfig
+++ b/arch/frv/Kconfig
@@ -1,6 +1,7 @@
config FRV
bool
default y
+ select ARCH_32BIT_OFF_T
select HAVE_IDE
select HAVE_ARCH_TRACEHOOK
select HAVE_PERF_EVENTS
diff --git a/arch/h8300/Kconfig b/arch/h8300/Kconfig
index 6e3d36f37a02..0086abbd8440 100644
--- a/arch/h8300/Kconfig
+++ b/arch/h8300/Kconfig
@@ -1,5 +1,6 @@
config H8300
def_bool y
+ select ARCH_32BIT_OFF_T
select GENERIC_ATOMIC64
select HAVE_UID16
select VIRT_TO_BUS
diff --git a/arch/hexagon/Kconfig b/arch/hexagon/Kconfig
index 1941e4baaee6..bbcea8c33e44 100644
--- a/arch/hexagon/Kconfig
+++ b/arch/hexagon/Kconfig
@@ -3,6 +3,7 @@ comment "Linux Kernel Configuration for Hexagon"
config HEXAGON
def_bool y
+ select ARCH_32BIT_OFF_T
select HAVE_OPROFILE
# Other pending projects/to-do items.
# select HAVE_REGS_AND_STACK_ACCESS_API
diff --git a/arch/m32r/Kconfig b/arch/m32r/Kconfig
index 95474460b367..d6d19f6ba39d 100644
--- a/arch/m32r/Kconfig
+++ b/arch/m32r/Kconfig
@@ -1,6 +1,7 @@
config M32R
bool
default y
+ select ARCH_32BIT_OFF_T
select HAVE_IDE
select HAVE_OPROFILE
select INIT_ALL_POSSIBLE
diff --git a/arch/m68k/Kconfig b/arch/m68k/Kconfig
index d140206d5d29..ed6f90ca2d31 100644
--- a/arch/m68k/Kconfig
+++ b/arch/m68k/Kconfig
@@ -1,6 +1,7 @@
config M68K
bool
default y
+ select ARCH_32BIT_OFF_T
select ARCH_MIGHT_HAVE_PC_PARPORT if ISA
select HAVE_IDE
select HAVE_AOUT if MMU
diff --git a/arch/metag/Kconfig b/arch/metag/Kconfig
index 5b7a45d99cfb..c337192e3c3b 100644
--- a/arch/metag/Kconfig
+++ b/arch/metag/Kconfig
@@ -1,5 +1,6 @@
config METAG
def_bool y
+ select ARCH_32BIT_OFF_T
select EMBEDDED
select GENERIC_ATOMIC64
select GENERIC_CLOCKEVENTS
diff --git a/arch/microblaze/Kconfig b/arch/microblaze/Kconfig
index 8e47121b8b8b..0a0128d8494b 100644
--- a/arch/microblaze/Kconfig
+++ b/arch/microblaze/Kconfig
@@ -1,5 +1,6 @@
config MICROBLAZE
def_bool y
+ select ARCH_32BIT_OFF_T
select ARCH_HAS_GCOV_PROFILE_ALL
select ARCH_MIGHT_HAVE_PC_PARPORT
select ARCH_WANT_IPC_PARSE_VERSION
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index e2fad9a71517..2fc68ab9dd2e 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -1,6 +1,7 @@
config MIPS
bool
default y
+ select ARCH_32BIT_OFF_T if !64BIT
select ARCH_BINFMT_ELF_STATE
select ARCH_CLOCKSOURCE_DATA
select ARCH_DISCARD_MEMBLOCK
diff --git a/arch/mn10300/Kconfig b/arch/mn10300/Kconfig
index 38e3494bfb63..75f226e6e819 100644
--- a/arch/mn10300/Kconfig
+++ b/arch/mn10300/Kconfig
@@ -1,5 +1,6 @@
config MN10300
def_bool y
+ select ARCH_32BIT_OFF_T
select HAVE_EXIT_THREAD
select HAVE_OPROFILE
select HAVE_UID16
diff --git a/arch/nios2/Kconfig b/arch/nios2/Kconfig
index c587764b9c5a..aafa81ea6e0b 100644
--- a/arch/nios2/Kconfig
+++ b/arch/nios2/Kconfig
@@ -1,5 +1,6 @@
config NIOS2
def_bool y
+ select ARCH_32BIT_OFF_T
select TIMER_OF
select GENERIC_ATOMIC64
select GENERIC_CLOCKEVENTS
diff --git a/arch/openrisc/Kconfig b/arch/openrisc/Kconfig
index 1e95920b0737..5539d0842724 100644
--- a/arch/openrisc/Kconfig
+++ b/arch/openrisc/Kconfig
@@ -5,6 +5,7 @@
config OPENRISC
def_bool y
+ select ARCH_32BIT_OFF_T
select OF
select OF_EARLY_FLATTREE
select IRQ_DOMAIN
diff --git a/arch/parisc/Kconfig b/arch/parisc/Kconfig
index 531da9eb8f43..a9f430b86103 100644
--- a/arch/parisc/Kconfig
+++ b/arch/parisc/Kconfig
@@ -1,5 +1,6 @@
config PARISC
def_bool y
+ select ARCH_32BIT_OFF_T if !64BIT
select ARCH_MIGHT_HAVE_PC_PARPORT
select HAVE_IDE
select HAVE_OPROFILE
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index 5b69b487d281..0d0afa2f74db 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -122,6 +122,7 @@ config PPC
#
# Please keep this list sorted alphabetically.
#
+ select ARCH_32BIT_OFF_T if PPC32
select ARCH_HAS_DEVMEM_IS_ALLOWED
select ARCH_HAS_DMA_SET_COHERENT_MASK
select ARCH_HAS_ELF_RANDOMIZE
diff --git a/arch/score/Kconfig b/arch/score/Kconfig
index 507d63181389..0a9484bbddf5 100644
--- a/arch/score/Kconfig
+++ b/arch/score/Kconfig
@@ -2,6 +2,7 @@ menu "Machine selection"
config SCORE
def_bool y
+ select ARCH_32BIT_OFF_T
select GENERIC_IRQ_SHOW
select GENERIC_IOMAP
select GENERIC_ATOMIC64
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
index ee086958b2b2..1f99eb3212d2 100644
--- a/arch/sh/Kconfig
+++ b/arch/sh/Kconfig
@@ -56,6 +56,7 @@ config SUPERH
config SUPERH32
def_bool ARCH = "sh"
+ select ARCH_32BIT_OFF_T
select HAVE_KPROBES
select HAVE_KRETPROBES
select HAVE_IOREMAP_PROT if MMU && !X2TLB
diff --git a/arch/sparc/Kconfig b/arch/sparc/Kconfig
index a4a626199c47..9d4148f05e3e 100644
--- a/arch/sparc/Kconfig
+++ b/arch/sparc/Kconfig
@@ -48,6 +48,7 @@ config SPARC
config SPARC32
def_bool !64BIT
+ select ARCH_32BIT_OFF_T
select GENERIC_ATOMIC64
select CLZ_TAB
select HAVE_UID16
diff --git a/arch/tile/Kconfig b/arch/tile/Kconfig
index 4583c0320059..845dcbd8235e 100644
--- a/arch/tile/Kconfig
+++ b/arch/tile/Kconfig
@@ -3,6 +3,7 @@
config TILE
def_bool y
+ select ARCH_32BIT_OFF_T if !64BIT
select ARCH_HAS_DEVMEM_IS_ALLOWED
select ARCH_HAVE_NMI_SAFE_CMPXCHG
select ARCH_WANT_FRAME_POINTERS
diff --git a/arch/unicore32/Kconfig b/arch/unicore32/Kconfig
index 0a3bfd1fefcd..9629fd827d6b 100644
--- a/arch/unicore32/Kconfig
+++ b/arch/unicore32/Kconfig
@@ -1,5 +1,6 @@
config UNICORE32
def_bool y
+ select ARCH_32BIT_OFF_T
select ARCH_HAS_DEVMEM_IS_ALLOWED
select ARCH_MIGHT_HAVE_PC_PARPORT
select ARCH_MIGHT_HAVE_PC_SERIO
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index c88ae36eca8f..6c4196f3c380 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -43,6 +43,7 @@ config X86
select ACPI_LEGACY_TABLES_LOOKUP if ACPI
select ACPI_SYSTEM_POWER_STATES_SUPPORT if ACPI
select ANON_INODES
+ select ARCH_32BIT_OFF_T if X86_32
select ARCH_CLOCKSOURCE_DATA
select ARCH_DISCARD_MEMBLOCK
select ARCH_HAS_ACPI_TABLE_UPGRADE if ACPI
diff --git a/arch/x86/um/Kconfig b/arch/x86/um/Kconfig
index ed56a1c4ae73..8436bcd9beba 100644
--- a/arch/x86/um/Kconfig
+++ b/arch/x86/um/Kconfig
@@ -21,6 +21,7 @@ config 64BIT
config X86_32
def_bool !64BIT
select HAVE_AOUT
+ select ARCH_32BIT_OFF_T
select ARCH_WANT_IPC_PARSE_VERSION
select MODULES_USE_ELF_REL
select CLONE_BACKWARDS
diff --git a/arch/xtensa/Kconfig b/arch/xtensa/Kconfig
index f4126cf997a4..683f24e0b6a7 100644
--- a/arch/xtensa/Kconfig
+++ b/arch/xtensa/Kconfig
@@ -3,6 +3,7 @@ config ZONE_DMA
config XTENSA
def_bool y
+ select ARCH_32BIT_OFF_T
select ARCH_WANT_FRAME_POINTERS
select ARCH_WANT_IPC_PARSE_VERSION
select BUILDTIME_EXTABLE_SORT
diff --git a/include/linux/fcntl.h b/include/linux/fcntl.h
index 1b48d9c9a561..297993c92490 100644
--- a/include/linux/fcntl.h
+++ b/include/linux/fcntl.h
@@ -11,7 +11,7 @@
O_NOATIME | O_CLOEXEC | O_PATH | __O_TMPFILE)
#ifndef force_o_largefile
-#define force_o_largefile() (BITS_PER_LONG != 32)
+#define force_o_largefile() (!IS_ENABLED(CONFIG_ARCH_32BIT_OFF_T))
#endif
#if BITS_PER_LONG == 32
--
2.11.0
^ permalink raw reply related [flat|nested] 37+ messages in thread* [PATCH 04/20] arm64: ilp32: add documentation on the ILP32 ABI for ARM64
2017-06-19 15:49 [PATCH v8 00/20] ILP32 for ARM64 Yury Norov
2017-06-19 15:49 ` [PATCH 01/20] compat ABI: use non-compat openat and open_by_handle_at variants Yury Norov
2017-06-19 15:49 ` [PATCH 02/20] 32-bit userspace ABI: introduce ARCH_32BIT_OFF_T config option Yury Norov
@ 2017-06-19 15:49 ` Yury Norov
2017-06-19 15:49 ` [PATCH 05/20] arm64: rename COMPAT to AARCH32_EL0 in Kconfig Yury Norov
` (19 subsequent siblings)
22 siblings, 0 replies; 37+ messages in thread
From: Yury Norov @ 2017-06-19 15:49 UTC (permalink / raw)
To: linux-arm-kernel
Based on Andrew Pinski's patch-series.
Signed-off-by: Yury Norov <ynorov@caviumnetworks.com>
---
Documentation/arm64/ilp32.txt | 45 +++++++++++++++++++++++++++++++++++++++++++
1 file changed, 45 insertions(+)
create mode 100644 Documentation/arm64/ilp32.txt
diff --git a/Documentation/arm64/ilp32.txt b/Documentation/arm64/ilp32.txt
new file mode 100644
index 000000000000..08935a34e7e9
--- /dev/null
+++ b/Documentation/arm64/ilp32.txt
@@ -0,0 +1,45 @@
+ILP32 AARCH64 SYSCALL ABI
+=========================
+
+This document describes the ILP32 syscall ABI and where it differs
+from the generic compat linux syscall interface.
+
+AARCH64/ILP32 userspace can pass garbage in the top halve of w0-w7 registers
+(syscall arguments). So top 32 bits are zeroed for them.
+
+Comparing to AARCH32, AARCH64/ILP32 has 64-bit length of following types:
+ino_t is u64 type.
+off_t is s64 type.
+blkcnt_t is s64 type.
+fsblkcnt_t is u64 type.
+fsfilcnt_t is u64 type.
+rlim_t is u64 type.
+
+AARCH64/ILP32 ABI uses standard syscall table which can be found at
+include/uapi/asm-generic/unistd.h, with the exceptions listed below.
+
+Syscalls which pass 64-bit values are handled by the code shared from
+AARCH32 and pass that value as a pair. Next syscalls are affected:
+fadvise64_64()
+fallocate()
+ftruncate64()
+pread64()
+pwrite64()
+readahead()
+sync_file_range()
+truncate64()
+
+ptrace() syscall is handled by compat version.
+
+shmat() syscall is handled by non-compat handler as aarch64/ilp32 has no
+limitation on 4-pages alignement for shared memory.
+
+statfs() and fstatfs() take the size of struct statfs as an argument.
+It is calculated differently in kernel and user spaces. So AARCH32 handlers
+are taken to handle it.
+
+struct rt_sigframe is redefined and contains struct compat_siginfo,
+as compat syscalls expects, and struct ilp32_sigframe, to handle
+AARCH64 register set and 32-bit userspace register representation.
+
+elf_gregset_t is taken from lp64 to handle registers properly.
--
2.11.0
^ permalink raw reply related [flat|nested] 37+ messages in thread* [PATCH 05/20] arm64: rename COMPAT to AARCH32_EL0 in Kconfig
2017-06-19 15:49 [PATCH v8 00/20] ILP32 for ARM64 Yury Norov
` (2 preceding siblings ...)
2017-06-19 15:49 ` [PATCH 04/20] arm64: ilp32: add documentation on the ILP32 ABI for ARM64 Yury Norov
@ 2017-06-19 15:49 ` Yury Norov
2017-06-19 15:49 ` [PATCH 06/20] arm64: ensure the kernel is compiled for LP64 Yury Norov
` (18 subsequent siblings)
22 siblings, 0 replies; 37+ messages in thread
From: Yury Norov @ 2017-06-19 15:49 UTC (permalink / raw)
To: linux-arm-kernel
From: Andrew Pinski <apinski@cavium.com>
In this patchset ILP32 ABI support is added. Additionally to AARCH32,
which is binary-compatible with ARM, ILP32 is (mostly) ABI-compatible.
>From now, AARCH32_EL0 (former COMPAT) config option means the support of
AARCH32 userspace, and ARM64_ILP32 - support of ILP32 ABI (see following
patches), and COMPAT indicates that one of them or both is enabled.
Where needed, CONFIG_COMPAT is changed over to use CONFIG_AARCH32_EL0 instead
Reviewed-by: David Daney <ddaney@caviumnetworks.com>
Signed-off-by: Andrew Pinski <Andrew.Pinski@caviumnetworks.com>
Signed-off-by: Yury Norov <ynorov@caviumnetworks.com>
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
Signed-off-by: Bamvor Jian Zhang <bamvor.zhangjian@linaro.org>
---
arch/arm64/Kconfig | 9 +++++++--
arch/arm64/include/asm/fpsimd.h | 2 +-
arch/arm64/include/asm/hwcap.h | 4 ++--
arch/arm64/include/asm/processor.h | 6 +++---
arch/arm64/include/asm/ptrace.h | 2 +-
arch/arm64/include/asm/seccomp.h | 2 +-
arch/arm64/include/asm/signal32.h | 6 ++++--
arch/arm64/include/asm/unistd.h | 2 +-
arch/arm64/kernel/Makefile | 2 +-
arch/arm64/kernel/asm-offsets.c | 2 +-
arch/arm64/kernel/cpufeature.c | 8 ++++----
arch/arm64/kernel/cpuinfo.c | 8 ++++----
arch/arm64/kernel/entry.S | 6 +++---
arch/arm64/kernel/head.S | 2 +-
arch/arm64/kernel/ptrace.c | 8 ++++----
arch/arm64/kernel/traps.c | 2 +-
arch/arm64/kernel/vdso.c | 4 ++--
drivers/clocksource/arm_arch_timer.c | 2 +-
18 files changed, 42 insertions(+), 35 deletions(-)
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index 30cadd9a1dab..8713a2807582 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -407,7 +407,7 @@ config ARM64_ERRATUM_834220
config ARM64_ERRATUM_845719
bool "Cortex-A53: 845719: a load might read incorrect data"
- depends on COMPAT
+ depends on AARCH32_EL0
default y
help
This option adds an alternative code sequence to work around ARM
@@ -800,7 +800,7 @@ config FORCE_MAX_ZONEORDER
menuconfig ARMV8_DEPRECATED
bool "Emulate deprecated/obsolete ARMv8 instructions"
- depends on COMPAT
+ depends on AARCH32_EL0
help
Legacy software support may require certain instructions
that have been deprecated or obsoleted in the architecture.
@@ -1078,7 +1078,12 @@ menu "Userspace binary formats"
source "fs/Kconfig.binfmt"
config COMPAT
+ def_bool y
+ depends on AARCH32_EL0
+
+config AARCH32_EL0
bool "Kernel support for 32-bit EL0"
+ def_bool y
depends on ARM64_4K_PAGES || EXPERT
select COMPAT_BINFMT_ELF if BINFMT_ELF
select HAVE_UID16
diff --git a/arch/arm64/include/asm/fpsimd.h b/arch/arm64/include/asm/fpsimd.h
index 50f559f574fe..63b19f128c6c 100644
--- a/arch/arm64/include/asm/fpsimd.h
+++ b/arch/arm64/include/asm/fpsimd.h
@@ -52,7 +52,7 @@ struct fpsimd_partial_state {
};
-#if defined(__KERNEL__) && defined(CONFIG_COMPAT)
+#if defined(__KERNEL__) && defined(CONFIG_AARCH32_EL0)
/* Masks for extracting the FPSR and FPCR from the FPSCR */
#define VFP_FPSCR_STAT_MASK 0xf800009f
#define VFP_FPSCR_CTRL_MASK 0x07f79f00
diff --git a/arch/arm64/include/asm/hwcap.h b/arch/arm64/include/asm/hwcap.h
index 400b80b49595..2c7fc5d89813 100644
--- a/arch/arm64/include/asm/hwcap.h
+++ b/arch/arm64/include/asm/hwcap.h
@@ -46,7 +46,7 @@
*/
#define ELF_HWCAP (elf_hwcap)
-#ifdef CONFIG_COMPAT
+#ifdef CONFIG_AARCH32_EL0
#define COMPAT_ELF_HWCAP (compat_elf_hwcap)
#define COMPAT_ELF_HWCAP2 (compat_elf_hwcap2)
extern unsigned int compat_elf_hwcap, compat_elf_hwcap2;
@@ -54,7 +54,7 @@ extern unsigned int compat_elf_hwcap, compat_elf_hwcap2;
enum {
CAP_HWCAP = 1,
-#ifdef CONFIG_COMPAT
+#ifdef CONFIG_AARCH32_EL0
CAP_COMPAT_HWCAP,
CAP_COMPAT_HWCAP2,
#endif
diff --git a/arch/arm64/include/asm/processor.h b/arch/arm64/include/asm/processor.h
index 9428b93fefb2..2bbbd33549c0 100644
--- a/arch/arm64/include/asm/processor.h
+++ b/arch/arm64/include/asm/processor.h
@@ -81,7 +81,7 @@ struct cpu_context {
struct thread_struct {
struct cpu_context cpu_context; /* cpu context */
unsigned long tp_value; /* TLS register */
-#ifdef CONFIG_COMPAT
+#ifdef CONFIG_AARCH32_EL0
unsigned long tp2_value;
#endif
struct fpsimd_state fpsimd_state;
@@ -90,7 +90,7 @@ struct thread_struct {
struct debug_info debug; /* debugging */
};
-#ifdef CONFIG_COMPAT
+#ifdef CONFIG_AARCH32_EL0
#define task_user_tls(t) \
({ \
unsigned long *__tls; \
@@ -121,7 +121,7 @@ static inline void start_thread(struct pt_regs *regs, unsigned long pc,
regs->sp = sp;
}
-#ifdef CONFIG_COMPAT
+#ifdef CONFIG_AARCH32_EL0
static inline void compat_start_thread(struct pt_regs *regs, unsigned long pc,
unsigned long sp)
{
diff --git a/arch/arm64/include/asm/ptrace.h b/arch/arm64/include/asm/ptrace.h
index 11403fdd0a50..d668b3900b52 100644
--- a/arch/arm64/include/asm/ptrace.h
+++ b/arch/arm64/include/asm/ptrace.h
@@ -125,7 +125,7 @@ struct pt_regs {
#define arch_has_single_step() (1)
-#ifdef CONFIG_COMPAT
+#ifdef CONFIG_AARCH32_EL0
#define compat_thumb_mode(regs) \
(((regs)->pstate & COMPAT_PSR_T_BIT))
#else
diff --git a/arch/arm64/include/asm/seccomp.h b/arch/arm64/include/asm/seccomp.h
index c76fac979629..00ef0bf63230 100644
--- a/arch/arm64/include/asm/seccomp.h
+++ b/arch/arm64/include/asm/seccomp.h
@@ -13,7 +13,7 @@
#include <asm/unistd.h>
-#ifdef CONFIG_COMPAT
+#ifdef CONFIG_AARCH32_EL0
#define __NR_seccomp_read_32 __NR_compat_read
#define __NR_seccomp_write_32 __NR_compat_write
#define __NR_seccomp_exit_32 __NR_compat_exit
diff --git a/arch/arm64/include/asm/signal32.h b/arch/arm64/include/asm/signal32.h
index eeaa97559bab..e68fcce538e1 100644
--- a/arch/arm64/include/asm/signal32.h
+++ b/arch/arm64/include/asm/signal32.h
@@ -17,7 +17,9 @@
#define __ASM_SIGNAL32_H
#ifdef __KERNEL__
-#ifdef CONFIG_COMPAT
+
+#ifdef CONFIG_AARCH32_EL0
+
#include <linux/compat.h>
#define AARCH32_KERN_SIGRET_CODE_OFFSET 0x500
@@ -47,6 +49,6 @@ static inline int compat_setup_rt_frame(int usig, struct ksignal *ksig, sigset_t
static inline void compat_setup_restart_syscall(struct pt_regs *regs)
{
}
-#endif /* CONFIG_COMPAT */
+#endif /* CONFIG_AARCH32_EL0 */
#endif /* __KERNEL__ */
#endif /* __ASM_SIGNAL32_H */
diff --git a/arch/arm64/include/asm/unistd.h b/arch/arm64/include/asm/unistd.h
index a0baa9af5487..99d29290c98b 100644
--- a/arch/arm64/include/asm/unistd.h
+++ b/arch/arm64/include/asm/unistd.h
@@ -13,7 +13,7 @@
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
-#ifdef CONFIG_COMPAT
+#ifdef CONFIG_AARCH32_EL0
#define __ARCH_WANT_COMPAT_STAT64
#define __ARCH_WANT_SYS_GETHOSTNAME
#define __ARCH_WANT_SYS_PAUSE
diff --git a/arch/arm64/kernel/Makefile b/arch/arm64/kernel/Makefile
index f2b4e816b6de..49fefa42d136 100644
--- a/arch/arm64/kernel/Makefile
+++ b/arch/arm64/kernel/Makefile
@@ -27,7 +27,7 @@ OBJCOPYFLAGS := --prefix-symbols=__efistub_
$(obj)/%.stub.o: $(obj)/%.o FORCE
$(call if_changed,objcopy)
-arm64-obj-$(CONFIG_COMPAT) += sys32.o kuser32.o signal32.o \
+arm64-obj-$(CONFIG_AARCH32_EL0) += sys32.o kuser32.o signal32.o \
sys_compat.o entry32.o
arm64-obj-$(CONFIG_FUNCTION_TRACER) += ftrace.o entry-ftrace.o
arm64-obj-$(CONFIG_MODULES) += arm64ksyms.o module.o
diff --git a/arch/arm64/kernel/asm-offsets.c b/arch/arm64/kernel/asm-offsets.c
index b3bb7ef97bc8..aec5b6cedc7c 100644
--- a/arch/arm64/kernel/asm-offsets.c
+++ b/arch/arm64/kernel/asm-offsets.c
@@ -67,7 +67,7 @@ int main(void)
DEFINE(S_X28, offsetof(struct pt_regs, regs[28]));
DEFINE(S_LR, offsetof(struct pt_regs, regs[30]));
DEFINE(S_SP, offsetof(struct pt_regs, sp));
-#ifdef CONFIG_COMPAT
+#ifdef CONFIG_AARCH32_EL0
DEFINE(S_COMPAT_SP, offsetof(struct pt_regs, compat_sp));
#endif
DEFINE(S_PSTATE, offsetof(struct pt_regs, pstate));
diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
index 55d5c72a507d..960b4fe86ebd 100644
--- a/arch/arm64/kernel/cpufeature.c
+++ b/arch/arm64/kernel/cpufeature.c
@@ -36,7 +36,7 @@
unsigned long elf_hwcap __read_mostly;
EXPORT_SYMBOL_GPL(elf_hwcap);
-#ifdef CONFIG_COMPAT
+#ifdef CONFIG_AARCH32_EL0
#define COMPAT_ELF_HWCAP_DEFAULT \
(COMPAT_HWCAP_HALF|COMPAT_HWCAP_THUMB|\
COMPAT_HWCAP_FAST_MULT|COMPAT_HWCAP_EDSP|\
@@ -904,7 +904,7 @@ static const struct arm64_cpu_capabilities arm64_elf_hwcaps[] = {
};
static const struct arm64_cpu_capabilities compat_elf_hwcaps[] = {
-#ifdef CONFIG_COMPAT
+#ifdef CONFIG_AARCH32_EL0
HWCAP_CAP(SYS_ID_ISAR5_EL1, ID_ISAR5_AES_SHIFT, FTR_UNSIGNED, 2, CAP_COMPAT_HWCAP2, COMPAT_HWCAP2_PMULL),
HWCAP_CAP(SYS_ID_ISAR5_EL1, ID_ISAR5_AES_SHIFT, FTR_UNSIGNED, 1, CAP_COMPAT_HWCAP2, COMPAT_HWCAP2_AES),
HWCAP_CAP(SYS_ID_ISAR5_EL1, ID_ISAR5_SHA1_SHIFT, FTR_UNSIGNED, 1, CAP_COMPAT_HWCAP2, COMPAT_HWCAP2_SHA1),
@@ -920,7 +920,7 @@ static void __init cap_set_elf_hwcap(const struct arm64_cpu_capabilities *cap)
case CAP_HWCAP:
elf_hwcap |= cap->hwcap;
break;
-#ifdef CONFIG_COMPAT
+#ifdef CONFIG_AARCH32_EL0
case CAP_COMPAT_HWCAP:
compat_elf_hwcap |= (u32)cap->hwcap;
break;
@@ -943,7 +943,7 @@ static bool cpus_have_elf_hwcap(const struct arm64_cpu_capabilities *cap)
case CAP_HWCAP:
rc = (elf_hwcap & cap->hwcap) != 0;
break;
-#ifdef CONFIG_COMPAT
+#ifdef CONFIG_AARCH32_EL0
case CAP_COMPAT_HWCAP:
rc = (compat_elf_hwcap & (u32)cap->hwcap) != 0;
break;
diff --git a/arch/arm64/kernel/cpuinfo.c b/arch/arm64/kernel/cpuinfo.c
index 68b1f364c515..024d7e81aa33 100644
--- a/arch/arm64/kernel/cpuinfo.c
+++ b/arch/arm64/kernel/cpuinfo.c
@@ -71,7 +71,7 @@ static const char *const hwcap_str[] = {
NULL
};
-#ifdef CONFIG_COMPAT
+#ifdef CONFIG_AARCH32_EL0
static const char *const compat_hwcap_str[] = {
"swp",
"half",
@@ -106,7 +106,7 @@ static const char *const compat_hwcap2_str[] = {
"crc32",
NULL
};
-#endif /* CONFIG_COMPAT */
+#endif /* CONFIG_AARCH32_EL0 */
static int c_show(struct seq_file *m, void *v)
{
@@ -139,7 +139,7 @@ static int c_show(struct seq_file *m, void *v)
*/
seq_puts(m, "Features\t:");
if (compat) {
-#ifdef CONFIG_COMPAT
+#ifdef CONFIG_AARCH32_EL0
for (j = 0; compat_hwcap_str[j]; j++)
if (compat_elf_hwcap & (1 << j))
seq_printf(m, " %s", compat_hwcap_str[j]);
@@ -147,7 +147,7 @@ static int c_show(struct seq_file *m, void *v)
for (j = 0; compat_hwcap2_str[j]; j++)
if (compat_elf_hwcap2 & (1 << j))
seq_printf(m, " %s", compat_hwcap2_str[j]);
-#endif /* CONFIG_COMPAT */
+#endif /* CONFIG_AARCH32_EL0 */
} else {
for (j = 0; hwcap_str[j]; j++)
if (elf_hwcap & (1 << j))
diff --git a/arch/arm64/kernel/entry.S b/arch/arm64/kernel/entry.S
index b738880350f9..279bc2ab10c3 100644
--- a/arch/arm64/kernel/entry.S
+++ b/arch/arm64/kernel/entry.S
@@ -330,7 +330,7 @@ ENTRY(vectors)
ventry el0_fiq_invalid // FIQ 64-bit EL0
ventry el0_error_invalid // Error 64-bit EL0
-#ifdef CONFIG_COMPAT
+#ifdef CONFIG_AARCH32_EL0
ventry el0_sync_compat // Synchronous 32-bit EL0
ventry el0_irq_compat // IRQ 32-bit EL0
ventry el0_fiq_invalid_compat // FIQ 32-bit EL0
@@ -370,7 +370,7 @@ el0_error_invalid:
inv_entry 0, BAD_ERROR
ENDPROC(el0_error_invalid)
-#ifdef CONFIG_COMPAT
+#ifdef CONFIG_AARCH32_EL0
el0_fiq_invalid_compat:
inv_entry 0, BAD_FIQ, 32
ENDPROC(el0_fiq_invalid_compat)
@@ -539,7 +539,7 @@ el0_sync:
b.ge el0_dbg
b el0_inv
-#ifdef CONFIG_COMPAT
+#ifdef CONFIG_AARCH32_EL0
.align 6
el0_sync_compat:
kernel_entry 0, 32
diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S
index 973df7de7bf8..3f64dd138782 100644
--- a/arch/arm64/kernel/head.S
+++ b/arch/arm64/kernel/head.S
@@ -461,7 +461,7 @@ set_hcr:
msr vpidr_el2, x0
msr vmpidr_el2, x1
-#ifdef CONFIG_COMPAT
+#ifdef CONFIG_AARCH32_EL0
msr hstr_el2, xzr // Disable CP15 traps to EL2
#endif
diff --git a/arch/arm64/kernel/ptrace.c b/arch/arm64/kernel/ptrace.c
index c142459a88f3..da908f9a1e05 100644
--- a/arch/arm64/kernel/ptrace.c
+++ b/arch/arm64/kernel/ptrace.c
@@ -184,7 +184,7 @@ static void ptrace_hbptriggered(struct perf_event *bp,
.si_addr = (void __user *)(bkpt->trigger),
};
-#ifdef CONFIG_COMPAT
+#ifdef CONFIG_AARCH32_EL0
int i;
if (!is_compat_task())
@@ -766,7 +766,7 @@ static const struct user_regset_view user_aarch64_view = {
.regsets = aarch64_regsets, .n = ARRAY_SIZE(aarch64_regsets)
};
-#ifdef CONFIG_COMPAT
+#ifdef CONFIG_AARCH32_EL0
#include <linux/compat.h>
enum compat_regset {
@@ -1301,11 +1301,11 @@ long compat_arch_ptrace(struct task_struct *child, compat_long_t request,
return ret;
}
-#endif /* CONFIG_COMPAT */
+#endif /* CONFIG_AARCH32_EL0 */
const struct user_regset_view *task_user_regset_view(struct task_struct *task)
{
-#ifdef CONFIG_COMPAT
+#ifdef CONFIG_AARCH32_EL0
/*
* Core dumping of 32-bit tasks or compat ptrace requests must use the
* user_aarch32_view compatible with arm32. Native ptrace requests on
diff --git a/arch/arm64/kernel/traps.c b/arch/arm64/kernel/traps.c
index 3ebfb1d00b53..287a21ee39b3 100644
--- a/arch/arm64/kernel/traps.c
+++ b/arch/arm64/kernel/traps.c
@@ -576,7 +576,7 @@ long compat_arm_syscall(struct pt_regs *regs);
asmlinkage long do_ni_syscall(struct pt_regs *regs)
{
-#ifdef CONFIG_COMPAT
+#ifdef CONFIG_AARCH32_EL0
long ret;
if (is_compat_task()) {
ret = compat_arm_syscall(regs);
diff --git a/arch/arm64/kernel/vdso.c b/arch/arm64/kernel/vdso.c
index ae35f1855e06..a9f24184da38 100644
--- a/arch/arm64/kernel/vdso.c
+++ b/arch/arm64/kernel/vdso.c
@@ -49,7 +49,7 @@ static union {
} vdso_data_store __page_aligned_data;
struct vdso_data *vdso_data = &vdso_data_store.data;
-#ifdef CONFIG_COMPAT
+#ifdef CONFIG_AARCH32_EL0
/*
* Create and map the vectors page for AArch32 tasks.
*/
@@ -108,7 +108,7 @@ int aarch32_setup_vectors_page(struct linux_binprm *bprm, int uses_interp)
return PTR_ERR_OR_ZERO(ret);
}
-#endif /* CONFIG_COMPAT */
+#endif /* CONFIG_AARCH32_EL0 */
static struct vm_special_mapping vdso_spec[2] __ro_after_init = {
{
diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c
index a89d41cff915..8e04136b304b 100644
--- a/drivers/clocksource/arm_arch_timer.c
+++ b/drivers/clocksource/arm_arch_timer.c
@@ -733,7 +733,7 @@ static void arch_timer_evtstrm_enable(int divider)
| ARCH_TIMER_VIRT_EVT_EN;
arch_timer_set_cntkctl(cntkctl);
elf_hwcap |= HWCAP_EVTSTRM;
-#ifdef CONFIG_COMPAT
+#ifdef CONFIG_AARCH32_EL0
compat_elf_hwcap |= COMPAT_HWCAP_EVTSTRM;
#endif
}
--
2.11.0
^ permalink raw reply related [flat|nested] 37+ messages in thread* [PATCH 06/20] arm64: ensure the kernel is compiled for LP64
2017-06-19 15:49 [PATCH v8 00/20] ILP32 for ARM64 Yury Norov
` (3 preceding siblings ...)
2017-06-19 15:49 ` [PATCH 05/20] arm64: rename COMPAT to AARCH32_EL0 in Kconfig Yury Norov
@ 2017-06-19 15:49 ` Yury Norov
2017-06-19 15:49 ` [PATCH 07/20] arm64:uapi: set __BITS_PER_LONG correctly for ILP32 and LP64 Yury Norov
` (17 subsequent siblings)
22 siblings, 0 replies; 37+ messages in thread
From: Yury Norov @ 2017-06-19 15:49 UTC (permalink / raw)
To: linux-arm-kernel
From: Andrew Pinski <apinski@cavium.com>
The kernel needs to be compiled as a LP64 binary for ARM64, even when
using a compiler that defaults to code-generation for the ILP32 ABI.
Consequently, we need to explicitly pass '-mabi=lp64' (supported on
gcc-4.9 and newer).
Signed-off-by: Andrew Pinski <Andrew.Pinski@caviumnetworks.com>
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
Signed-off-by: Yury Norov <ynorov@caviumnetworks.com>
Reviewed-by: David Daney <ddaney@caviumnetworks.com>
---
arch/arm64/Makefile | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/Makefile b/arch/arm64/Makefile
index 1ce57b42f390..807451ffcc29 100644
--- a/arch/arm64/Makefile
+++ b/arch/arm64/Makefile
@@ -50,15 +50,20 @@ KBUILD_CFLAGS += -fno-asynchronous-unwind-tables
KBUILD_CFLAGS += $(call cc-option, -mpc-relative-literal-loads)
KBUILD_AFLAGS += $(lseinstr) $(brokengasinst)
+KBUILD_CFLAGS += $(call cc-option,-mabi=lp64)
+KBUILD_AFLAGS += $(call cc-option,-mabi=lp64)
+
ifeq ($(CONFIG_CPU_BIG_ENDIAN), y)
KBUILD_CPPFLAGS += -mbig-endian
AS += -EB
LD += -EB
+LDFLAGS += -maarch64linuxb
UTS_MACHINE := aarch64_be
else
KBUILD_CPPFLAGS += -mlittle-endian
AS += -EL
LD += -EL
+LDFLAGS += -maarch64linux
UTS_MACHINE := aarch64
endif
--
2.11.0
^ permalink raw reply related [flat|nested] 37+ messages in thread* [PATCH 07/20] arm64:uapi: set __BITS_PER_LONG correctly for ILP32 and LP64
2017-06-19 15:49 [PATCH v8 00/20] ILP32 for ARM64 Yury Norov
` (4 preceding siblings ...)
2017-06-19 15:49 ` [PATCH 06/20] arm64: ensure the kernel is compiled for LP64 Yury Norov
@ 2017-06-19 15:49 ` Yury Norov
2017-06-19 15:49 ` [PATCH 08/20] thread: move thread bits accessors to separated file Yury Norov
` (16 subsequent siblings)
22 siblings, 0 replies; 37+ messages in thread
From: Yury Norov @ 2017-06-19 15:49 UTC (permalink / raw)
To: linux-arm-kernel
From: Andrew Pinski <apinski@cavium.com>
Define __BITS_PER_LONG depending on the ABI used (i.e. check whether
__ILP32__ or __LP64__ is defined). This is necessary for glibc to
determine the appropriate type definitions for the system call interface.
Signed-off-by: Andrew Pinski <apinski@cavium.com>
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
Signed-off-by: Yury Norov <ynorov@caviumnetworks.com>
Reviewed-by: David Daney <ddaney@caviumnetworks.com>
---
arch/arm64/include/uapi/asm/bitsperlong.h | 9 ++++++++-
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/include/uapi/asm/bitsperlong.h b/arch/arm64/include/uapi/asm/bitsperlong.h
index fce9c2924fa3..4265243e326f 100644
--- a/arch/arm64/include/uapi/asm/bitsperlong.h
+++ b/arch/arm64/include/uapi/asm/bitsperlong.h
@@ -16,7 +16,14 @@
#ifndef __ASM_BITSPERLONG_H
#define __ASM_BITSPERLONG_H
-#define __BITS_PER_LONG 64
+#if defined(__LP64__)
+/* Assuming __LP64__ will be defined for native ELF64's and not for ILP32. */
+# define __BITS_PER_LONG 64
+#elif defined(__ILP32__)
+# define __BITS_PER_LONG 32
+#else
+# error "Neither LP64 nor ILP32: unsupported ABI in asm/bitsperlong.h"
+#endif
#include <asm-generic/bitsperlong.h>
--
2.11.0
^ permalink raw reply related [flat|nested] 37+ messages in thread* [PATCH 08/20] thread: move thread bits accessors to separated file
2017-06-19 15:49 [PATCH v8 00/20] ILP32 for ARM64 Yury Norov
` (5 preceding siblings ...)
2017-06-19 15:49 ` [PATCH 07/20] arm64:uapi: set __BITS_PER_LONG correctly for ILP32 and LP64 Yury Norov
@ 2017-06-19 15:49 ` Yury Norov
[not found] ` <mvma8432jsx.fsf@suse.de>
2017-06-19 15:49 ` [PATCH 09/20] arm64: introduce is_a32_task and is_a32_thread (for AArch32 compat) Yury Norov
` (15 subsequent siblings)
22 siblings, 1 reply; 37+ messages in thread
From: Yury Norov @ 2017-06-19 15:49 UTC (permalink / raw)
To: linux-arm-kernel
They may be accessed from low-level code, so isolating is a measure to
avoid circular dependencies in header files.
The exact reason for circular dependency is WARN_ON() macro added in patch
edd63a27 "set_restore_sigmask() is never called without SIGPENDING (and
never should be)"
Signed-off-by: Yury Norov <ynorov@caviumnetworks.com>
---
include/linux/thread_bits.h | 63 +++++++++++++++++++++++++++++++++++++++++++
include/linux/thread_info.h | 65 +++++++++------------------------------------
2 files changed, 75 insertions(+), 53 deletions(-)
create mode 100644 include/linux/thread_bits.h
diff --git a/include/linux/thread_bits.h b/include/linux/thread_bits.h
new file mode 100644
index 000000000000..87354331bc7b
--- /dev/null
+++ b/include/linux/thread_bits.h
@@ -0,0 +1,63 @@
+/* thread_bits.h: common low-level thread bits accessors */
+
+#ifndef _LINUX_THREAD_BITS_H
+#define _LINUX_THREAD_BITS_H
+
+#ifndef __ASSEMBLY__
+
+#include <linux/bitops.h>
+#include <asm/thread_info.h>
+
+#ifdef CONFIG_THREAD_INFO_IN_TASK
+/*
+ * For CONFIG_THREAD_INFO_IN_TASK kernels we need <asm/current.h> for the
+ * definition of current, but for !CONFIG_THREAD_INFO_IN_TASK kernels,
+ * including <asm/current.h> can cause a circular dependency on some platforms.
+ */
+#include <asm/current.h>
+#define current_thread_info() ((struct thread_info *)current)
+#endif
+
+/*
+ * flag set/clear/test wrappers
+ * - pass TIF_xxxx constants to these functions
+ */
+
+static inline void set_ti_thread_flag(struct thread_info *ti, int flag)
+{
+ set_bit(flag, (unsigned long *)&ti->flags);
+}
+
+static inline void clear_ti_thread_flag(struct thread_info *ti, int flag)
+{
+ clear_bit(flag, (unsigned long *)&ti->flags);
+}
+
+static inline int test_and_set_ti_thread_flag(struct thread_info *ti, int flag)
+{
+ return test_and_set_bit(flag, (unsigned long *)&ti->flags);
+}
+
+static inline int test_and_clear_ti_thread_flag(struct thread_info *ti, int flag)
+{
+ return test_and_clear_bit(flag, (unsigned long *)&ti->flags);
+}
+
+static inline int test_ti_thread_flag(struct thread_info *ti, int flag)
+{
+ return test_bit(flag, (unsigned long *)&ti->flags);
+}
+
+#define set_thread_flag(flag) \
+ set_ti_thread_flag(current_thread_info(), flag)
+#define clear_thread_flag(flag) \
+ clear_ti_thread_flag(current_thread_info(), flag)
+#define test_and_set_thread_flag(flag) \
+ test_and_set_ti_thread_flag(current_thread_info(), flag)
+#define test_and_clear_thread_flag(flag) \
+ test_and_clear_ti_thread_flag(current_thread_info(), flag)
+#define test_thread_flag(flag) \
+ test_ti_thread_flag(current_thread_info(), flag)
+
+#endif /* !__ASSEMBLY__ */
+#endif /* _LINUX_THREAD_BITS_H */
diff --git a/include/linux/thread_info.h b/include/linux/thread_info.h
index d7d3ea637dd0..c40a89357329 100644
--- a/include/linux/thread_info.h
+++ b/include/linux/thread_info.h
@@ -7,9 +7,21 @@
#ifndef _LINUX_THREAD_INFO_H
#define _LINUX_THREAD_INFO_H
+/*
+ * For per-arch arch_within_stack_frames() implementations, defined in
+ * asm/thread_info.h.
+ */
+enum {
+ BAD_STACK = -1,
+ NOT_STACK = 0,
+ GOOD_FRAME,
+ GOOD_STACK,
+};
+
#include <linux/types.h>
#include <linux/bug.h>
#include <linux/restart_block.h>
+#include <linux/thread_bits.h>
#ifdef CONFIG_THREAD_INFO_IN_TASK
/*
@@ -22,18 +34,6 @@
#endif
#include <linux/bitops.h>
-
-/*
- * For per-arch arch_within_stack_frames() implementations, defined in
- * asm/thread_info.h.
- */
-enum {
- BAD_STACK = -1,
- NOT_STACK = 0,
- GOOD_FRAME,
- GOOD_STACK,
-};
-
#include <asm/thread_info.h>
#ifdef __KERNEL__
@@ -45,47 +45,6 @@ enum {
# define THREADINFO_GFP (GFP_KERNEL_ACCOUNT | __GFP_NOTRACK)
#endif
-/*
- * flag set/clear/test wrappers
- * - pass TIF_xxxx constants to these functions
- */
-
-static inline void set_ti_thread_flag(struct thread_info *ti, int flag)
-{
- set_bit(flag, (unsigned long *)&ti->flags);
-}
-
-static inline void clear_ti_thread_flag(struct thread_info *ti, int flag)
-{
- clear_bit(flag, (unsigned long *)&ti->flags);
-}
-
-static inline int test_and_set_ti_thread_flag(struct thread_info *ti, int flag)
-{
- return test_and_set_bit(flag, (unsigned long *)&ti->flags);
-}
-
-static inline int test_and_clear_ti_thread_flag(struct thread_info *ti, int flag)
-{
- return test_and_clear_bit(flag, (unsigned long *)&ti->flags);
-}
-
-static inline int test_ti_thread_flag(struct thread_info *ti, int flag)
-{
- return test_bit(flag, (unsigned long *)&ti->flags);
-}
-
-#define set_thread_flag(flag) \
- set_ti_thread_flag(current_thread_info(), flag)
-#define clear_thread_flag(flag) \
- clear_ti_thread_flag(current_thread_info(), flag)
-#define test_and_set_thread_flag(flag) \
- test_and_set_ti_thread_flag(current_thread_info(), flag)
-#define test_and_clear_thread_flag(flag) \
- test_and_clear_ti_thread_flag(current_thread_info(), flag)
-#define test_thread_flag(flag) \
- test_ti_thread_flag(current_thread_info(), flag)
-
#define tif_need_resched() test_thread_flag(TIF_NEED_RESCHED)
#ifndef CONFIG_HAVE_ARCH_WITHIN_STACK_FRAMES
--
2.11.0
^ permalink raw reply related [flat|nested] 37+ messages in thread* [PATCH 09/20] arm64: introduce is_a32_task and is_a32_thread (for AArch32 compat)
2017-06-19 15:49 [PATCH v8 00/20] ILP32 for ARM64 Yury Norov
` (6 preceding siblings ...)
2017-06-19 15:49 ` [PATCH 08/20] thread: move thread bits accessors to separated file Yury Norov
@ 2017-06-19 15:49 ` Yury Norov
2017-06-19 15:49 ` [PATCH 10/20] arm64: ilp32: add is_ilp32_compat_{task, thread} and TIF_32BIT_AARCH64 Yury Norov
` (14 subsequent siblings)
22 siblings, 0 replies; 37+ messages in thread
From: Yury Norov @ 2017-06-19 15:49 UTC (permalink / raw)
To: linux-arm-kernel
Based on patch of Andrew Pinski.
This patch introduces is_a32_compat_task and is_a32_thread so it is
easier to say this is a a32 specific thread or a generic compat thread/task.
Corresponding functions are located in <asm/is_compat.h> to avoid mess in
headers.
Some files include both <linux/compat.h> and <asm/compat.h>,
and this is wrong because <linux/compat.h> has <asm/compat.h> already
included. It was fixed too.
Signed-off-by: Yury Norov <ynorov@caviumnetworks.com>
Signed-off-by: Andrew Pinski <Andrew.Pinski@caviumnetworks.com>
Signed-off-by: Bamvor Jian Zhang <bamvor.zhangjian@linaro.org>
---
arch/arm64/include/asm/compat.h | 19 ++---------
arch/arm64/include/asm/elf.h | 10 +++---
arch/arm64/include/asm/ftrace.h | 2 +-
arch/arm64/include/asm/is_compat.h | 64 ++++++++++++++++++++++++++++++++++++
arch/arm64/include/asm/memory.h | 5 +--
arch/arm64/include/asm/processor.h | 5 +--
arch/arm64/include/asm/syscall.h | 2 +-
arch/arm64/include/asm/thread_info.h | 2 +-
arch/arm64/kernel/hw_breakpoint.c | 8 ++---
arch/arm64/kernel/perf_regs.c | 2 +-
arch/arm64/kernel/process.c | 7 ++--
arch/arm64/kernel/ptrace.c | 11 +++----
arch/arm64/kernel/signal.c | 4 +--
arch/arm64/kernel/traps.c | 3 +-
arch/arm64/mm/mmap.c | 2 +-
15 files changed, 98 insertions(+), 48 deletions(-)
create mode 100644 arch/arm64/include/asm/is_compat.h
diff --git a/arch/arm64/include/asm/compat.h b/arch/arm64/include/asm/compat.h
index e39d487bf724..463533b1ae32 100644
--- a/arch/arm64/include/asm/compat.h
+++ b/arch/arm64/include/asm/compat.h
@@ -25,6 +25,8 @@
#include <linux/sched.h>
#include <linux/sched/task_stack.h>
+#include <asm/is_compat.h>
+
#define COMPAT_USER_HZ 100
#ifdef __AARCH64EB__
#define COMPAT_UTS_MACHINE "armv8b\0\0"
@@ -299,23 +301,6 @@ struct compat_shmid64_ds {
compat_ulong_t __unused5;
};
-static inline int is_compat_task(void)
-{
- return test_thread_flag(TIF_32BIT);
-}
-
-static inline int is_compat_thread(struct thread_info *thread)
-{
- return test_ti_thread_flag(thread, TIF_32BIT);
-}
-
-#else /* !CONFIG_COMPAT */
-
-static inline int is_compat_thread(struct thread_info *thread)
-{
- return 0;
-}
-
#endif /* CONFIG_COMPAT */
#endif /* __KERNEL__ */
#endif /* __ASM_COMPAT_H */
diff --git a/arch/arm64/include/asm/elf.h b/arch/arm64/include/asm/elf.h
index ac3fb7441510..6a37b6facc69 100644
--- a/arch/arm64/include/asm/elf.h
+++ b/arch/arm64/include/asm/elf.h
@@ -16,6 +16,10 @@
#ifndef __ASM_ELF_H
#define __ASM_ELF_H
+#ifndef __ASSEMBLY__
+#include <linux/compat.h>
+#endif
+
#include <asm/hwcap.h>
/*
@@ -158,13 +162,9 @@ extern int arch_setup_additional_pages(struct linux_binprm *bprm,
int uses_interp);
/* 1GB of VA */
-#ifdef CONFIG_COMPAT
-#define STACK_RND_MASK (test_thread_flag(TIF_32BIT) ? \
+#define STACK_RND_MASK (is_compat_task() ? \
0x7ff >> (PAGE_SHIFT - 12) : \
0x3ffff >> (PAGE_SHIFT - 12))
-#else
-#define STACK_RND_MASK (0x3ffff >> (PAGE_SHIFT - 12))
-#endif
#ifdef __AARCH64EB__
#define COMPAT_ELF_PLATFORM ("v8b")
diff --git a/arch/arm64/include/asm/ftrace.h b/arch/arm64/include/asm/ftrace.h
index caa955f10e19..0feb28ad10dd 100644
--- a/arch/arm64/include/asm/ftrace.h
+++ b/arch/arm64/include/asm/ftrace.h
@@ -54,7 +54,7 @@ static inline unsigned long ftrace_call_adjust(unsigned long addr)
#define ARCH_TRACE_IGNORE_COMPAT_SYSCALLS
static inline bool arch_trace_is_compat_syscall(struct pt_regs *regs)
{
- return is_compat_task();
+ return is_a32_compat_task();
}
#endif /* ifndef __ASSEMBLY__ */
diff --git a/arch/arm64/include/asm/is_compat.h b/arch/arm64/include/asm/is_compat.h
new file mode 100644
index 000000000000..8dba5caaf5d1
--- /dev/null
+++ b/arch/arm64/include/asm/is_compat.h
@@ -0,0 +1,64 @@
+/*
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef __ASM_IS_COMPAT_H
+#define __ASM_IS_COMPAT_H
+#ifndef __ASSEMBLY__
+
+#include <linux/thread_bits.h>
+
+#ifdef CONFIG_AARCH32_EL0
+
+static inline int is_a32_compat_task(void)
+{
+ return test_thread_flag(TIF_32BIT);
+}
+
+static inline int is_a32_compat_thread(struct thread_info *thread)
+{
+ return test_ti_thread_flag(thread, TIF_32BIT);
+}
+
+#else
+
+static inline int is_a32_compat_task(void)
+
+{
+ return 0;
+}
+
+static inline int is_a32_compat_thread(struct thread_info *thread)
+{
+ return 0;
+}
+
+#endif /* CONFIG_AARCH32_EL0 */
+
+#ifdef CONFIG_COMPAT
+
+static inline int is_compat_task(void)
+{
+ return is_a32_compat_task();
+}
+
+#endif /* CONFIG_COMPAT */
+
+static inline int is_compat_thread(struct thread_info *thread)
+{
+ return is_a32_compat_thread(thread);
+}
+
+
+#endif /* !__ASSEMBLY__ */
+#endif /* __ASM_IS_COMPAT_H */
diff --git a/arch/arm64/include/asm/memory.h b/arch/arm64/include/asm/memory.h
index 32f82723338a..9b1835ca808f 100644
--- a/arch/arm64/include/asm/memory.h
+++ b/arch/arm64/include/asm/memory.h
@@ -26,6 +26,7 @@
#include <linux/types.h>
#include <asm/bug.h>
#include <asm/sizes.h>
+#include <asm/is_compat.h>
/*
* Allow for constants defined here to be used from assembly code
@@ -78,9 +79,9 @@
#ifdef CONFIG_COMPAT
#define TASK_SIZE_32 UL(0x100000000)
-#define TASK_SIZE (test_thread_flag(TIF_32BIT) ? \
+#define TASK_SIZE (is_compat_task() ? \
TASK_SIZE_32 : TASK_SIZE_64)
-#define TASK_SIZE_OF(tsk) (test_tsk_thread_flag(tsk, TIF_32BIT) ? \
+#define TASK_SIZE_OF(tsk) (is_compat_thread(tsk) ? \
TASK_SIZE_32 : TASK_SIZE_64)
#else
#define TASK_SIZE TASK_SIZE_64
diff --git a/arch/arm64/include/asm/processor.h b/arch/arm64/include/asm/processor.h
index 2bbbd33549c0..0136a1af677d 100644
--- a/arch/arm64/include/asm/processor.h
+++ b/arch/arm64/include/asm/processor.h
@@ -30,6 +30,7 @@
#include <linux/string.h>
#include <asm/alternative.h>
+#include <asm/is_compat.h>
#include <asm/fpsimd.h>
#include <asm/hw_breakpoint.h>
#include <asm/lse.h>
@@ -40,7 +41,7 @@
#define STACK_TOP_MAX TASK_SIZE_64
#ifdef CONFIG_COMPAT
#define AARCH32_VECTORS_BASE 0xffff0000
-#define STACK_TOP (test_thread_flag(TIF_32BIT) ? \
+#define STACK_TOP (is_compat_task() ? \
AARCH32_VECTORS_BASE : STACK_TOP_MAX)
#else
#define STACK_TOP STACK_TOP_MAX
@@ -94,7 +95,7 @@ struct thread_struct {
#define task_user_tls(t) \
({ \
unsigned long *__tls; \
- if (is_compat_thread(task_thread_info(t))) \
+ if (is_a32_compat_thread(task_thread_info(t))) \
__tls = &(t)->thread.tp2_value; \
else \
__tls = &(t)->thread.tp_value; \
diff --git a/arch/arm64/include/asm/syscall.h b/arch/arm64/include/asm/syscall.h
index 709a574468f0..ce09641f888d 100644
--- a/arch/arm64/include/asm/syscall.h
+++ b/arch/arm64/include/asm/syscall.h
@@ -113,7 +113,7 @@ static inline void syscall_set_arguments(struct task_struct *task,
*/
static inline int syscall_get_arch(void)
{
- if (is_compat_task())
+ if (is_a32_compat_task())
return AUDIT_ARCH_ARM;
return AUDIT_ARCH_AARCH64;
diff --git a/arch/arm64/include/asm/thread_info.h b/arch/arm64/include/asm/thread_info.h
index 46c3b93cf865..a7ffea24d94d 100644
--- a/arch/arm64/include/asm/thread_info.h
+++ b/arch/arm64/include/asm/thread_info.h
@@ -95,7 +95,7 @@ struct thread_info {
#define TIF_FREEZE 19
#define TIF_RESTORE_SIGMASK 20
#define TIF_SINGLESTEP 21
-#define TIF_32BIT 22 /* 32bit process */
+#define TIF_32BIT 22 /* AARCH32 process */
#define _TIF_SIGPENDING (1 << TIF_SIGPENDING)
#define _TIF_NEED_RESCHED (1 << TIF_NEED_RESCHED)
diff --git a/arch/arm64/kernel/hw_breakpoint.c b/arch/arm64/kernel/hw_breakpoint.c
index 749f81779420..49b9a29915c0 100644
--- a/arch/arm64/kernel/hw_breakpoint.c
+++ b/arch/arm64/kernel/hw_breakpoint.c
@@ -169,7 +169,7 @@ enum hw_breakpoint_ops {
HW_BREAKPOINT_RESTORE
};
-static int is_compat_bp(struct perf_event *bp)
+static int is_a32_compat_bp(struct perf_event *bp)
{
struct task_struct *tsk = bp->hw.target;
@@ -180,7 +180,7 @@ static int is_compat_bp(struct perf_event *bp)
* deprecated behaviour if we use unaligned watchpoints in
* AArch64 state.
*/
- return tsk && is_compat_thread(task_thread_info(tsk));
+ return tsk && is_a32_compat_thread(task_thread_info(tsk));
}
/**
@@ -480,7 +480,7 @@ static int arch_build_bp_info(struct perf_event *bp)
* Watchpoints can be of length 1, 2, 4 or 8 bytes.
*/
if (info->ctrl.type == ARM_BREAKPOINT_EXECUTE) {
- if (is_compat_bp(bp)) {
+ if (is_a32_compat_bp(bp)) {
if (info->ctrl.len != ARM_BREAKPOINT_LEN_2 &&
info->ctrl.len != ARM_BREAKPOINT_LEN_4)
return -EINVAL;
@@ -537,7 +537,7 @@ int arch_validate_hwbkpt_settings(struct perf_event *bp)
* AArch32 tasks expect some simple alignment fixups, so emulate
* that here.
*/
- if (is_compat_bp(bp)) {
+ if (is_a32_compat_bp(bp)) {
if (info->ctrl.len == ARM_BREAKPOINT_LEN_8)
alignment_mask = 0x7;
else
diff --git a/arch/arm64/kernel/perf_regs.c b/arch/arm64/kernel/perf_regs.c
index bd1b74c2436f..443e42001108 100644
--- a/arch/arm64/kernel/perf_regs.c
+++ b/arch/arm64/kernel/perf_regs.c
@@ -46,7 +46,7 @@ int perf_reg_validate(u64 mask)
u64 perf_reg_abi(struct task_struct *task)
{
- if (is_compat_thread(task_thread_info(task)))
+ if (is_a32_compat_thread(task_thread_info(task)))
return PERF_SAMPLE_REGS_ABI_32;
else
return PERF_SAMPLE_REGS_ABI_64;
diff --git a/arch/arm64/kernel/process.c b/arch/arm64/kernel/process.c
index af1ea258c212..0fbbe7c96f69 100644
--- a/arch/arm64/kernel/process.c
+++ b/arch/arm64/kernel/process.c
@@ -51,7 +51,6 @@
#include <linux/percpu.h>
#include <asm/alternative.h>
-#include <asm/compat.h>
#include <asm/cacheflush.h>
#include <asm/exec.h>
#include <asm/fpsimd.h>
@@ -217,7 +216,7 @@ static void tls_thread_flush(void)
{
write_sysreg(0, tpidr_el0);
- if (is_compat_task()) {
+ if (is_a32_compat_task()) {
current->thread.tp_value = 0;
/*
@@ -269,7 +268,7 @@ int copy_thread(unsigned long clone_flags, unsigned long stack_start,
*task_user_tls(p) = read_sysreg(tpidr_el0);
if (stack_start) {
- if (is_compat_thread(task_thread_info(p)))
+ if (is_a32_compat_thread(task_thread_info(p)))
childregs->compat_sp = stack_start;
else
childregs->sp = stack_start;
@@ -306,7 +305,7 @@ static void tls_thread_switch(struct task_struct *next)
*task_user_tls(current) = tpidr;
tpidr = *task_user_tls(next);
- tpidrro = is_compat_thread(task_thread_info(next)) ?
+ tpidrro = is_a32_compat_thread(task_thread_info(next)) ?
next->thread.tp_value : 0;
write_sysreg(tpidr, tpidr_el0);
diff --git a/arch/arm64/kernel/ptrace.c b/arch/arm64/kernel/ptrace.c
index da908f9a1e05..e2b7c040bf84 100644
--- a/arch/arm64/kernel/ptrace.c
+++ b/arch/arm64/kernel/ptrace.c
@@ -39,7 +39,6 @@
#include <linux/tracehook.h>
#include <linux/elf.h>
-#include <asm/compat.h>
#include <asm/debug-monitors.h>
#include <asm/pgtable.h>
#include <asm/syscall.h>
@@ -187,7 +186,7 @@ static void ptrace_hbptriggered(struct perf_event *bp,
#ifdef CONFIG_AARCH32_EL0
int i;
- if (!is_compat_task())
+ if (!is_a32_compat_task())
goto send_sig;
for (i = 0; i < ARM_MAX_BRP; ++i) {
@@ -1312,9 +1311,9 @@ const struct user_regset_view *task_user_regset_view(struct task_struct *task)
* 32-bit children use an extended user_aarch32_ptrace_view to allow
* access to the TLS register.
*/
- if (is_compat_task())
+ if (is_a32_compat_task())
return &user_aarch32_view;
- else if (is_compat_thread(task_thread_info(task)))
+ else if (is_a32_compat_thread(task_thread_info(task)))
return &user_aarch32_ptrace_view;
#endif
return &user_aarch64_view;
@@ -1341,7 +1340,7 @@ static void tracehook_report_syscall(struct pt_regs *regs,
* A scratch register (ip(r12) on AArch32, x7 on AArch64) is
* used to denote syscall entry/exit:
*/
- regno = (is_compat_task() ? 12 : 7);
+ regno = (is_a32_compat_task() ? 12 : 7);
saved_reg = regs->regs[regno];
regs->regs[regno] = dir;
@@ -1452,7 +1451,7 @@ int valid_user_regs(struct user_pt_regs *regs, struct task_struct *task)
if (!test_tsk_thread_flag(task, TIF_SINGLESTEP))
regs->pstate &= ~DBG_SPSR_SS;
- if (is_compat_thread(task_thread_info(task)))
+ if (is_a32_compat_thread(task_thread_info(task)))
return valid_compat_regs(regs);
else
return valid_native_regs(regs);
diff --git a/arch/arm64/kernel/signal.c b/arch/arm64/kernel/signal.c
index c7b6de62f9d3..5fa1b401c5d6 100644
--- a/arch/arm64/kernel/signal.c
+++ b/arch/arm64/kernel/signal.c
@@ -276,7 +276,7 @@ static int setup_rt_frame(int usig, struct ksignal *ksig, sigset_t *set,
static void setup_restart_syscall(struct pt_regs *regs)
{
- if (is_compat_task())
+ if (is_a32_compat_task())
compat_setup_restart_syscall(regs);
else
regs->regs[8] = __NR_restart_syscall;
@@ -295,7 +295,7 @@ static void handle_signal(struct ksignal *ksig, struct pt_regs *regs)
/*
* Set up the stack frame
*/
- if (is_compat_task()) {
+ if (is_a32_compat_task()) {
if (ksig->ka.sa.sa_flags & SA_SIGINFO)
ret = compat_setup_rt_frame(usig, ksig, oldset, regs);
else
diff --git a/arch/arm64/kernel/traps.c b/arch/arm64/kernel/traps.c
index 287a21ee39b3..d1e40129afe0 100644
--- a/arch/arm64/kernel/traps.c
+++ b/arch/arm64/kernel/traps.c
@@ -18,6 +18,7 @@
*/
#include <linux/bug.h>
+#include <linux/compat.h>
#include <linux/signal.h>
#include <linux/personality.h>
#include <linux/kallsyms.h>
@@ -578,7 +579,7 @@ asmlinkage long do_ni_syscall(struct pt_regs *regs)
{
#ifdef CONFIG_AARCH32_EL0
long ret;
- if (is_compat_task()) {
+ if (is_a32_compat_task()) {
ret = compat_arm_syscall(regs);
if (ret != -ENOSYS)
return ret;
diff --git a/arch/arm64/mm/mmap.c b/arch/arm64/mm/mmap.c
index adc208c2ae9c..57b25e7770dc 100644
--- a/arch/arm64/mm/mmap.c
+++ b/arch/arm64/mm/mmap.c
@@ -54,7 +54,7 @@ unsigned long arch_mmap_rnd(void)
unsigned long rnd;
#ifdef CONFIG_COMPAT
- if (test_thread_flag(TIF_32BIT))
+ if (is_compat_task())
rnd = get_random_long() & ((1UL << mmap_rnd_compat_bits) - 1);
else
#endif
--
2.11.0
^ permalink raw reply related [flat|nested] 37+ messages in thread* [PATCH 10/20] arm64: ilp32: add is_ilp32_compat_{task, thread} and TIF_32BIT_AARCH64
2017-06-19 15:49 [PATCH v8 00/20] ILP32 for ARM64 Yury Norov
` (7 preceding siblings ...)
2017-06-19 15:49 ` [PATCH 09/20] arm64: introduce is_a32_task and is_a32_thread (for AArch32 compat) Yury Norov
@ 2017-06-19 15:49 ` Yury Norov
2017-06-19 15:49 ` [PATCH 11/20] arm64: introduce binfmt_elf32.c Yury Norov
` (13 subsequent siblings)
22 siblings, 0 replies; 37+ messages in thread
From: Yury Norov @ 2017-06-19 15:49 UTC (permalink / raw)
To: linux-arm-kernel
ILP32 tasks are needed to be distinguished from lp64 and aarch32.
This patch adds helper functions is_ilp32_compat_{task,thread} and
thread flag TIF_32BIT_AARCH64 to address it. This is a preparation
for following patches in ilp32 patchset.
For consistency, SET_PERSONALITY is changed here accordingly.
Signed-off-by: Andrew Pinski <Andrew.Pinski@caviumnetworks.com>
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
Signed-off-by: Yury Norov <ynorov@caviumnetworks.com>
Reviewed-by: David Daney <ddaney@caviumnetworks.com>
---
arch/arm64/include/asm/elf.h | 2 ++
arch/arm64/include/asm/is_compat.h | 30 ++++++++++++++++++++++++++++--
arch/arm64/include/asm/thread_info.h | 2 ++
3 files changed, 32 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/include/asm/elf.h b/arch/arm64/include/asm/elf.h
index 6a37b6facc69..8f7bafa60d01 100644
--- a/arch/arm64/include/asm/elf.h
+++ b/arch/arm64/include/asm/elf.h
@@ -145,6 +145,7 @@ typedef struct user_fpsimd_state elf_fpregset_t;
#define SET_PERSONALITY(ex) \
({ \
clear_bit(TIF_32BIT, ¤t->mm->context.flags); \
+ clear_thread_flag(TIF_32BIT_AARCH64); \
clear_thread_flag(TIF_32BIT); \
current->personality &= ~READ_IMPLIES_EXEC; \
})
@@ -196,6 +197,7 @@ typedef compat_elf_greg_t compat_elf_gregset_t[COMPAT_ELF_NGREG];
#define COMPAT_SET_PERSONALITY(ex) \
({ \
set_bit(TIF_32BIT, ¤t->mm->context.flags); \
+ clear_thread_flag(TIF_32BIT_AARCH64); \
set_thread_flag(TIF_32BIT); \
})
#define COMPAT_ARCH_DLINFO
diff --git a/arch/arm64/include/asm/is_compat.h b/arch/arm64/include/asm/is_compat.h
index 8dba5caaf5d1..7726bebc4115 100644
--- a/arch/arm64/include/asm/is_compat.h
+++ b/arch/arm64/include/asm/is_compat.h
@@ -45,18 +45,44 @@ static inline int is_a32_compat_thread(struct thread_info *thread)
#endif /* CONFIG_AARCH32_EL0 */
+#ifdef CONFIG_ARM64_ILP32
+
+static inline int is_ilp32_compat_task(void)
+{
+ return test_thread_flag(TIF_32BIT_AARCH64);
+}
+
+static inline int is_ilp32_compat_thread(struct thread_info *thread)
+{
+ return test_ti_thread_flag(thread, TIF_32BIT_AARCH64);
+}
+
+#else
+
+static inline int is_ilp32_compat_task(void)
+{
+ return 0;
+}
+
+static inline int is_ilp32_compat_thread(struct thread_info *thread)
+{
+ return 0;
+}
+
+#endif /* CONFIG_ARM64_ILP32 */
+
#ifdef CONFIG_COMPAT
static inline int is_compat_task(void)
{
- return is_a32_compat_task();
+ return is_a32_compat_task() || is_ilp32_compat_task();
}
#endif /* CONFIG_COMPAT */
static inline int is_compat_thread(struct thread_info *thread)
{
- return is_a32_compat_thread(thread);
+ return is_a32_compat_thread(thread) || is_ilp32_compat_thread(thread);
}
diff --git a/arch/arm64/include/asm/thread_info.h b/arch/arm64/include/asm/thread_info.h
index a7ffea24d94d..abb60b5fc9f4 100644
--- a/arch/arm64/include/asm/thread_info.h
+++ b/arch/arm64/include/asm/thread_info.h
@@ -96,6 +96,7 @@ struct thread_info {
#define TIF_RESTORE_SIGMASK 20
#define TIF_SINGLESTEP 21
#define TIF_32BIT 22 /* AARCH32 process */
+#define TIF_32BIT_AARCH64 23 /* 32 bit process on AArch64(ILP32) */
#define _TIF_SIGPENDING (1 << TIF_SIGPENDING)
#define _TIF_NEED_RESCHED (1 << TIF_NEED_RESCHED)
@@ -108,6 +109,7 @@ struct thread_info {
#define _TIF_SECCOMP (1 << TIF_SECCOMP)
#define _TIF_UPROBE (1 << TIF_UPROBE)
#define _TIF_32BIT (1 << TIF_32BIT)
+#define _TIF_32BIT_AARCH64 (1 << TIF_32BIT_AARCH64)
#define _TIF_WORK_MASK (_TIF_NEED_RESCHED | _TIF_SIGPENDING | \
_TIF_NOTIFY_RESUME | _TIF_FOREIGN_FPSTATE | \
--
2.11.0
^ permalink raw reply related [flat|nested] 37+ messages in thread* [PATCH 11/20] arm64: introduce binfmt_elf32.c
2017-06-19 15:49 [PATCH v8 00/20] ILP32 for ARM64 Yury Norov
` (8 preceding siblings ...)
2017-06-19 15:49 ` [PATCH 10/20] arm64: ilp32: add is_ilp32_compat_{task, thread} and TIF_32BIT_AARCH64 Yury Norov
@ 2017-06-19 15:49 ` Yury Norov
2017-06-19 15:49 ` [PATCH 12/20] arm64: ilp32: introduce binfmt_ilp32.c Yury Norov
` (12 subsequent siblings)
22 siblings, 0 replies; 37+ messages in thread
From: Yury Norov @ 2017-06-19 15:49 UTC (permalink / raw)
To: linux-arm-kernel
As we support more than one compat formats, it looks more reasonable
to not use fs/compat_binfmt.c. Custom binfmt_elf32.c allows to move aarch32
specific definitions there and make code more maintainable and readable.
Signed-off-by: Yury Norov <ynorov@caviumnetworks.com>
---
arch/arm64/Kconfig | 1 -
arch/arm64/include/asm/elf.h | 30 +++---------------------------
arch/arm64/include/asm/hwcap.h | 2 --
arch/arm64/kernel/Makefile | 2 +-
arch/arm64/kernel/binfmt_elf32.c | 37 +++++++++++++++++++++++++++++++++++++
5 files changed, 41 insertions(+), 31 deletions(-)
create mode 100644 arch/arm64/kernel/binfmt_elf32.c
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index 8713a2807582..168ab2cc426b 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -1085,7 +1085,6 @@ config AARCH32_EL0
bool "Kernel support for 32-bit EL0"
def_bool y
depends on ARM64_4K_PAGES || EXPERT
- select COMPAT_BINFMT_ELF if BINFMT_ELF
select HAVE_UID16
select OLD_SIGSUSPEND3
select COMPAT_OLD_SIGACTION
diff --git a/arch/arm64/include/asm/elf.h b/arch/arm64/include/asm/elf.h
index 8f7bafa60d01..2a727658f51c 100644
--- a/arch/arm64/include/asm/elf.h
+++ b/arch/arm64/include/asm/elf.h
@@ -174,39 +174,15 @@ extern int arch_setup_additional_pages(struct linux_binprm *bprm,
#endif
#ifdef CONFIG_COMPAT
-
#define COMPAT_ELF_ET_DYN_BASE (2 * TASK_SIZE_32 / 3)
+#endif /* CONFIG_COMPAT */
+#ifdef CONFIG_AARCH32_EL0
/* AArch32 registers. */
#define COMPAT_ELF_NGREG 18
typedef unsigned int compat_elf_greg_t;
typedef compat_elf_greg_t compat_elf_gregset_t[COMPAT_ELF_NGREG];
-
-/* AArch32 EABI. */
-#define EF_ARM_EABI_MASK 0xff000000
-#define compat_elf_check_arch(x) (system_supports_32bit_el0() && \
- ((x)->e_machine == EM_ARM) && \
- ((x)->e_flags & EF_ARM_EABI_MASK))
-
-#define compat_start_thread compat_start_thread
-/*
- * Unlike the native SET_PERSONALITY macro, the compat version inherits
- * READ_IMPLIES_EXEC across a fork() since this is the behaviour on
- * arch/arm/.
- */
-#define COMPAT_SET_PERSONALITY(ex) \
-({ \
- set_bit(TIF_32BIT, ¤t->mm->context.flags); \
- clear_thread_flag(TIF_32BIT_AARCH64); \
- set_thread_flag(TIF_32BIT); \
- })
-#define COMPAT_ARCH_DLINFO
-extern int aarch32_setup_vectors_page(struct linux_binprm *bprm,
- int uses_interp);
-#define compat_arch_setup_additional_pages \
- aarch32_setup_vectors_page
-
-#endif /* CONFIG_COMPAT */
+#endif /* CONFIG_AARCH32_EL0 */
#endif /* !__ASSEMBLY__ */
diff --git a/arch/arm64/include/asm/hwcap.h b/arch/arm64/include/asm/hwcap.h
index 2c7fc5d89813..99dfd9277559 100644
--- a/arch/arm64/include/asm/hwcap.h
+++ b/arch/arm64/include/asm/hwcap.h
@@ -47,8 +47,6 @@
#define ELF_HWCAP (elf_hwcap)
#ifdef CONFIG_AARCH32_EL0
-#define COMPAT_ELF_HWCAP (compat_elf_hwcap)
-#define COMPAT_ELF_HWCAP2 (compat_elf_hwcap2)
extern unsigned int compat_elf_hwcap, compat_elf_hwcap2;
#endif
diff --git a/arch/arm64/kernel/Makefile b/arch/arm64/kernel/Makefile
index 49fefa42d136..de6c84702d83 100644
--- a/arch/arm64/kernel/Makefile
+++ b/arch/arm64/kernel/Makefile
@@ -28,7 +28,7 @@ $(obj)/%.stub.o: $(obj)/%.o FORCE
$(call if_changed,objcopy)
arm64-obj-$(CONFIG_AARCH32_EL0) += sys32.o kuser32.o signal32.o \
- sys_compat.o entry32.o
+ sys_compat.o entry32.o binfmt_elf32.o
arm64-obj-$(CONFIG_FUNCTION_TRACER) += ftrace.o entry-ftrace.o
arm64-obj-$(CONFIG_MODULES) += arm64ksyms.o module.o
arm64-obj-$(CONFIG_ARM64_MODULE_PLTS) += module-plts.o
diff --git a/arch/arm64/kernel/binfmt_elf32.c b/arch/arm64/kernel/binfmt_elf32.c
new file mode 100644
index 000000000000..ff1f192a738a
--- /dev/null
+++ b/arch/arm64/kernel/binfmt_elf32.c
@@ -0,0 +1,37 @@
+/*
+ * Support for AArch32 Linux ELF binaries.
+ */
+
+/* AArch32 EABI. */
+#define EF_ARM_EABI_MASK 0xff000000
+
+#define compat_start_thread compat_start_thread
+/*
+ * Unlike the native SET_PERSONALITY macro, the compat version inherits
+ * READ_IMPLIES_EXEC across a fork() since this is the behaviour on
+ * arch/arm/.
+ */
+#define COMPAT_SET_PERSONALITY(ex) \
+({ \
+ set_bit(TIF_32BIT, ¤t->mm->context.flags); \
+ clear_thread_flag(TIF_32BIT_AARCH64); \
+ set_thread_flag(TIF_32BIT); \
+ })
+
+#define COMPAT_ARCH_DLINFO
+#define COMPAT_ELF_HWCAP (compat_elf_hwcap)
+#define COMPAT_ELF_HWCAP2 (compat_elf_hwcap2)
+
+#define compat_arch_setup_additional_pages \
+ aarch32_setup_vectors_page
+struct linux_binprm;
+extern int aarch32_setup_vectors_page(struct linux_binprm *bprm,
+ int uses_interp);
+
+/* AArch32 EABI. */
+#define compat_elf_check_arch(x) (system_supports_32bit_el0() && \
+ ((x)->e_machine == EM_ARM) && \
+ ((x)->e_flags & EF_ARM_EABI_MASK))
+
+
+#include "../../../fs/compat_binfmt_elf.c"
--
2.11.0
^ permalink raw reply related [flat|nested] 37+ messages in thread* [PATCH 12/20] arm64: ilp32: introduce binfmt_ilp32.c
2017-06-19 15:49 [PATCH v8 00/20] ILP32 for ARM64 Yury Norov
` (9 preceding siblings ...)
2017-06-19 15:49 ` [PATCH 11/20] arm64: introduce binfmt_elf32.c Yury Norov
@ 2017-06-19 15:49 ` Yury Norov
2017-06-19 15:49 ` [PATCH 13/20] arm64: ilp32: share aarch32 syscall handlers Yury Norov
` (11 subsequent siblings)
22 siblings, 0 replies; 37+ messages in thread
From: Yury Norov @ 2017-06-19 15:49 UTC (permalink / raw)
To: linux-arm-kernel
Like binfmt_elf32.c, binfmt_ilp32.c is needed to handle ILP32 binaries.
Signed-off-by: Yury Norov <ynorov@caviumnetworks.com>
Signed-off-by: Bamvor Jian Zhang <bamvor.zhangjian@linaro.org>
---
arch/arm64/kernel/Makefile | 1 +
arch/arm64/kernel/binfmt_ilp32.c | 85 ++++++++++++++++++++++++++++++++++++++++
2 files changed, 86 insertions(+)
create mode 100644 arch/arm64/kernel/binfmt_ilp32.c
diff --git a/arch/arm64/kernel/Makefile b/arch/arm64/kernel/Makefile
index de6c84702d83..41d9a3ab07a7 100644
--- a/arch/arm64/kernel/Makefile
+++ b/arch/arm64/kernel/Makefile
@@ -29,6 +29,7 @@ $(obj)/%.stub.o: $(obj)/%.o FORCE
arm64-obj-$(CONFIG_AARCH32_EL0) += sys32.o kuser32.o signal32.o \
sys_compat.o entry32.o binfmt_elf32.o
+arm64-obj-$(CONFIG_ARM64_ILP32) += binfmt_ilp32.o
arm64-obj-$(CONFIG_FUNCTION_TRACER) += ftrace.o entry-ftrace.o
arm64-obj-$(CONFIG_MODULES) += arm64ksyms.o module.o
arm64-obj-$(CONFIG_ARM64_MODULE_PLTS) += module-plts.o
diff --git a/arch/arm64/kernel/binfmt_ilp32.c b/arch/arm64/kernel/binfmt_ilp32.c
new file mode 100644
index 000000000000..bb31325e6f80
--- /dev/null
+++ b/arch/arm64/kernel/binfmt_ilp32.c
@@ -0,0 +1,85 @@
+/*
+ * Support for ILP32 Linux/aarch64 ELF binaries.
+ */
+#undef CONFIG_AARCH32_EL0
+#define compat_elf_gregset_t elf_gregset_t
+
+#include <linux/elfcore-compat.h>
+#include <linux/time.h>
+
+#undef ELF_CLASS
+#define ELF_CLASS ELFCLASS32
+
+#undef elfhdr
+#undef elf_phdr
+#undef elf_shdr
+#undef elf_note
+#undef elf_addr_t
+#define elfhdr elf32_hdr
+#define elf_phdr elf32_phdr
+#define elf_shdr elf32_shdr
+#define elf_note elf32_note
+#define elf_addr_t Elf32_Addr
+
+/*
+ * Some data types as stored in coredump.
+ */
+#define user_long_t compat_long_t
+#define user_siginfo_t compat_siginfo_t
+#define copy_siginfo_to_user copy_siginfo_to_user32
+
+/*
+ * The machine-dependent core note format types are defined in elfcore-compat.h,
+ * which requires asm/elf.h to define compat_elf_gregset_t et al.
+ */
+#define elf_prstatus compat_elf_prstatus
+#define elf_prpsinfo compat_elf_prpsinfo
+
+/* AARCH64 ILP32 EABI. */
+#undef elf_check_arch
+#define elf_check_arch(x) (((x)->e_machine == EM_AARCH64) \
+ && (x)->e_ident[EI_CLASS] == ELFCLASS32)
+
+#undef SET_PERSONALITY
+#define SET_PERSONALITY(ex) \
+do { \
+ set_bit(TIF_32BIT, ¤t->mm->context.flags); \
+ set_thread_flag(TIF_32BIT_AARCH64); \
+ clear_thread_flag(TIF_32BIT); \
+} while (0)
+
+#undef ARCH_DLINFO
+#define ARCH_DLINFO \
+do { \
+ NEW_AUX_ENT(AT_SYSINFO_EHDR, \
+ (elf_addr_t)(long)current->mm->context.vdso); \
+} while (0)
+
+#undef ELF_PLATFORM
+#ifdef __AARCH64EB__
+#define ELF_PLATFORM ("aarch64_be:ilp32")
+#else
+#define ELF_PLATFORM ("aarch64:ilp32")
+#endif
+
+#undef ELF_ET_DYN_BASE
+#define ELF_ET_DYN_BASE COMPAT_ELF_ET_DYN_BASE
+
+#undef ELF_HWCAP
+#undef ELF_HWCAP2
+#define ELF_HWCAP ((u32) elf_hwcap)
+#define ELF_HWCAP2 ((u32) (elf_hwcap >> 32))
+
+/*
+ * Rename a few of the symbols that binfmt_elf.c will define.
+ * These are all local so the names don't really matter, but it
+ * might make some debugging less confusing not to duplicate them.
+ */
+#define elf_format compat_elf_format
+#define init_elf_binfmt init_compat_elf_binfmt
+#define exit_elf_binfmt exit_compat_elf_binfmt
+
+#undef ns_to_timeval
+#define ns_to_timeval ns_to_compat_timeval
+
+#include "../../../fs/binfmt_elf.c"
--
2.11.0
^ permalink raw reply related [flat|nested] 37+ messages in thread* [PATCH 13/20] arm64: ilp32: share aarch32 syscall handlers
2017-06-19 15:49 [PATCH v8 00/20] ILP32 for ARM64 Yury Norov
` (10 preceding siblings ...)
2017-06-19 15:49 ` [PATCH 12/20] arm64: ilp32: introduce binfmt_ilp32.c Yury Norov
@ 2017-06-19 15:49 ` Yury Norov
2017-06-19 15:49 ` [PATCH 14/20] arm64: ilp32: add sys_ilp32.c and a separate table (in entry.S) to use it Yury Norov
` (10 subsequent siblings)
22 siblings, 0 replies; 37+ messages in thread
From: Yury Norov @ 2017-06-19 15:49 UTC (permalink / raw)
To: linux-arm-kernel
According to userspace/kernel ABI, userspace off_t is passed in register pair
just like in aarch32. In this patch corresponding aarch32 handlers
are shared to ilp32 code.
Signed-off-by: Yury Norov <ynorov@caviumnetworks.com>
---
arch/arm64/kernel/Makefile | 1 +
arch/arm64/kernel/entry32.S | 80 ---------------------------
arch/arm64/kernel/entry32_common.S | 107 +++++++++++++++++++++++++++++++++++++
3 files changed, 108 insertions(+), 80 deletions(-)
create mode 100644 arch/arm64/kernel/entry32_common.S
diff --git a/arch/arm64/kernel/Makefile b/arch/arm64/kernel/Makefile
index 41d9a3ab07a7..7243ffe358b4 100644
--- a/arch/arm64/kernel/Makefile
+++ b/arch/arm64/kernel/Makefile
@@ -30,6 +30,7 @@ $(obj)/%.stub.o: $(obj)/%.o FORCE
arm64-obj-$(CONFIG_AARCH32_EL0) += sys32.o kuser32.o signal32.o \
sys_compat.o entry32.o binfmt_elf32.o
arm64-obj-$(CONFIG_ARM64_ILP32) += binfmt_ilp32.o
+arm64-obj-$(CONFIG_COMPAT) += entry32_common.o
arm64-obj-$(CONFIG_FUNCTION_TRACER) += ftrace.o entry-ftrace.o
arm64-obj-$(CONFIG_MODULES) += arm64ksyms.o module.o
arm64-obj-$(CONFIG_ARM64_MODULE_PLTS) += module-plts.o
diff --git a/arch/arm64/kernel/entry32.S b/arch/arm64/kernel/entry32.S
index f332d5d1f6b4..4bede0324440 100644
--- a/arch/arm64/kernel/entry32.S
+++ b/arch/arm64/kernel/entry32.S
@@ -39,83 +39,3 @@ ENTRY(compat_sys_rt_sigreturn_wrapper)
mov x0, sp
b compat_sys_rt_sigreturn
ENDPROC(compat_sys_rt_sigreturn_wrapper)
-
-ENTRY(compat_sys_statfs64_wrapper)
- mov w3, #84
- cmp w1, #88
- csel w1, w3, w1, eq
- b compat_sys_statfs64
-ENDPROC(compat_sys_statfs64_wrapper)
-
-ENTRY(compat_sys_fstatfs64_wrapper)
- mov w3, #84
- cmp w1, #88
- csel w1, w3, w1, eq
- b compat_sys_fstatfs64
-ENDPROC(compat_sys_fstatfs64_wrapper)
-
-/*
- * Note: off_4k (w5) is always in units of 4K. If we can't do the
- * requested offset because it is not page-aligned, we return -EINVAL.
- */
-ENTRY(compat_sys_mmap2_wrapper)
-#if PAGE_SHIFT > 12
- tst w5, #~PAGE_MASK >> 12
- b.ne 1f
- lsr w5, w5, #PAGE_SHIFT - 12
-#endif
- b sys_mmap_pgoff
-1: mov x0, #-EINVAL
- ret
-ENDPROC(compat_sys_mmap2_wrapper)
-
-/*
- * Wrappers for AArch32 syscalls that either take 64-bit parameters
- * in registers or that take 32-bit parameters which require sign
- * extension.
- */
-ENTRY(compat_sys_pread64_wrapper)
- regs_to_64 x3, x4, x5
- b sys_pread64
-ENDPROC(compat_sys_pread64_wrapper)
-
-ENTRY(compat_sys_pwrite64_wrapper)
- regs_to_64 x3, x4, x5
- b sys_pwrite64
-ENDPROC(compat_sys_pwrite64_wrapper)
-
-ENTRY(compat_sys_truncate64_wrapper)
- regs_to_64 x1, x2, x3
- b sys_truncate
-ENDPROC(compat_sys_truncate64_wrapper)
-
-ENTRY(compat_sys_ftruncate64_wrapper)
- regs_to_64 x1, x2, x3
- b sys_ftruncate
-ENDPROC(compat_sys_ftruncate64_wrapper)
-
-ENTRY(compat_sys_readahead_wrapper)
- regs_to_64 x1, x2, x3
- mov w2, w4
- b sys_readahead
-ENDPROC(compat_sys_readahead_wrapper)
-
-ENTRY(compat_sys_fadvise64_64_wrapper)
- mov w6, w1
- regs_to_64 x1, x2, x3
- regs_to_64 x2, x4, x5
- mov w3, w6
- b sys_fadvise64_64
-ENDPROC(compat_sys_fadvise64_64_wrapper)
-
-ENTRY(compat_sys_sync_file_range2_wrapper)
- regs_to_64 x2, x2, x3
- regs_to_64 x3, x4, x5
- b sys_sync_file_range2
-ENDPROC(compat_sys_sync_file_range2_wrapper)
-
-ENTRY(compat_sys_fallocate_wrapper)
- regs_to_64 x2, x2, x3
- regs_to_64 x3, x4, x5
- b sys_fallocate
-ENDPROC(compat_sys_fallocate_wrapper)
diff --git a/arch/arm64/kernel/entry32_common.S b/arch/arm64/kernel/entry32_common.S
new file mode 100644
index 000000000000..f4a5e4de6201
--- /dev/null
+++ b/arch/arm64/kernel/entry32_common.S
@@ -0,0 +1,107 @@
+/*
+ * Compat system call wrappers
+ *
+ * Copyright (C) 2012 ARM Ltd.
+ * Authors: Will Deacon <will.deacon@arm.com>
+ * Catalin Marinas <catalin.marinas@arm.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/linkage.h>
+#include <linux/const.h>
+
+#include <asm/assembler.h>
+#include <asm/asm-offsets.h>
+#include <asm/errno.h>
+#include <asm/page.h>
+
+/*
+ * Note: off_4k (w5) is always in units of 4K. If we can't do the
+ * requested offset because it is not page-aligned, we return -EINVAL.
+ */
+ENTRY(compat_sys_mmap2_wrapper)
+#if PAGE_SHIFT > 12
+ tst w5, #~PAGE_MASK >> 12
+ b.ne 1f
+ lsr w5, w5, #PAGE_SHIFT - 12
+#endif
+ b sys_mmap_pgoff
+1: mov x0, #-EINVAL
+ ret
+ENDPROC(compat_sys_mmap2_wrapper)
+
+/*
+ * Wrappers for AArch32 syscalls that either take 64-bit parameters
+ * in registers or that take 32-bit parameters which require sign
+ * extension.
+ */
+ENTRY(compat_sys_pread64_wrapper)
+ regs_to_64 x3, x4, x5
+ b sys_pread64
+ENDPROC(compat_sys_pread64_wrapper)
+
+ENTRY(compat_sys_pwrite64_wrapper)
+ regs_to_64 x3, x4, x5
+ b sys_pwrite64
+ENDPROC(compat_sys_pwrite64_wrapper)
+
+ENTRY(compat_sys_truncate64_wrapper)
+ regs_to_64 x1, x2, x3
+ b sys_truncate
+ENDPROC(compat_sys_truncate64_wrapper)
+
+ENTRY(compat_sys_ftruncate64_wrapper)
+ regs_to_64 x1, x2, x3
+ b sys_ftruncate
+ENDPROC(compat_sys_ftruncate64_wrapper)
+
+ENTRY(compat_sys_readahead_wrapper)
+ regs_to_64 x1, x2, x3
+ mov w2, w4
+ b sys_readahead
+ENDPROC(compat_sys_readahead_wrapper)
+
+ENTRY(compat_sys_fadvise64_64_wrapper)
+ mov w6, w1
+ regs_to_64 x1, x2, x3
+ regs_to_64 x2, x4, x5
+ mov w3, w6
+ b sys_fadvise64_64
+ENDPROC(compat_sys_fadvise64_64_wrapper)
+
+ENTRY(compat_sys_sync_file_range2_wrapper)
+ regs_to_64 x2, x2, x3
+ regs_to_64 x3, x4, x5
+ b sys_sync_file_range2
+ENDPROC(compat_sys_sync_file_range2_wrapper)
+
+ENTRY(compat_sys_fallocate_wrapper)
+ regs_to_64 x2, x2, x3
+ regs_to_64 x3, x4, x5
+ b sys_fallocate
+ENDPROC(compat_sys_fallocate_wrapper)
+
+ENTRY(compat_sys_statfs64_wrapper)
+ mov w3, #84
+ cmp w1, #88
+ csel w1, w3, w1, eq
+ b compat_sys_statfs64
+ENDPROC(compat_sys_statfs64_wrapper)
+
+ENTRY(compat_sys_fstatfs64_wrapper)
+ mov w3, #84
+ cmp w1, #88
+ csel w1, w3, w1, eq
+ b compat_sys_fstatfs64
+ENDPROC(compat_sys_fstatfs64_wrapper)
--
2.11.0
^ permalink raw reply related [flat|nested] 37+ messages in thread* [PATCH 14/20] arm64: ilp32: add sys_ilp32.c and a separate table (in entry.S) to use it
2017-06-19 15:49 [PATCH v8 00/20] ILP32 for ARM64 Yury Norov
` (11 preceding siblings ...)
2017-06-19 15:49 ` [PATCH 13/20] arm64: ilp32: share aarch32 syscall handlers Yury Norov
@ 2017-06-19 15:49 ` Yury Norov
2017-06-19 15:49 ` [PATCH 15/20] arm64: signal: share lp64 signal routines to ilp32 Yury Norov
` (9 subsequent siblings)
22 siblings, 0 replies; 37+ messages in thread
From: Yury Norov @ 2017-06-19 15:49 UTC (permalink / raw)
To: linux-arm-kernel
From: Andrew Pinski <apinski@cavium.com>
Add a separate syscall-table for ILP32, which dispatches either to native
LP64 system call implementation or to compat-syscalls, as appropriate.
Signed-off-by: Andrew Pinski <Andrew.Pinski@caviumnetworks.com>
Signed-off-by: Yury Norov <ynorov@caviumnetworks.com>
Signed-off-by: Bamvor Jian Zhang <bamvor.zhangjian@linaro.org>
---
arch/arm64/include/asm/unistd.h | 8 ++-
arch/arm64/include/uapi/asm/unistd.h | 12 +++++
arch/arm64/kernel/Makefile | 2 +-
arch/arm64/kernel/entry.S | 28 +++++++++-
arch/arm64/kernel/sys_ilp32.c | 100 +++++++++++++++++++++++++++++++++++
5 files changed, 145 insertions(+), 5 deletions(-)
create mode 100644 arch/arm64/kernel/sys_ilp32.c
diff --git a/arch/arm64/include/asm/unistd.h b/arch/arm64/include/asm/unistd.h
index 99d29290c98b..1bf5572cd078 100644
--- a/arch/arm64/include/asm/unistd.h
+++ b/arch/arm64/include/asm/unistd.h
@@ -13,12 +13,16 @@
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
-#ifdef CONFIG_AARCH32_EL0
+
+#ifdef CONFIG_COMPAT
#define __ARCH_WANT_COMPAT_STAT64
+#define __ARCH_WANT_SYS_LLSEEK
+#endif
+
+#ifdef CONFIG_AARCH32_EL0
#define __ARCH_WANT_SYS_GETHOSTNAME
#define __ARCH_WANT_SYS_PAUSE
#define __ARCH_WANT_SYS_GETPGRP
-#define __ARCH_WANT_SYS_LLSEEK
#define __ARCH_WANT_SYS_NICE
#define __ARCH_WANT_SYS_SIGPENDING
#define __ARCH_WANT_SYS_SIGPROCMASK
diff --git a/arch/arm64/include/uapi/asm/unistd.h b/arch/arm64/include/uapi/asm/unistd.h
index 48355a683e25..e7106bb45095 100644
--- a/arch/arm64/include/uapi/asm/unistd.h
+++ b/arch/arm64/include/uapi/asm/unistd.h
@@ -14,7 +14,19 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
+/*
+ * Use AARCH32 interface for sys_sync_file_range() as it passes 64-bit arguments.
+ */
+#if defined(__ILP32__) || defined(__SYSCALL_COMPAT)
+#define __ARCH_WANT_SYNC_FILE_RANGE2
+#endif
+
+/*
+ * AARCH64/ILP32 is introduced after next syscalls were deprecated.
+ */
+#if !(defined(__ILP32__) || defined(__SYSCALL_COMPAT))
#define __ARCH_WANT_RENAMEAT
#define __ARCH_WANT_SET_GET_RLIMIT
+#endif
#include <asm-generic/unistd.h>
diff --git a/arch/arm64/kernel/Makefile b/arch/arm64/kernel/Makefile
index 7243ffe358b4..c329a4e28a92 100644
--- a/arch/arm64/kernel/Makefile
+++ b/arch/arm64/kernel/Makefile
@@ -29,7 +29,7 @@ $(obj)/%.stub.o: $(obj)/%.o FORCE
arm64-obj-$(CONFIG_AARCH32_EL0) += sys32.o kuser32.o signal32.o \
sys_compat.o entry32.o binfmt_elf32.o
-arm64-obj-$(CONFIG_ARM64_ILP32) += binfmt_ilp32.o
+arm64-obj-$(CONFIG_ARM64_ILP32) += binfmt_ilp32.o sys_ilp32.o
arm64-obj-$(CONFIG_COMPAT) += entry32_common.o
arm64-obj-$(CONFIG_FUNCTION_TRACER) += ftrace.o entry-ftrace.o
arm64-obj-$(CONFIG_MODULES) += arm64ksyms.o module.o
diff --git a/arch/arm64/kernel/entry.S b/arch/arm64/kernel/entry.S
index 279bc2ab10c3..3723a20ab503 100644
--- a/arch/arm64/kernel/entry.S
+++ b/arch/arm64/kernel/entry.S
@@ -308,6 +308,23 @@ tsk .req x28 // current thread_info
.text
+#ifdef CONFIG_ARM64_ILP32
+/*
+ * AARCH64/ILP32. Zero top halves of x0-x7
+ * registers as userspace may put garbage there.
+ */
+ .macro delouse_input_regs
+ mov w0, w0
+ mov w1, w1
+ mov w2, w2
+ mov w3, w3
+ mov w4, w4
+ mov w5, w5
+ mov w6, w6
+ mov w7, w7
+ .endm
+#endif
+
/*
* Exception vectors.
*/
@@ -577,6 +594,7 @@ el0_svc_compat:
* AArch32 syscall handling
*/
adrp stbl, compat_sys_call_table // load compat syscall table pointer
+ ldr x19, [tsk, #TSK_TI_FLAGS]
uxtw scno, w7 // syscall number in w7 (r7)
mov sc_nr, #__NR_compat_syscalls
b el0_svc_naked
@@ -798,15 +816,21 @@ ENDPROC(ret_from_fork)
.align 6
el0_svc:
adrp stbl, sys_call_table // load syscall table pointer
+ ldr x19, [tsk, #TSK_TI_FLAGS]
uxtw scno, w8 // syscall number in w8
mov sc_nr, #__NR_syscalls
+#ifdef CONFIG_ARM64_ILP32
+ tst x19, #_TIF_32BIT_AARCH64
+ b.eq el0_svc_naked // We are using LP64 syscall table
+ adrp stbl, sys_call_ilp32_table // load ilp32 syscall table pointer
+ delouse_input_regs
+#endif
el0_svc_naked: // compat entry point
stp x0, scno, [sp, #S_ORIG_X0] // save the original x0 and syscall number
enable_dbg_and_irq
ct_user_exit 1
- ldr x16, [tsk, #TSK_TI_FLAGS] // check for syscall hooks
- tst x16, #_TIF_SYSCALL_WORK
+ tst x19, #_TIF_SYSCALL_WORK // check for syscall hooks
b.ne __sys_trace
cmp scno, sc_nr // check upper syscall limit
b.hs ni_sys
diff --git a/arch/arm64/kernel/sys_ilp32.c b/arch/arm64/kernel/sys_ilp32.c
new file mode 100644
index 000000000000..d203dec7011b
--- /dev/null
+++ b/arch/arm64/kernel/sys_ilp32.c
@@ -0,0 +1,100 @@
+/*
+ * AArch64- ILP32 specific system calls implementation
+ *
+ * Copyright (C) 2017 Cavium Inc.
+ * Author: Andrew Pinski <apinski@cavium.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#define __SYSCALL_COMPAT
+
+#include <linux/compiler.h>
+#include <linux/errno.h>
+#include <linux/fs.h>
+#include <linux/mm.h>
+#include <linux/msg.h>
+#include <linux/export.h>
+#include <linux/sched.h>
+#include <linux/slab.h>
+#include <linux/syscalls.h>
+#include <linux/compat.h>
+#include <asm-generic/syscalls.h>
+
+/*
+ * AARCH32 requires 4-page alignement for shared memory,
+ * but AARCH64 - only 1 page. This is the only difference
+ * between compat and native sys_shmat(). So ILP32 just pick
+ * AARCH64 version.
+ */
+#define compat_sys_shmat sys_shmat
+
+/*
+ * ILP32 needs special handling for some ptrace requests.
+ */
+#define sys_ptrace compat_sys_ptrace
+
+/*
+ * Using AARCH32 interface for syscalls that take 64-bit
+ * parameters in registers.
+ */
+#define compat_sys_fadvise64_64 compat_sys_fadvise64_64_wrapper
+#define compat_sys_fallocate compat_sys_fallocate_wrapper
+#define compat_sys_ftruncate64 compat_sys_ftruncate64_wrapper
+#define compat_sys_pread64 compat_sys_pread64_wrapper
+#define compat_sys_pwrite64 compat_sys_pwrite64_wrapper
+#define compat_sys_readahead compat_sys_readahead_wrapper
+#define compat_sys_sync_file_range2 compat_sys_sync_file_range2_wrapper
+#define compat_sys_truncate64 compat_sys_truncate64_wrapper
+#define sys_mmap2 compat_sys_mmap2_wrapper
+
+/*
+ * Using AARCH32 interface for syscalls that take the size of
+ * struct statfs as an argument, as it's calculated differently
+ * in kernel and user spaces.
+ */
+#define compat_sys_fstatfs64 compat_sys_fstatfs64_wrapper
+#define compat_sys_statfs64 compat_sys_statfs64_wrapper
+
+/*
+ * Using custom wrapper for rt_sigreturn() to handle custom
+ * struct rt_sigframe.
+ */
+#define compat_sys_rt_sigreturn ilp32_sys_rt_sigreturn_wrapper
+
+asmlinkage long compat_sys_fstatfs64_wrapper(void);
+asmlinkage long compat_sys_statfs64_wrapper(void);
+asmlinkage long compat_sys_fadvise64_64_wrapper(void);
+asmlinkage long compat_sys_fallocate_wrapper(void);
+asmlinkage long compat_sys_ftruncate64_wrapper(void);
+asmlinkage long compat_sys_mmap2_wrapper(void);
+asmlinkage long compat_sys_pread64_wrapper(void);
+asmlinkage long compat_sys_pwrite64_wrapper(void);
+asmlinkage long compat_sys_readahead_wrapper(void);
+asmlinkage long compat_sys_sync_file_range2_wrapper(void);
+asmlinkage long compat_sys_truncate64_wrapper(void);
+asmlinkage long ilp32_sys_rt_sigreturn_wrapper(void);
+
+#include <asm/syscall.h>
+
+#undef __SYSCALL
+#define __SYSCALL(nr, sym) [nr] = sym,
+
+/*
+ * The sys_call_ilp32_table array must be 4K aligned to be accessible from
+ * kernel/entry.S.
+ */
+void *sys_call_ilp32_table[__NR_syscalls] __aligned(4096) = {
+ [0 ... __NR_syscalls - 1] = sys_ni_syscall,
+#include <asm/unistd.h>
+};
--
2.11.0
^ permalink raw reply related [flat|nested] 37+ messages in thread* [PATCH 15/20] arm64: signal: share lp64 signal routines to ilp32
2017-06-19 15:49 [PATCH v8 00/20] ILP32 for ARM64 Yury Norov
` (12 preceding siblings ...)
2017-06-19 15:49 ` [PATCH 14/20] arm64: ilp32: add sys_ilp32.c and a separate table (in entry.S) to use it Yury Norov
@ 2017-06-19 15:49 ` Yury Norov
2017-06-19 15:49 ` [PATCH 16/20] arm64: signal32: move ilp32 and aarch32 common code to separated file Yury Norov
` (8 subsequent siblings)
22 siblings, 0 replies; 37+ messages in thread
From: Yury Norov @ 2017-06-19 15:49 UTC (permalink / raw)
To: linux-arm-kernel
After that, it will be possible to reuse it in ilp32.
Signed-off-by: Yury Norov <ynorov@caviumnetworks.com>
Signed-off-by: Bamvor Jian Zhang <bamvor.zhangjian@linaro.org>
---
arch/arm64/include/asm/signal_common.h | 33 ++++++++++++
arch/arm64/kernel/signal.c | 93 +++++++++++++++++++++-------------
2 files changed, 92 insertions(+), 34 deletions(-)
create mode 100644 arch/arm64/include/asm/signal_common.h
diff --git a/arch/arm64/include/asm/signal_common.h b/arch/arm64/include/asm/signal_common.h
new file mode 100644
index 000000000000..f68238160940
--- /dev/null
+++ b/arch/arm64/include/asm/signal_common.h
@@ -0,0 +1,33 @@
+/*
+ * Copyright (C) 1995-2009 Russell King
+ * Copyright (C) 2012 ARM Ltd.
+ * Copyright (C) 2017 Cavium Networks.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef __ASM_SIGNAL_COMMON_H
+#define __ASM_SIGNAL_COMMON_H
+
+#include <linux/uaccess.h>
+#include <asm/ucontext.h>
+#include <asm/fpsimd.h>
+
+int preserve_fpsimd_context(struct fpsimd_context __user *ctx);
+int restore_fpsimd_context(struct fpsimd_context __user *ctx);
+int setup_sigcontext(struct sigcontext __user *uc_mcontext, struct pt_regs *regs);
+int restore_sigcontext(struct pt_regs *regs, struct sigcontext __user *sf);
+void setup_return(struct pt_regs *regs, struct k_sigaction *ka,
+ void __user *frame, off_t sigframe_off, int usig);
+
+#endif /* __ASM_SIGNAL_COMMON_H */
diff --git a/arch/arm64/kernel/signal.c b/arch/arm64/kernel/signal.c
index 5fa1b401c5d6..9f2ea60b9fac 100644
--- a/arch/arm64/kernel/signal.c
+++ b/arch/arm64/kernel/signal.c
@@ -34,18 +34,26 @@
#include <asm/fpsimd.h>
#include <asm/signal32.h>
#include <asm/vdso.h>
+#include <asm/signal_common.h>
+
+#define RT_SIGFRAME_FP_POS (offsetof(struct rt_sigframe, sig) \
+ + offsetof(struct sigframe, fp))
+
+struct sigframe {
+ struct ucontext uc;
+ u64 fp;
+ u64 lr;
+};
/*
* Do a signal return; undo the signal stack. These are aligned to 128-bit.
*/
struct rt_sigframe {
struct siginfo info;
- struct ucontext uc;
- u64 fp;
- u64 lr;
+ struct sigframe sig;
};
-static int preserve_fpsimd_context(struct fpsimd_context __user *ctx)
+int preserve_fpsimd_context(struct fpsimd_context __user *ctx)
{
struct fpsimd_state *fpsimd = ¤t->thread.fpsimd_state;
int err;
@@ -65,7 +73,7 @@ static int preserve_fpsimd_context(struct fpsimd_context __user *ctx)
return err ? -EFAULT : 0;
}
-static int restore_fpsimd_context(struct fpsimd_context __user *ctx)
+int restore_fpsimd_context(struct fpsimd_context __user *ctx)
{
struct fpsimd_state fpsimd;
__u32 magic, size;
@@ -93,22 +101,30 @@ static int restore_fpsimd_context(struct fpsimd_context __user *ctx)
}
static int restore_sigframe(struct pt_regs *regs,
- struct rt_sigframe __user *sf)
+ struct sigframe __user *sf)
{
sigset_t set;
- int i, err;
- void *aux = sf->uc.uc_mcontext.__reserved;
-
+ int err;
err = __copy_from_user(&set, &sf->uc.uc_sigmask, sizeof(set));
if (err == 0)
set_current_blocked(&set);
+ err |= restore_sigcontext(regs, &sf->uc.uc_mcontext);
+ return err;
+}
+
+
+int restore_sigcontext(struct pt_regs *regs, struct sigcontext __user *uc_mcontext)
+{
+ int i, err = 0;
+ void *aux = uc_mcontext->__reserved;
+
for (i = 0; i < 31; i++)
- __get_user_error(regs->regs[i], &sf->uc.uc_mcontext.regs[i],
+ __get_user_error(regs->regs[i], &uc_mcontext->regs[i],
err);
- __get_user_error(regs->sp, &sf->uc.uc_mcontext.sp, err);
- __get_user_error(regs->pc, &sf->uc.uc_mcontext.pc, err);
- __get_user_error(regs->pstate, &sf->uc.uc_mcontext.pstate, err);
+ __get_user_error(regs->sp, &uc_mcontext->sp, err);
+ __get_user_error(regs->pc, &uc_mcontext->pc, err);
+ __get_user_error(regs->pstate, &uc_mcontext->pstate, err);
/*
* Avoid sys_rt_sigreturn() restarting.
@@ -145,10 +161,10 @@ asmlinkage long sys_rt_sigreturn(struct pt_regs *regs)
if (!access_ok(VERIFY_READ, frame, sizeof (*frame)))
goto badframe;
- if (restore_sigframe(regs, frame))
+ if (restore_sigframe(regs, &frame->sig))
goto badframe;
- if (restore_altstack(&frame->uc.uc_stack))
+ if (restore_altstack(&frame->sig.uc.uc_stack))
goto badframe;
return regs->regs[0];
@@ -162,27 +178,36 @@ asmlinkage long sys_rt_sigreturn(struct pt_regs *regs)
return 0;
}
-static int setup_sigframe(struct rt_sigframe __user *sf,
+static int setup_sigframe(struct sigframe __user *sf,
struct pt_regs *regs, sigset_t *set)
{
- int i, err = 0;
- void *aux = sf->uc.uc_mcontext.__reserved;
- struct _aarch64_ctx *end;
+ int err = 0;
/* set up the stack frame for unwinding */
__put_user_error(regs->regs[29], &sf->fp, err);
__put_user_error(regs->regs[30], &sf->lr, err);
+ err |= __copy_to_user(&sf->uc.uc_sigmask, set, sizeof(*set));
+ err |= setup_sigcontext(&sf->uc.uc_mcontext, regs);
+
+ return err;
+}
+
+int setup_sigcontext(struct sigcontext __user *uc_mcontext,
+ struct pt_regs *regs)
+{
+ void *aux = uc_mcontext->__reserved;
+ struct _aarch64_ctx *end;
+ int i, err = 0;
for (i = 0; i < 31; i++)
- __put_user_error(regs->regs[i], &sf->uc.uc_mcontext.regs[i],
+ __put_user_error(regs->regs[i], &uc_mcontext->regs[i],
err);
- __put_user_error(regs->sp, &sf->uc.uc_mcontext.sp, err);
- __put_user_error(regs->pc, &sf->uc.uc_mcontext.pc, err);
- __put_user_error(regs->pstate, &sf->uc.uc_mcontext.pstate, err);
- __put_user_error(current->thread.fault_address, &sf->uc.uc_mcontext.fault_address, err);
+ __put_user_error(regs->sp, &uc_mcontext->sp, err);
+ __put_user_error(regs->pc, &uc_mcontext->pc, err);
+ __put_user_error(regs->pstate, &uc_mcontext->pstate, err);
- err |= __copy_to_user(&sf->uc.uc_sigmask, set, sizeof(*set));
+ __put_user_error(current->thread.fault_address, &uc_mcontext->fault_address, err);
if (err == 0) {
struct fpsimd_context *fpsimd_ctx =
@@ -229,14 +254,14 @@ static struct rt_sigframe __user *get_sigframe(struct ksignal *ksig,
return frame;
}
-static void setup_return(struct pt_regs *regs, struct k_sigaction *ka,
- void __user *frame, int usig)
+void setup_return(struct pt_regs *regs, struct k_sigaction *ka,
+ void __user *frame, off_t fp_pos, int usig)
{
__sigrestore_t sigtramp;
regs->regs[0] = usig;
regs->sp = (unsigned long)frame;
- regs->regs[29] = regs->sp + offsetof(struct rt_sigframe, fp);
+ regs->regs[29] = regs->sp + fp_pos;
regs->pc = (unsigned long)ka->sa.sa_handler;
if (ka->sa.sa_flags & SA_RESTORER)
@@ -257,17 +282,17 @@ static int setup_rt_frame(int usig, struct ksignal *ksig, sigset_t *set,
if (!frame)
return 1;
- __put_user_error(0, &frame->uc.uc_flags, err);
- __put_user_error(NULL, &frame->uc.uc_link, err);
+ __put_user_error(0, &frame->sig.uc.uc_flags, err);
+ __put_user_error(NULL, &frame->sig.uc.uc_link, err);
- err |= __save_altstack(&frame->uc.uc_stack, regs->sp);
- err |= setup_sigframe(frame, regs, set);
+ err |= __save_altstack(&frame->sig.uc.uc_stack, regs->sp);
+ err |= setup_sigframe(&frame->sig, regs, set);
if (err == 0) {
- setup_return(regs, &ksig->ka, frame, usig);
+ setup_return(regs, &ksig->ka, frame, RT_SIGFRAME_FP_POS, usig);
if (ksig->ka.sa.sa_flags & SA_SIGINFO) {
err |= copy_siginfo_to_user(&frame->info, &ksig->info);
regs->regs[1] = (unsigned long)&frame->info;
- regs->regs[2] = (unsigned long)&frame->uc;
+ regs->regs[2] = (unsigned long)&frame->sig.uc;
}
}
--
2.11.0
^ permalink raw reply related [flat|nested] 37+ messages in thread* [PATCH 16/20] arm64: signal32: move ilp32 and aarch32 common code to separated file
2017-06-19 15:49 [PATCH v8 00/20] ILP32 for ARM64 Yury Norov
` (13 preceding siblings ...)
2017-06-19 15:49 ` [PATCH 15/20] arm64: signal: share lp64 signal routines to ilp32 Yury Norov
@ 2017-06-19 15:49 ` Yury Norov
2017-06-19 15:50 ` [PATCH 17/20] arm64: ilp32: introduce ilp32-specific handlers for sigframe and ucontext Yury Norov
` (7 subsequent siblings)
22 siblings, 0 replies; 37+ messages in thread
From: Yury Norov @ 2017-06-19 15:49 UTC (permalink / raw)
To: linux-arm-kernel
Signed-off-by: Yury Norov <ynorov@caviumnetworks.com>
---
arch/arm64/include/asm/signal32.h | 3 +
arch/arm64/include/asm/signal32_common.h | 27 +++++++
arch/arm64/kernel/Makefile | 2 +-
arch/arm64/kernel/signal32.c | 107 ------------------------
arch/arm64/kernel/signal32_common.c | 135 +++++++++++++++++++++++++++++++
5 files changed, 166 insertions(+), 108 deletions(-)
create mode 100644 arch/arm64/include/asm/signal32_common.h
create mode 100644 arch/arm64/kernel/signal32_common.c
diff --git a/arch/arm64/include/asm/signal32.h b/arch/arm64/include/asm/signal32.h
index e68fcce538e1..1c4ede717bd2 100644
--- a/arch/arm64/include/asm/signal32.h
+++ b/arch/arm64/include/asm/signal32.h
@@ -13,6 +13,9 @@
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
+
+#include <asm/signal32_common.h>
+
#ifndef __ASM_SIGNAL32_H
#define __ASM_SIGNAL32_H
diff --git a/arch/arm64/include/asm/signal32_common.h b/arch/arm64/include/asm/signal32_common.h
new file mode 100644
index 000000000000..36c1ebc07a97
--- /dev/null
+++ b/arch/arm64/include/asm/signal32_common.h
@@ -0,0 +1,27 @@
+/*
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+#ifndef __ASM_SIGNAL32_COMMON_H
+#define __ASM_SIGNAL32_COMMON_H
+
+#ifdef CONFIG_COMPAT
+
+int copy_siginfo_to_user32(compat_siginfo_t __user *to, const siginfo_t *from);
+int copy_siginfo_from_user32(siginfo_t *to, compat_siginfo_t __user *from);
+
+int put_sigset_t(compat_sigset_t __user *uset, sigset_t *set);
+int get_sigset_t(sigset_t *set, const compat_sigset_t __user *uset);
+
+#endif /* CONFIG_COMPAT*/
+
+#endif /* __ASM_SIGNAL32_COMMON_H */
diff --git a/arch/arm64/kernel/Makefile b/arch/arm64/kernel/Makefile
index c329a4e28a92..9c7912936049 100644
--- a/arch/arm64/kernel/Makefile
+++ b/arch/arm64/kernel/Makefile
@@ -30,7 +30,7 @@ $(obj)/%.stub.o: $(obj)/%.o FORCE
arm64-obj-$(CONFIG_AARCH32_EL0) += sys32.o kuser32.o signal32.o \
sys_compat.o entry32.o binfmt_elf32.o
arm64-obj-$(CONFIG_ARM64_ILP32) += binfmt_ilp32.o sys_ilp32.o
-arm64-obj-$(CONFIG_COMPAT) += entry32_common.o
+arm64-obj-$(CONFIG_COMPAT) += entry32_common.o signal32_common.o
arm64-obj-$(CONFIG_FUNCTION_TRACER) += ftrace.o entry-ftrace.o
arm64-obj-$(CONFIG_MODULES) += arm64ksyms.o module.o
arm64-obj-$(CONFIG_ARM64_MODULE_PLTS) += module-plts.o
diff --git a/arch/arm64/kernel/signal32.c b/arch/arm64/kernel/signal32.c
index c747a0fc5d7d..181cc3012bda 100644
--- a/arch/arm64/kernel/signal32.c
+++ b/arch/arm64/kernel/signal32.c
@@ -103,113 +103,6 @@ struct compat_rt_sigframe {
#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))
-static inline int put_sigset_t(compat_sigset_t __user *uset, sigset_t *set)
-{
- compat_sigset_t cset;
-
- cset.sig[0] = set->sig[0] & 0xffffffffull;
- cset.sig[1] = set->sig[0] >> 32;
-
- return copy_to_user(uset, &cset, sizeof(*uset));
-}
-
-static inline int get_sigset_t(sigset_t *set,
- const compat_sigset_t __user *uset)
-{
- compat_sigset_t s32;
-
- if (copy_from_user(&s32, uset, sizeof(*uset)))
- return -EFAULT;
-
- set->sig[0] = s32.sig[0] | (((long)s32.sig[1]) << 32);
- return 0;
-}
-
-int copy_siginfo_to_user32(compat_siginfo_t __user *to, const siginfo_t *from)
-{
- int err;
-
- if (!access_ok(VERIFY_WRITE, to, sizeof(*to)))
- return -EFAULT;
-
- /* If you change siginfo_t structure, please be sure
- * this code is fixed accordingly.
- * It should never copy any pad contained in the structure
- * to avoid security leaks, but must copy the generic
- * 3 ints plus the relevant union member.
- * This routine must convert siginfo from 64bit to 32bit as well
- *@the same time.
- */
- err = __put_user(from->si_signo, &to->si_signo);
- err |= __put_user(from->si_errno, &to->si_errno);
- err |= __put_user((short)from->si_code, &to->si_code);
- if (from->si_code < 0)
- err |= __copy_to_user(&to->_sifields._pad, &from->_sifields._pad,
- SI_PAD_SIZE);
- else switch (from->si_code & __SI_MASK) {
- case __SI_KILL:
- err |= __put_user(from->si_pid, &to->si_pid);
- err |= __put_user(from->si_uid, &to->si_uid);
- break;
- case __SI_TIMER:
- err |= __put_user(from->si_tid, &to->si_tid);
- err |= __put_user(from->si_overrun, &to->si_overrun);
- err |= __put_user(from->si_int, &to->si_int);
- break;
- case __SI_POLL:
- err |= __put_user(from->si_band, &to->si_band);
- err |= __put_user(from->si_fd, &to->si_fd);
- break;
- case __SI_FAULT:
- err |= __put_user((compat_uptr_t)(unsigned long)from->si_addr,
- &to->si_addr);
-#ifdef BUS_MCEERR_AO
- /*
- * Other callers might not initialize the si_lsb field,
- * so check explicitly for the right codes here.
- */
- if (from->si_signo == SIGBUS &&
- (from->si_code == BUS_MCEERR_AR || from->si_code == BUS_MCEERR_AO))
- err |= __put_user(from->si_addr_lsb, &to->si_addr_lsb);
-#endif
- break;
- case __SI_CHLD:
- err |= __put_user(from->si_pid, &to->si_pid);
- err |= __put_user(from->si_uid, &to->si_uid);
- err |= __put_user(from->si_status, &to->si_status);
- err |= __put_user(from->si_utime, &to->si_utime);
- err |= __put_user(from->si_stime, &to->si_stime);
- break;
- case __SI_RT: /* This is not generated by the kernel as of now. */
- case __SI_MESGQ: /* But this is */
- err |= __put_user(from->si_pid, &to->si_pid);
- err |= __put_user(from->si_uid, &to->si_uid);
- err |= __put_user(from->si_int, &to->si_int);
- break;
- case __SI_SYS:
- err |= __put_user((compat_uptr_t)(unsigned long)
- from->si_call_addr, &to->si_call_addr);
- err |= __put_user(from->si_syscall, &to->si_syscall);
- err |= __put_user(from->si_arch, &to->si_arch);
- break;
- default: /* this is just in case for now ... */
- err |= __put_user(from->si_pid, &to->si_pid);
- err |= __put_user(from->si_uid, &to->si_uid);
- break;
- }
- return err;
-}
-
-int copy_siginfo_from_user32(siginfo_t *to, compat_siginfo_t __user *from)
-{
- if (copy_from_user(to, from, __ARCH_SI_PREAMBLE_SIZE) ||
- copy_from_user(to->_sifields._pad,
- from->_sifields._pad, SI_PAD_SIZE))
- return -EFAULT;
-
- return 0;
-}
-
/*
* VFP save/restore code.
*
diff --git a/arch/arm64/kernel/signal32_common.c b/arch/arm64/kernel/signal32_common.c
new file mode 100644
index 000000000000..5bddc25dca12
--- /dev/null
+++ b/arch/arm64/kernel/signal32_common.c
@@ -0,0 +1,135 @@
+/*
+ * Based on arch/arm/kernel/signal.c
+ *
+ * Copyright (C) 1995-2009 Russell King
+ * Copyright (C) 2012 ARM Ltd.
+ * Modified by Will Deacon <will.deacon@arm.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/compat.h>
+#include <linux/signal.h>
+#include <linux/ratelimit.h>
+#include <linux/uaccess.h>
+
+#include <asm/esr.h>
+#include <asm/fpsimd.h>
+#include <asm/signal32_common.h>
+#include <asm/unistd.h>
+
+int put_sigset_t(compat_sigset_t __user *uset, sigset_t *set)
+{
+ compat_sigset_t cset;
+
+ cset.sig[0] = set->sig[0] & 0xffffffffull;
+ cset.sig[1] = set->sig[0] >> 32;
+
+ return copy_to_user(uset, &cset, sizeof(*uset));
+}
+
+int get_sigset_t(sigset_t *set, const compat_sigset_t __user *uset)
+{
+ compat_sigset_t s32;
+
+ if (copy_from_user(&s32, uset, sizeof(*uset)))
+ return -EFAULT;
+
+ set->sig[0] = s32.sig[0] | (((long)s32.sig[1]) << 32);
+ return 0;
+}
+
+int copy_siginfo_to_user32(compat_siginfo_t __user *to, const siginfo_t *from)
+{
+ int err;
+
+ if (!access_ok(VERIFY_WRITE, to, sizeof(*to)))
+ return -EFAULT;
+
+ /* If you change siginfo_t structure, please be sure
+ * this code is fixed accordingly.
+ * It should never copy any pad contained in the structure
+ * to avoid security leaks, but must copy the generic
+ * 3 ints plus the relevant union member.
+ * This routine must convert siginfo from 64bit to 32bit as well
+ *@the same time.
+ */
+ err = __put_user(from->si_signo, &to->si_signo);
+ err |= __put_user(from->si_errno, &to->si_errno);
+ err |= __put_user((short)from->si_code, &to->si_code);
+ if (from->si_code < 0)
+ err |= __copy_to_user(&to->_sifields._pad, &from->_sifields._pad,
+ SI_PAD_SIZE);
+ else switch (from->si_code & __SI_MASK) {
+ case __SI_KILL:
+ err |= __put_user(from->si_pid, &to->si_pid);
+ err |= __put_user(from->si_uid, &to->si_uid);
+ break;
+ case __SI_TIMER:
+ err |= __put_user(from->si_tid, &to->si_tid);
+ err |= __put_user(from->si_overrun, &to->si_overrun);
+ err |= __put_user(from->si_int, &to->si_int);
+ break;
+ case __SI_POLL:
+ err |= __put_user(from->si_band, &to->si_band);
+ err |= __put_user(from->si_fd, &to->si_fd);
+ break;
+ case __SI_FAULT:
+ err |= __put_user((compat_uptr_t)(unsigned long)from->si_addr,
+ &to->si_addr);
+#ifdef BUS_MCEERR_AO
+ /*
+ * Other callers might not initialize the si_lsb field,
+ * so check explicitly for the right codes here.
+ */
+ if (from->si_signo == SIGBUS &&
+ (from->si_code == BUS_MCEERR_AR || from->si_code == BUS_MCEERR_AO))
+ err |= __put_user(from->si_addr_lsb, &to->si_addr_lsb);
+#endif
+ break;
+ case __SI_CHLD:
+ err |= __put_user(from->si_pid, &to->si_pid);
+ err |= __put_user(from->si_uid, &to->si_uid);
+ err |= __put_user(from->si_status, &to->si_status);
+ err |= __put_user(from->si_utime, &to->si_utime);
+ err |= __put_user(from->si_stime, &to->si_stime);
+ break;
+ case __SI_RT: /* This is not generated by the kernel as of now. */
+ case __SI_MESGQ: /* But this is */
+ err |= __put_user(from->si_pid, &to->si_pid);
+ err |= __put_user(from->si_uid, &to->si_uid);
+ err |= __put_user(from->si_int, &to->si_int);
+ break;
+ case __SI_SYS:
+ err |= __put_user((compat_uptr_t)(unsigned long)
+ from->si_call_addr, &to->si_call_addr);
+ err |= __put_user(from->si_syscall, &to->si_syscall);
+ err |= __put_user(from->si_arch, &to->si_arch);
+ break;
+ default: /* this is just in case for now ... */
+ err |= __put_user(from->si_pid, &to->si_pid);
+ err |= __put_user(from->si_uid, &to->si_uid);
+ break;
+ }
+ return err;
+}
+
+int copy_siginfo_from_user32(siginfo_t *to, compat_siginfo_t __user *from)
+{
+ if (copy_from_user(to, from, __ARCH_SI_PREAMBLE_SIZE) ||
+ copy_from_user(to->_sifields._pad,
+ from->_sifields._pad, SI_PAD_SIZE))
+ return -EFAULT;
+
+ return 0;
+}
--
2.11.0
^ permalink raw reply related [flat|nested] 37+ messages in thread* [PATCH 17/20] arm64: ilp32: introduce ilp32-specific handlers for sigframe and ucontext
2017-06-19 15:49 [PATCH v8 00/20] ILP32 for ARM64 Yury Norov
` (14 preceding siblings ...)
2017-06-19 15:49 ` [PATCH 16/20] arm64: signal32: move ilp32 and aarch32 common code to separated file Yury Norov
@ 2017-06-19 15:50 ` Yury Norov
2017-06-19 15:50 ` [PATCH 18/20] arm64: ptrace: handle ptrace_request differently for aarch32 and ilp32 Yury Norov
` (6 subsequent siblings)
22 siblings, 0 replies; 37+ messages in thread
From: Yury Norov @ 2017-06-19 15:50 UTC (permalink / raw)
To: linux-arm-kernel
From: Andrew Pinski <apinski@cavium.com>
ILP32 uses AARCH32 compat structures and syscall handlers for signals.
But ILP32 struct rt_sigframe and ucontext differs from both LP64 and
AARCH32. So some specific mechanism is needed to take care of it.
Signed-off-by: Andrew Pinski <Andrew.Pinski@caviumnetworks.com>
Signed-off-by: Yury Norov <ynorov@caviumnetworks.com>
---
arch/arm64/include/asm/signal_ilp32.h | 38 ++++++++
arch/arm64/kernel/Makefile | 3 +-
arch/arm64/kernel/entry_ilp32.S | 22 +++++
arch/arm64/kernel/signal.c | 3 +
arch/arm64/kernel/signal_ilp32.c | 170 ++++++++++++++++++++++++++++++++++
5 files changed, 235 insertions(+), 1 deletion(-)
create mode 100644 arch/arm64/include/asm/signal_ilp32.h
create mode 100644 arch/arm64/kernel/entry_ilp32.S
create mode 100644 arch/arm64/kernel/signal_ilp32.c
diff --git a/arch/arm64/include/asm/signal_ilp32.h b/arch/arm64/include/asm/signal_ilp32.h
new file mode 100644
index 000000000000..3c6d737c07c0
--- /dev/null
+++ b/arch/arm64/include/asm/signal_ilp32.h
@@ -0,0 +1,38 @@
+/*
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <asm/signal32_common.h>
+#include <asm/signal_common.h>
+
+#ifndef __ASM_SIGNAL_ILP32_H
+#define __ASM_SIGNAL_ILP32_H
+
+#ifdef CONFIG_ARM64_ILP32
+
+#include <linux/compat.h>
+
+int ilp32_setup_rt_frame(int usig, struct ksignal *ksig, sigset_t *set,
+ struct pt_regs *regs);
+
+#else
+
+static inline int ilp32_setup_rt_frame(int usig, struct ksignal *ksig, sigset_t *set,
+ struct pt_regs *regs)
+{
+ return -ENOSYS;
+}
+
+#endif /* CONFIG_ARM64_ILP32 */
+
+#endif /* __ASM_SIGNAL_ILP32_H */
diff --git a/arch/arm64/kernel/Makefile b/arch/arm64/kernel/Makefile
index 9c7912936049..a228aa7abc03 100644
--- a/arch/arm64/kernel/Makefile
+++ b/arch/arm64/kernel/Makefile
@@ -29,7 +29,8 @@ $(obj)/%.stub.o: $(obj)/%.o FORCE
arm64-obj-$(CONFIG_AARCH32_EL0) += sys32.o kuser32.o signal32.o \
sys_compat.o entry32.o binfmt_elf32.o
-arm64-obj-$(CONFIG_ARM64_ILP32) += binfmt_ilp32.o sys_ilp32.o
+arm64-obj-$(CONFIG_ARM64_ILP32) += binfmt_ilp32.o sys_ilp32.o \
+ signal_ilp32.o entry_ilp32.o
arm64-obj-$(CONFIG_COMPAT) += entry32_common.o signal32_common.o
arm64-obj-$(CONFIG_FUNCTION_TRACER) += ftrace.o entry-ftrace.o
arm64-obj-$(CONFIG_MODULES) += arm64ksyms.o module.o
diff --git a/arch/arm64/kernel/entry_ilp32.S b/arch/arm64/kernel/entry_ilp32.S
new file mode 100644
index 000000000000..a8bb94b3901b
--- /dev/null
+++ b/arch/arm64/kernel/entry_ilp32.S
@@ -0,0 +1,22 @@
+/*
+ * ILP32 system call wrappers
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/linkage.h>
+
+ENTRY(ilp32_sys_rt_sigreturn_wrapper)
+ mov x0, sp
+ b ilp32_sys_rt_sigreturn
+ENDPROC(ilp32_sys_rt_sigreturn_wrapper)
diff --git a/arch/arm64/kernel/signal.c b/arch/arm64/kernel/signal.c
index 9f2ea60b9fac..b78f4c255636 100644
--- a/arch/arm64/kernel/signal.c
+++ b/arch/arm64/kernel/signal.c
@@ -35,6 +35,7 @@
#include <asm/signal32.h>
#include <asm/vdso.h>
#include <asm/signal_common.h>
+#include <asm/signal_ilp32.h>
#define RT_SIGFRAME_FP_POS (offsetof(struct rt_sigframe, sig) \
+ offsetof(struct sigframe, fp))
@@ -325,6 +326,8 @@ static void handle_signal(struct ksignal *ksig, struct pt_regs *regs)
ret = compat_setup_rt_frame(usig, ksig, oldset, regs);
else
ret = compat_setup_frame(usig, ksig, oldset, regs);
+ } else if (is_ilp32_compat_task()) {
+ ret = ilp32_setup_rt_frame(usig, ksig, oldset, regs);
} else {
ret = setup_rt_frame(usig, ksig, oldset, regs);
}
diff --git a/arch/arm64/kernel/signal_ilp32.c b/arch/arm64/kernel/signal_ilp32.c
new file mode 100644
index 000000000000..b9a3372b0142
--- /dev/null
+++ b/arch/arm64/kernel/signal_ilp32.c
@@ -0,0 +1,170 @@
+/*
+ * Based on arch/arm/kernel/signal.c
+ *
+ * Copyright (C) 1995-2009 Russell King
+ * Copyright (C) 2012 ARM Ltd.
+ * Copyright (C) 2017 Cavium Networks.
+ * Yury Norov <ynorov@caviumnetworks.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/compat.h>
+#include <linux/signal.h>
+#include <linux/syscalls.h>
+#include <linux/ratelimit.h>
+
+#include <asm/esr.h>
+#include <asm/fpsimd.h>
+#include <asm/signal_ilp32.h>
+#include <asm/uaccess.h>
+#include <asm/unistd.h>
+#include <asm/ucontext.h>
+
+
+#define ILP32_RT_SIGFRAME_FP_POS (offsetof(struct ilp32_rt_sigframe, sig) \
+ + offsetof(struct ilp32_sigframe, fp))
+
+struct ilp32_ucontext {
+ u32 uc_flags;
+ u32 uc_link;
+ compat_stack_t uc_stack;
+ compat_sigset_t uc_sigmask;
+ /* glibc uses a 1024-bit sigset_t */
+ __u8 __unused[1024 / 8 - sizeof(compat_sigset_t)];
+ /* last for future expansion */
+ struct sigcontext uc_mcontext;
+};
+
+struct ilp32_sigframe {
+ struct ilp32_ucontext uc;
+ u64 fp;
+ u64 lr;
+};
+
+struct ilp32_rt_sigframe {
+ struct compat_siginfo info;
+ struct ilp32_sigframe sig;
+};
+
+static int restore_ilp32_sigframe(struct pt_regs *regs,
+ struct ilp32_sigframe __user *sf)
+{
+ sigset_t set;
+ int err;
+ err = get_sigset_t(&set, &sf->uc.uc_sigmask);
+ if (err == 0)
+ set_current_blocked(&set);
+ err |= restore_sigcontext(regs, &sf->uc.uc_mcontext);
+ return err;
+}
+
+static int setup_ilp32_sigframe(struct ilp32_sigframe __user *sf,
+ struct pt_regs *regs, sigset_t *set)
+{
+ int err = 0;
+ /* set up the stack frame for unwinding */
+ __put_user_error(regs->regs[29], &sf->fp, err);
+ __put_user_error(regs->regs[30], &sf->lr, err);
+
+ err |= put_sigset_t(&sf->uc.uc_sigmask, set);
+ err |= setup_sigcontext(&sf->uc.uc_mcontext, regs);
+ return err;
+}
+
+asmlinkage long ilp32_sys_rt_sigreturn(struct pt_regs *regs)
+{
+ struct ilp32_rt_sigframe __user *frame;
+
+ /* Always make any pending restarted system calls return -EINTR */
+ current->restart_block.fn = do_no_restart_syscall;
+
+ /*
+ * Since we stacked the signal on a 128-bit boundary,
+ * then 'sp' should be word aligned here. If it's
+ * not, then the user is trying to mess with us.
+ */
+ if (regs->sp & 15)
+ goto badframe;
+
+ frame = (struct ilp32_rt_sigframe __user *)regs->sp;
+
+ if (!access_ok(VERIFY_READ, frame, sizeof (*frame)))
+ goto badframe;
+
+ if (restore_ilp32_sigframe(regs, &frame->sig))
+ goto badframe;
+
+ if (compat_restore_altstack(&frame->sig.uc.uc_stack))
+ goto badframe;
+
+ return regs->regs[0];
+
+badframe:
+ if (show_unhandled_signals)
+ pr_info_ratelimited("%s[%d]: bad frame in %s: pc=%08llx sp=%08llx\n",
+ current->comm, task_pid_nr(current), __func__,
+ regs->pc, regs->sp);
+ force_sig(SIGSEGV, current);
+ return 0;
+}
+
+static struct ilp32_rt_sigframe __user *ilp32_get_sigframe(struct ksignal *ksig,
+ struct pt_regs *regs)
+{
+ unsigned long sp, sp_top;
+ struct ilp32_rt_sigframe __user *frame;
+
+ sp = sp_top = sigsp(regs->sp, ksig);
+
+ sp = (sp - sizeof(struct ilp32_rt_sigframe)) & ~15;
+ frame = (struct ilp32_rt_sigframe __user *)sp;
+
+ /*
+ * Check that we can actually write to the signal frame.
+ */
+ if (!access_ok(VERIFY_WRITE, frame, sp_top - sp))
+ frame = NULL;
+
+ return frame;
+}
+
+/*
+ * ILP32 signal handling routines called from signal.c
+ */
+int ilp32_setup_rt_frame(int usig, struct ksignal *ksig,
+ sigset_t *set, struct pt_regs *regs)
+{
+ struct ilp32_rt_sigframe __user *frame;
+ int err = 0;
+
+ frame = ilp32_get_sigframe(ksig, regs);
+
+ if (!frame)
+ return 1;
+
+ err |= copy_siginfo_to_user32(&frame->info, &ksig->info);
+
+ __put_user_error(0, &frame->sig.uc.uc_flags, err);
+ __put_user_error(0, &frame->sig.uc.uc_link, err);
+
+ err |= __compat_save_altstack(&frame->sig.uc.uc_stack, regs->sp);
+ err |= setup_ilp32_sigframe(&frame->sig, regs, set);
+ if (err == 0) {
+ setup_return(regs, &ksig->ka, frame, ILP32_RT_SIGFRAME_FP_POS, usig);
+ regs->regs[1] = (unsigned long)&frame->info;
+ regs->regs[2] = (unsigned long)&frame->sig.uc;
+ }
+
+ return err;
+}
--
2.11.0
^ permalink raw reply related [flat|nested] 37+ messages in thread* [PATCH 18/20] arm64: ptrace: handle ptrace_request differently for aarch32 and ilp32
2017-06-19 15:49 [PATCH v8 00/20] ILP32 for ARM64 Yury Norov
` (15 preceding siblings ...)
2017-06-19 15:50 ` [PATCH 17/20] arm64: ilp32: introduce ilp32-specific handlers for sigframe and ucontext Yury Norov
@ 2017-06-19 15:50 ` Yury Norov
2017-06-19 15:50 ` [PATCH 19/20] arm64:ilp32: add vdso-ilp32 and use for signal return Yury Norov
` (5 subsequent siblings)
22 siblings, 0 replies; 37+ messages in thread
From: Yury Norov @ 2017-06-19 15:50 UTC (permalink / raw)
To: linux-arm-kernel
ILP32 has context-related structures different from both aarch32 and
aarch64/lp64. In this patch compat_arch_ptrace() renamed to
compat_a32_ptrace(), and compat_arch_ptrace() only makes choice between
compat_a32_ptrace() and new compat_ilp32_ptrace() handler.
compat_ilp32_ptrace() calls generic compat_ptrace_request() for all
requests except PTRACE_GETSIGMASK and PTRACE_SETSIGMASK, which need
special handling.
Signed-off-by: Yury Norov <ynorov@caviumnetworks.com>
Signed-off-by: Bamvor Jian Zhang <bamvor.zhangjian@linaro.org>
Signed-off-by: Chengming Zhou <zhouchengming1@huawei.com>
---
arch/arm64/kernel/ptrace.c | 65 ++++++++++++++++++++++++++++++++++++++++++++--
1 file changed, 63 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/kernel/ptrace.c b/arch/arm64/kernel/ptrace.c
index e2b7c040bf84..28f96765e8cc 100644
--- a/arch/arm64/kernel/ptrace.c
+++ b/arch/arm64/kernel/ptrace.c
@@ -765,9 +765,11 @@ static const struct user_regset_view user_aarch64_view = {
.regsets = aarch64_regsets, .n = ARRAY_SIZE(aarch64_regsets)
};
-#ifdef CONFIG_AARCH32_EL0
+#ifdef CONFIG_COMPAT
#include <linux/compat.h>
+#endif
+#ifdef CONFIG_AARCH32_EL0
enum compat_regset {
REGSET_COMPAT_GPR,
REGSET_COMPAT_VFP,
@@ -1223,7 +1225,7 @@ static int compat_ptrace_sethbpregs(struct task_struct *tsk, compat_long_t num,
}
#endif /* CONFIG_HAVE_HW_BREAKPOINT */
-long compat_arch_ptrace(struct task_struct *child, compat_long_t request,
+static long compat_a32_ptrace(struct task_struct *child, compat_long_t request,
compat_ulong_t caddr, compat_ulong_t cdata)
{
unsigned long addr = caddr;
@@ -1300,8 +1302,67 @@ long compat_arch_ptrace(struct task_struct *child, compat_long_t request,
return ret;
}
+
+#else
+#define compat_a32_ptrace(child, request, caddr, cdata) (0)
#endif /* CONFIG_AARCH32_EL0 */
+#ifdef CONFIG_ARM64_ILP32
+#include <asm/signal32_common.h>
+
+static long compat_ilp32_ptrace(struct task_struct *child, compat_long_t request,
+ compat_ulong_t caddr, compat_ulong_t cdata)
+{
+ sigset_t new_set;
+
+ switch (request) {
+ case PTRACE_GETSIGMASK:
+ if (caddr != sizeof(compat_sigset_t))
+ return -EINVAL;
+
+ return put_sigset_t((compat_sigset_t __user *) (u64) cdata,
+ &child->blocked);
+
+ case PTRACE_SETSIGMASK:
+ if (caddr != sizeof(compat_sigset_t))
+ return -EINVAL;
+
+ if (get_sigset_t(&new_set, (compat_sigset_t __user *) (u64) cdata))
+ return -EFAULT;
+
+ sigdelsetmask(&new_set, sigmask(SIGKILL)|sigmask(SIGSTOP));
+
+ /*
+ * Every thread does recalc_sigpending() after resume, so
+ * retarget_shared_pending() and recalc_sigpending() are not
+ * called here.
+ */
+ spin_lock_irq(&child->sighand->siglock);
+ child->blocked = new_set;
+ spin_unlock_irq(&child->sighand->siglock);
+
+ return 0;
+
+ default:
+ return compat_ptrace_request(child, request, caddr, cdata);
+ }
+}
+
+#else
+#define compat_ilp32_ptrace(child, request, caddr, cdata) (0)
+#endif
+
+#ifdef CONFIG_COMPAT
+long compat_arch_ptrace(struct task_struct *child, compat_long_t request,
+ compat_ulong_t caddr, compat_ulong_t cdata)
+{
+ if (is_a32_compat_task())
+ return compat_a32_ptrace(child, request, caddr, cdata);
+
+ return compat_ilp32_ptrace(child, request, caddr, cdata);
+}
+#endif
+
const struct user_regset_view *task_user_regset_view(struct task_struct *task)
{
#ifdef CONFIG_AARCH32_EL0
--
2.11.0
^ permalink raw reply related [flat|nested] 37+ messages in thread* [PATCH 19/20] arm64:ilp32: add vdso-ilp32 and use for signal return
2017-06-19 15:49 [PATCH v8 00/20] ILP32 for ARM64 Yury Norov
` (16 preceding siblings ...)
2017-06-19 15:50 ` [PATCH 18/20] arm64: ptrace: handle ptrace_request differently for aarch32 and ilp32 Yury Norov
@ 2017-06-19 15:50 ` Yury Norov
2017-06-19 15:50 ` [PATCH 20/20] arm64:ilp32: add ARM64_ILP32 to Kconfig Yury Norov
` (4 subsequent siblings)
22 siblings, 0 replies; 37+ messages in thread
From: Yury Norov @ 2017-06-19 15:50 UTC (permalink / raw)
To: linux-arm-kernel
From: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
ILP32 VDSO exports following symbols:
__kernel_rt_sigreturn;
__kernel_gettimeofday;
__kernel_clock_gettime;
__kernel_clock_getres.
What shared object to use, kernel selects depending on result of
is_ilp32_compat_task() in arch/arm64/kernel/vdso.c, so it substitutes
correct pages and spec.
Adjusted to move the data page before code pages in sync with
commit 601255ae3c98 ("arm64: vdso: move data page before code pages")
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
Signed-off-by: Yury Norov <ynorov@caviumnetworks.com>
Signed-off-by: Bamvor Jian Zhang <bamvor.zhangjian@linaro.org>
---
arch/arm64/Makefile | 3 +
arch/arm64/include/asm/vdso.h | 6 ++
arch/arm64/kernel/Makefile | 1 +
arch/arm64/kernel/asm-offsets.c | 7 ++
arch/arm64/kernel/signal.c | 2 +
arch/arm64/kernel/vdso-ilp32/.gitignore | 2 +
arch/arm64/kernel/vdso-ilp32/Makefile | 80 ++++++++++++++++++++++
arch/arm64/kernel/vdso-ilp32/vdso-ilp32.S | 33 ++++++++++
arch/arm64/kernel/vdso-ilp32/vdso-ilp32.lds.S | 95 +++++++++++++++++++++++++++
arch/arm64/kernel/vdso.c | 59 +++++++++++++++--
arch/arm64/kernel/vdso/gettimeofday.S | 20 +++++-
arch/arm64/kernel/vdso/vdso.S | 6 +-
12 files changed, 301 insertions(+), 13 deletions(-)
create mode 100644 arch/arm64/kernel/vdso-ilp32/.gitignore
create mode 100644 arch/arm64/kernel/vdso-ilp32/Makefile
create mode 100644 arch/arm64/kernel/vdso-ilp32/vdso-ilp32.S
create mode 100644 arch/arm64/kernel/vdso-ilp32/vdso-ilp32.lds.S
diff --git a/arch/arm64/Makefile b/arch/arm64/Makefile
index 807451ffcc29..b4e3537db2b0 100644
--- a/arch/arm64/Makefile
+++ b/arch/arm64/Makefile
@@ -155,6 +155,9 @@ archclean:
prepare: vdso_prepare
vdso_prepare: prepare0
$(Q)$(MAKE) $(build)=arch/arm64/kernel/vdso include/generated/vdso-offsets.h
+ifeq ($(CONFIG_ARM64_ILP32), y)
+ $(Q)$(MAKE) $(build)=arch/arm64/kernel/vdso-ilp32 include/generated/vdso-ilp32-offsets.h
+endif
define archhelp
echo '* Image.gz - Compressed kernel image (arch/$(ARCH)/boot/Image.gz)'
diff --git a/arch/arm64/include/asm/vdso.h b/arch/arm64/include/asm/vdso.h
index 839ce0031bd5..33a4e10014aa 100644
--- a/arch/arm64/include/asm/vdso.h
+++ b/arch/arm64/include/asm/vdso.h
@@ -29,6 +29,12 @@
#include <generated/vdso-offsets.h>
+#ifdef CONFIG_ARM64_ILP32
+#include <generated/vdso-ilp32-offsets.h>
+#else
+#define vdso_offset_sigtramp_ilp32 ({ BUILD_BUG(); 0; })
+#endif
+
#define VDSO_SYMBOL(base, name) \
({ \
(void *)(vdso_offset_##name - VDSO_LBASE + (unsigned long)(base)); \
diff --git a/arch/arm64/kernel/Makefile b/arch/arm64/kernel/Makefile
index a228aa7abc03..527fecea4e51 100644
--- a/arch/arm64/kernel/Makefile
+++ b/arch/arm64/kernel/Makefile
@@ -58,6 +58,7 @@ arm64-reloc-test-y := reloc_test_core.o reloc_test_syms.o
arm64-obj-$(CONFIG_CRASH_DUMP) += crash_dump.o
obj-y += $(arm64-obj-y) vdso/ probes/
+obj-$(CONFIG_ARM64_ILP32) += vdso-ilp32/
obj-m += $(arm64-obj-m)
head-y := head.o
extra-y += $(head-y) vmlinux.lds
diff --git a/arch/arm64/kernel/asm-offsets.c b/arch/arm64/kernel/asm-offsets.c
index aec5b6cedc7c..c8a09718e998 100644
--- a/arch/arm64/kernel/asm-offsets.c
+++ b/arch/arm64/kernel/asm-offsets.c
@@ -121,6 +121,13 @@ int main(void)
DEFINE(TSPEC_TV_SEC, offsetof(struct timespec, tv_sec));
DEFINE(TSPEC_TV_NSEC, offsetof(struct timespec, tv_nsec));
BLANK();
+#ifdef CONFIG_COMPAT
+ DEFINE(COMPAT_TVAL_TV_SEC, offsetof(struct compat_timeval, tv_sec));
+ DEFINE(COMPAT_TVAL_TV_USEC, offsetof(struct compat_timeval, tv_usec));
+ DEFINE(COMPAT_TSPEC_TV_SEC, offsetof(struct compat_timespec, tv_sec));
+ DEFINE(COMPAT_TSPEC_TV_NSEC, offsetof(struct compat_timespec, tv_nsec));
+ BLANK();
+#endif
DEFINE(TZ_MINWEST, offsetof(struct timezone, tz_minuteswest));
DEFINE(TZ_DSTTIME, offsetof(struct timezone, tz_dsttime));
BLANK();
diff --git a/arch/arm64/kernel/signal.c b/arch/arm64/kernel/signal.c
index b78f4c255636..a7f201dba9de 100644
--- a/arch/arm64/kernel/signal.c
+++ b/arch/arm64/kernel/signal.c
@@ -267,6 +267,8 @@ void setup_return(struct pt_regs *regs, struct k_sigaction *ka,
if (ka->sa.sa_flags & SA_RESTORER)
sigtramp = ka->sa.sa_restorer;
+ else if (is_ilp32_compat_task())
+ sigtramp = VDSO_SYMBOL(current->mm->context.vdso, sigtramp_ilp32);
else
sigtramp = VDSO_SYMBOL(current->mm->context.vdso, sigtramp);
diff --git a/arch/arm64/kernel/vdso-ilp32/.gitignore b/arch/arm64/kernel/vdso-ilp32/.gitignore
new file mode 100644
index 000000000000..61806c3fd68b
--- /dev/null
+++ b/arch/arm64/kernel/vdso-ilp32/.gitignore
@@ -0,0 +1,2 @@
+vdso-ilp32.lds
+vdso-ilp32-offsets.h
diff --git a/arch/arm64/kernel/vdso-ilp32/Makefile b/arch/arm64/kernel/vdso-ilp32/Makefile
new file mode 100644
index 000000000000..8fac22a8b90e
--- /dev/null
+++ b/arch/arm64/kernel/vdso-ilp32/Makefile
@@ -0,0 +1,80 @@
+#
+# Building a vDSO image for AArch64.
+#
+# Author: Will Deacon <will.deacon@arm.com>
+# Heavily based on the vDSO Makefiles for other archs.
+#
+
+obj-ilp32-vdso := gettimeofday-ilp32.o note-ilp32.o sigreturn-ilp32.o
+
+# Build rules
+targets := $(obj-ilp32-vdso) vdso-ilp32.so vdso-ilp32.so.dbg
+obj-ilp32-vdso := $(addprefix $(obj)/, $(obj-ilp32-vdso))
+
+ccflags-y := -shared -fno-common -fno-builtin
+ccflags-y += -nostdlib -Wl,-soname=linux-ilp32-vdso.so.1 \
+ $(call cc-ldoption, -Wl$(comma)--hash-style=sysv)
+
+# Disable gcov profiling for VDSO code
+GCOV_PROFILE := n
+
+# Workaround for bare-metal (ELF) toolchains that neglect to pass -shared
+# down to collect2, resulting in silent corruption of the vDSO image.
+ccflags-y += -Wl,-shared
+
+obj-y += vdso-ilp32.o
+extra-y += vdso-ilp32.lds
+CPPFLAGS_vdso-ilp32.lds += -P -C -U$(ARCH) -mabi=ilp32
+
+# Force dependency (incbin is bad)
+$(obj)/vdso-ilp32.o : $(obj)/vdso-ilp32.so
+
+# Link rule for the .so file, .lds has to be first
+$(obj)/vdso-ilp32.so.dbg: $(src)/vdso-ilp32.lds $(obj-ilp32-vdso)
+ $(call if_changed,vdso-ilp32ld)
+
+# Strip rule for the .so file
+$(obj)/%.so: OBJCOPYFLAGS := -S
+$(obj)/%.so: $(obj)/%.so.dbg FORCE
+ $(call if_changed,objcopy)
+
+# Generate VDSO offsets using helper script
+gen-vdsosym := $(srctree)/$(src)/../vdso/gen_vdso_offsets.sh
+quiet_cmd_vdsosym = VDSOSYM $@
+define cmd_vdsosym
+ $(NM) $< | $(gen-vdsosym) | LC_ALL=C sort > $@
+endef
+
+include/generated/vdso-ilp32-offsets.h: $(obj)/vdso-ilp32.so.dbg FORCE
+ $(call if_changed,vdsosym)
+
+# Assembly rules for the .S files
+#$(obj-ilp32-vdso): %.o: $(src)/../vdso/$(subst -ilp32,,%.S)
+# $(call if_changed_dep,vdso-ilp32as)
+
+$(obj)/gettimeofday-ilp32.o: $(src)/../vdso/gettimeofday.S
+ $(call if_changed_dep,vdso-ilp32as)
+
+$(obj)/note-ilp32.o: $(src)/../vdso/note.S
+ $(call if_changed_dep,vdso-ilp32as)
+
+# This one should be fine because ILP32 uses the same generic
+# __NR_rt_sigreturn syscall number.
+$(obj)/sigreturn-ilp32.o: $(src)/../vdso/sigreturn.S
+ $(call if_changed_dep,vdso-ilp32as)
+
+# Actual build commands
+quiet_cmd_vdso-ilp32ld = VDSOILP32L $@
+ cmd_vdso-ilp32ld = $(CC) $(c_flags) -mabi=ilp32 -Wl,-n -Wl,-T $^ -o $@
+quiet_cmd_vdso-ilp32as = VDSOILP32A $@
+ cmd_vdso-ilp32as = $(CC) $(a_flags) -mabi=ilp32 -c -o $@ $<
+
+# Install commands for the unstripped file
+quiet_cmd_vdso_install = INSTALL $@
+ cmd_vdso_install = cp $(obj)/$@.dbg $(MODLIB)/vdso/$@
+
+vdso-ilp32.so: $(obj)/vdso-ilp32.so.dbg
+ @mkdir -p $(MODLIB)/vdso
+ $(call cmd,vdso_install)
+
+vdso_install: vdso-ilp32.so
diff --git a/arch/arm64/kernel/vdso-ilp32/vdso-ilp32.S b/arch/arm64/kernel/vdso-ilp32/vdso-ilp32.S
new file mode 100644
index 000000000000..46ac0728443c
--- /dev/null
+++ b/arch/arm64/kernel/vdso-ilp32/vdso-ilp32.S
@@ -0,0 +1,33 @@
+/*
+ * Copyright (C) 2012 ARM Limited
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ * Author: Will Deacon <will.deacon@arm.com>
+ */
+
+#include <linux/init.h>
+#include <linux/linkage.h>
+#include <linux/const.h>
+#include <asm/page.h>
+
+ __PAGE_ALIGNED_DATA
+
+ .globl vdso_ilp32_start, vdso_ilp32_end
+ .balign PAGE_SIZE
+vdso_ilp32_start:
+ .incbin "arch/arm64/kernel/vdso-ilp32/vdso-ilp32.so"
+ .balign PAGE_SIZE
+vdso_ilp32_end:
+
+ .previous
diff --git a/arch/arm64/kernel/vdso-ilp32/vdso-ilp32.lds.S b/arch/arm64/kernel/vdso-ilp32/vdso-ilp32.lds.S
new file mode 100644
index 000000000000..c82098f7037d
--- /dev/null
+++ b/arch/arm64/kernel/vdso-ilp32/vdso-ilp32.lds.S
@@ -0,0 +1,95 @@
+/*
+ * GNU linker script for the VDSO library.
+ *
+ * Copyright (C) 2012 ARM Limited
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ * Author: Will Deacon <will.deacon@arm.com>
+ * Heavily based on the vDSO linker scripts for other archs.
+ */
+
+#include <linux/const.h>
+#include <asm/page.h>
+#include <asm/vdso.h>
+
+SECTIONS
+{
+ PROVIDE(_vdso_data = . - PAGE_SIZE);
+ . = VDSO_LBASE + SIZEOF_HEADERS;
+
+ .hash : { *(.hash) } :text
+ .gnu.hash : { *(.gnu.hash) }
+ .dynsym : { *(.dynsym) }
+ .dynstr : { *(.dynstr) }
+ .gnu.version : { *(.gnu.version) }
+ .gnu.version_d : { *(.gnu.version_d) }
+ .gnu.version_r : { *(.gnu.version_r) }
+
+ .note : { *(.note.*) } :text :note
+
+ . = ALIGN(16);
+
+ .text : { *(.text*) } :text =0xd503201f
+ PROVIDE (__etext = .);
+ PROVIDE (_etext = .);
+ PROVIDE (etext = .);
+
+ .eh_frame_hdr : { *(.eh_frame_hdr) } :text :eh_frame_hdr
+ .eh_frame : { KEEP (*(.eh_frame)) } :text
+
+ .dynamic : { *(.dynamic) } :text :dynamic
+
+ .rodata : { *(.rodata*) } :text
+
+ _end = .;
+ PROVIDE(end = .);
+
+ /DISCARD/ : {
+ *(.note.GNU-stack)
+ *(.data .data.* .gnu.linkonce.d.* .sdata*)
+ *(.bss .sbss .dynbss .dynsbss)
+ }
+}
+
+/*
+ * We must supply the ELF program headers explicitly to get just one
+ * PT_LOAD segment, and set the flags explicitly to make segments read-only.
+ */
+PHDRS
+{
+ text PT_LOAD FLAGS(5) FILEHDR PHDRS; /* PF_R|PF_X */
+ dynamic PT_DYNAMIC FLAGS(4); /* PF_R */
+ note PT_NOTE FLAGS(4); /* PF_R */
+ eh_frame_hdr PT_GNU_EH_FRAME;
+}
+
+/*
+ * This controls what symbols we export from the DSO.
+ */
+VERSION
+{
+ LINUX_4.12 {
+ global:
+ __kernel_rt_sigreturn;
+ __kernel_gettimeofday;
+ __kernel_clock_gettime;
+ __kernel_clock_getres;
+ local: *;
+ };
+}
+
+/*
+ * Make the sigreturn code visible to the kernel.
+ */
+VDSO_sigtramp_ilp32 = __kernel_rt_sigreturn;
diff --git a/arch/arm64/kernel/vdso.c b/arch/arm64/kernel/vdso.c
index a9f24184da38..27d7bcef9122 100644
--- a/arch/arm64/kernel/vdso.c
+++ b/arch/arm64/kernel/vdso.c
@@ -37,8 +37,13 @@
#include <asm/vdso.h>
#include <asm/vdso_datapage.h>
-extern char vdso_start[], vdso_end[];
-static unsigned long vdso_pages __ro_after_init;
+extern char vdso_lp64_start[], vdso_lp64_end[];
+static unsigned long vdso_lp64_pages __ro_after_init;
+
+#ifdef CONFIG_ARM64_ILP32
+extern char vdso_ilp32_start[], vdso_ilp32_end[];
+static unsigned long vdso_ilp32_pages __ro_after_init;
+#endif
/*
* The vDSO data page.
@@ -110,7 +115,17 @@ int aarch32_setup_vectors_page(struct linux_binprm *bprm, int uses_interp)
}
#endif /* CONFIG_AARCH32_EL0 */
-static struct vm_special_mapping vdso_spec[2] __ro_after_init = {
+static struct vm_special_mapping vdso_lp64_spec[2] __ro_after_init = {
+ {
+ .name = "[vvar]",
+ },
+ {
+ .name = "[vdso]",
+ },
+};
+
+#ifdef CONFIG_ARM64_ILP32
+static struct vm_special_mapping vdso_ilp32_spec[2] __ro_after_init = {
{
.name = "[vvar]",
},
@@ -118,10 +133,14 @@ static struct vm_special_mapping vdso_spec[2] __ro_after_init = {
.name = "[vdso]",
},
};
+#endif
-static int __init vdso_init(void)
+static int __init vdso_init(char *vdso_start, char *vdso_end,
+ unsigned long *vdso_pagesp,
+ struct vm_special_mapping *vdso_spec)
{
int i;
+ unsigned long vdso_pages;
struct page **vdso_pagelist;
unsigned long pfn;
@@ -131,8 +150,10 @@ static int __init vdso_init(void)
}
vdso_pages = (vdso_end - vdso_start) >> PAGE_SHIFT;
+ *vdso_pagesp = vdso_pages;
pr_info("vdso: %ld pages (%ld code @ %p, %ld data @ %p)\n",
- vdso_pages + 1, vdso_pages, vdso_start, 1L, vdso_data);
+ vdso_pages + 1, vdso_pages,
+ vdso_start, 1L, vdso_data);
/* Allocate the vDSO pagelist, plus a page for the data. */
vdso_pagelist = kcalloc(vdso_pages + 1, sizeof(struct page *),
@@ -155,7 +176,22 @@ static int __init vdso_init(void)
return 0;
}
-arch_initcall(vdso_init);
+
+static int __init vdso_lp64_init(void)
+{
+ return vdso_init(vdso_lp64_start, vdso_lp64_end,
+ &vdso_lp64_pages, vdso_lp64_spec);
+}
+arch_initcall(vdso_lp64_init);
+
+#ifdef CONFIG_ARM64_ILP32
+static int __init vdso_ilp32_init(void)
+{
+ return vdso_init(vdso_ilp32_start, vdso_ilp32_end,
+ &vdso_ilp32_pages, vdso_ilp32_spec);
+}
+arch_initcall(vdso_ilp32_init);
+#endif
int arch_setup_additional_pages(struct linux_binprm *bprm,
int uses_interp)
@@ -163,8 +199,17 @@ int arch_setup_additional_pages(struct linux_binprm *bprm,
struct mm_struct *mm = current->mm;
unsigned long vdso_base, vdso_text_len, vdso_mapping_len;
void *ret;
+ unsigned long pages = vdso_lp64_pages;
+ struct vm_special_mapping *vdso_spec = vdso_lp64_spec;
+
+#ifdef CONFIG_ARM64_ILP32
+ if (is_ilp32_compat_task()) {
+ pages = vdso_ilp32_pages;
+ vdso_spec = vdso_ilp32_spec;
+ }
+#endif
- vdso_text_len = vdso_pages << PAGE_SHIFT;
+ vdso_text_len = pages << PAGE_SHIFT;
/* Be sure to map the data page */
vdso_mapping_len = vdso_text_len + PAGE_SIZE;
diff --git a/arch/arm64/kernel/vdso/gettimeofday.S b/arch/arm64/kernel/vdso/gettimeofday.S
index e00b4671bd7c..062a33df4ba5 100644
--- a/arch/arm64/kernel/vdso/gettimeofday.S
+++ b/arch/arm64/kernel/vdso/gettimeofday.S
@@ -25,6 +25,16 @@
#define NSEC_PER_SEC_LO16 0xca00
#define NSEC_PER_SEC_HI16 0x3b9a
+#ifdef __LP64__
+#define PTR_REG(n) x##n
+#define OFFSET(n) n
+#define DELOUSE(n)
+#else
+#define PTR_REG(n) w##n
+#define OFFSET(n) COMPAT_##n
+#define DELOUSE(n) mov w##n, w##n
+#endif
+
vdso_data .req x6
seqcnt .req w7
w_tmp .req w8
@@ -119,7 +129,7 @@ x_tmp .req x8
.if \shift == 1
lsr x11, x11, x12
.endif
- stp x10, x11, [x1, #TSPEC_TV_SEC]
+ stp PTR_REG(10), PTR_REG(11), [x1, #OFFSET(TSPEC_TV_SEC)]
mov x0, xzr
ret
.endm
@@ -136,6 +146,8 @@ x_tmp .req x8
/* int __kernel_gettimeofday(struct timeval *tv, struct timezone *tz); */
ENTRY(__kernel_gettimeofday)
.cfi_startproc
+ DELOUSE(0)
+ DELOUSE(1)
adr vdso_data, _vdso_data
/* If tv is NULL, skip to the timezone code. */
cbz x0, 2f
@@ -160,7 +172,7 @@ ENTRY(__kernel_gettimeofday)
mov x13, #1000
lsl x13, x13, x12
udiv x11, x11, x13
- stp x10, x11, [x0, #TVAL_TV_SEC]
+ stp PTR_REG(10), PTR_REG(11), [x0, #OFFSET(TVAL_TV_SEC)]
2:
/* If tz is NULL, return 0. */
cbz x1, 3f
@@ -182,6 +194,7 @@ ENDPROC(__kernel_gettimeofday)
/* int __kernel_clock_gettime(clockid_t clock_id, struct timespec *tp); */
ENTRY(__kernel_clock_gettime)
.cfi_startproc
+ DELOUSE(1)
cmp w0, #JUMPSLOT_MAX
b.hi syscall
adr vdso_data, _vdso_data
@@ -297,6 +310,7 @@ ENDPROC(__kernel_clock_gettime)
/* int __kernel_clock_getres(clockid_t clock_id, struct timespec *res); */
ENTRY(__kernel_clock_getres)
.cfi_startproc
+ DELOUSE(1)
cmp w0, #CLOCK_REALTIME
ccmp w0, #CLOCK_MONOTONIC, #0x4, ne
ccmp w0, #CLOCK_MONOTONIC_RAW, #0x4, ne
@@ -311,7 +325,7 @@ ENTRY(__kernel_clock_getres)
ldr x2, 6f
2:
cbz w1, 3f
- stp xzr, x2, [x1]
+ stp PTR_REG(zr), PTR_REG(2), [x1]
3: /* res == NULL. */
mov w0, wzr
diff --git a/arch/arm64/kernel/vdso/vdso.S b/arch/arm64/kernel/vdso/vdso.S
index 82379a70ef03..a40ae2485430 100644
--- a/arch/arm64/kernel/vdso/vdso.S
+++ b/arch/arm64/kernel/vdso/vdso.S
@@ -21,12 +21,12 @@
#include <linux/const.h>
#include <asm/page.h>
- .globl vdso_start, vdso_end
+ .globl vdso_lp64_start, vdso_lp64_end
.section .rodata
.balign PAGE_SIZE
-vdso_start:
+vdso_lp64_start:
.incbin "arch/arm64/kernel/vdso/vdso.so"
.balign PAGE_SIZE
-vdso_end:
+vdso_lp64_end:
.previous
--
2.11.0
^ permalink raw reply related [flat|nested] 37+ messages in thread* [PATCH 20/20] arm64:ilp32: add ARM64_ILP32 to Kconfig
2017-06-19 15:49 [PATCH v8 00/20] ILP32 for ARM64 Yury Norov
` (17 preceding siblings ...)
2017-06-19 15:50 ` [PATCH 19/20] arm64:ilp32: add vdso-ilp32 and use for signal return Yury Norov
@ 2017-06-19 15:50 ` Yury Norov
2017-06-29 16:10 ` [PATCH v8 00/20] ILP32 for ARM64 Catalin Marinas
` (3 subsequent siblings)
22 siblings, 0 replies; 37+ messages in thread
From: Yury Norov @ 2017-06-19 15:50 UTC (permalink / raw)
To: linux-arm-kernel
From: Andrew Pinski <apinski@cavium.com>
This patch adds the config option for ILP32.
Signed-off-by: Andrew Pinski <Andrew.Pinski@caviumnetworks.com>
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
Signed-off-by: Yury Norov <ynorov@caviumnetworks.com>
Reviewed-by: David Daney <ddaney@caviumnetworks.com>
---
arch/arm64/Kconfig | 9 ++++++++-
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index 168ab2cc426b..242771c764a5 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -1079,7 +1079,7 @@ source "fs/Kconfig.binfmt"
config COMPAT
def_bool y
- depends on AARCH32_EL0
+ depends on AARCH32_EL0 || ARM64_ILP32
config AARCH32_EL0
bool "Kernel support for 32-bit EL0"
@@ -1100,6 +1100,13 @@ config AARCH32_EL0
If you want to execute 32-bit userspace applications, say Y.
+config ARM64_ILP32
+ bool "Kernel support for ILP32"
+ help
+ This option enables support for AArch64 ILP32 user space. ILP32
+ is an ABI where long and pointers are 32bits but it uses the AARCH64
+ instruction set.
+
config SYSVIPC_COMPAT
def_bool y
depends on COMPAT && SYSVIPC
--
2.11.0
^ permalink raw reply related [flat|nested] 37+ messages in thread* [PATCH v8 00/20] ILP32 for ARM64
2017-06-19 15:49 [PATCH v8 00/20] ILP32 for ARM64 Yury Norov
` (18 preceding siblings ...)
2017-06-19 15:50 ` [PATCH 20/20] arm64:ilp32: add ARM64_ILP32 to Kconfig Yury Norov
@ 2017-06-29 16:10 ` Catalin Marinas
2017-07-06 21:59 ` Yury Norov
2017-09-15 11:29 ` Yury Norov
` (2 subsequent siblings)
22 siblings, 1 reply; 37+ messages in thread
From: Catalin Marinas @ 2017-06-29 16:10 UTC (permalink / raw)
To: linux-arm-kernel
Hi Yury,
On Mon, Jun 19, 2017 at 06:49:43PM +0300, Yury Norov wrote:
> This series enables aarch64 with ilp32 mode.
Thanks for putting this series together, I do appreciate the effort.
There are still some review comments coming in but I'm happy with how
the ABI looks now. I did some LTP testing (AArch64/LP64, AArch64/ILP32,
AArch32) and benchmarking and didn't see any regressions (apart from an
LTP bug with sync_file_range2). James Morse is working on reproducing
similar testing in ARM. Szabolcs reported some glibc test-suite
regressions on the libc-alpha list which I assume will be followed up.
VDSO in C is another issue I'd like sorted but this is not strictly
specific to ILP32 and can be done as a follow up. Note that I didn't run
any big-endian tests, though this is something that needs doing.
Now, having agreed on the ABI and implementation very close to being
ready doesn't necessarily make the code suitable for upstream. With my
maintainer hat on, I'm trying to see where ILP32 will be in 2-5-10
years, whether anyone still cares about it in this time frame. The
difference from a driver or SoC support is that ABIs are very hard to
revert, though are as (or even more) likely to bit-rot when not in use
or regularly tested (we have the big-endian experience here).
There are two main aspects to make the code upstream-worthy:
1. Actual/real users (current, future). I don't mean just a few distros
showing that it can be done but actual/planned real deployments
2. Long term testing/maintenance plan. This is not about kernel code
maintenance but a healthy ILP32 ecosystem:
a) readily available toolchains (x86-hosted and AArch64-hosted)
b) filesystems (can be large distros like openSUSE or more
embedded-oriented like Yocto or OpenEmbedded)
c) suitable continuous regression testing (kernel + userland)
d) commitment from all parties involved (including ARM Ltd) to treat
the ILP32 ABI as a (nearly) first class citizen
It is pretty clear from private discussions that there are potential
users but at the moment I can't tell if those would turn into real
deployments of production systems. As for (2), the long term plans are
not convincing (or I haven't spotted them yet), so I'd like to see the
interested parties putting a plan together (something along the lines of
kernelci.org + LTP, glibc buildbot).
What I'd like to propose is that Will and I (as arm64 maintainers, maybe
with with the help of others including this series' authors) take over
the series and push it to a staging branch under the arm64 kernel on
git.kernel.org. This is aimed as a commitment to keep the ABI *stable*
and will be rebased with every kernel release (starting with 4.13). The
decision to merge upstream will be revisited every 6 months, assessing
the progress on the points I mentioned above, with a time limit of 2
years when, if still not upstream, we will stop maintaining such branch.
I am aware that the above proposal has an impact on the glibc patches
since they will not merge a new ABI upstream until officially supported
by the kernel. I cc'ed some of the glibc developers and they will follow
up on the libc-alpha list.
> As supporting work, it introduces ARCH_32BIT_OFF_T configuration
> option that is enabled for existing 32-bit architectures but disabled
> for new arches (so 64-bit off_t userspace type is used by new userspace).
> Also it deprecates getrlimit and setrlimit syscalls prior to prlimit64.
[...]
> Patches 1, 2, 3 and 8 are general, and may be applied separately.
These 4 patches should be merged independently, I don't see a point in
carrying them with the ILP32 series. Arnd, are you ok to push them
upstream?
BTW, patch 3 seems to never make it to the linux-arm-kernel list, I
guess too many on cc.
--
Catalin
^ permalink raw reply [flat|nested] 37+ messages in thread* [PATCH v8 00/20] ILP32 for ARM64
2017-06-29 16:10 ` [PATCH v8 00/20] ILP32 for ARM64 Catalin Marinas
@ 2017-07-06 21:59 ` Yury Norov
2017-07-07 17:11 ` Catalin Marinas
0 siblings, 1 reply; 37+ messages in thread
From: Yury Norov @ 2017-07-06 21:59 UTC (permalink / raw)
To: linux-arm-kernel
Hi Catalin,
On Thu, Jun 29, 2017 at 05:10:36PM +0100, Catalin Marinas wrote:
> Hi Yury,
>
> On Mon, Jun 19, 2017 at 06:49:43PM +0300, Yury Norov wrote:
> > This series enables aarch64 with ilp32 mode.
>
> Thanks for putting this series together, I do appreciate the effort.
> There are still some review comments coming in but I'm happy with how
> the ABI looks now. I did some LTP testing (AArch64/LP64, AArch64/ILP32,
> AArch32) and benchmarking and didn't see any regressions (apart from an
> LTP bug with sync_file_range2). James Morse is working on reproducing
> similar testing in ARM. Szabolcs reported some glibc test-suite
> regressions on the libc-alpha list which I assume will be followed up.
> VDSO in C is another issue I'd like sorted but this is not strictly
> specific to ILP32 and can be done as a follow up. Note that I didn't run
> any big-endian tests, though this is something that needs doing.
>
> Now, having agreed on the ABI and implementation very close to being
> ready doesn't necessarily make the code suitable for upstream. With my
> maintainer hat on, I'm trying to see where ILP32 will be in 2-5-10
> years, whether anyone still cares about it in this time frame. The
> difference from a driver or SoC support is that ABIs are very hard to
> revert, though are as (or even more) likely to bit-rot when not in use
> or regularly tested (we have the big-endian experience here).
>
> There are two main aspects to make the code upstream-worthy:
>
> 1. Actual/real users (current, future). I don't mean just a few distros
> showing that it can be done but actual/planned real deployments
>
> 2. Long term testing/maintenance plan. This is not about kernel code
> maintenance but a healthy ILP32 ecosystem:
> a) readily available toolchains (x86-hosted and AArch64-hosted)
> b) filesystems (can be large distros like openSUSE or more
> embedded-oriented like Yocto or OpenEmbedded)
> c) suitable continuous regression testing (kernel + userland)
> d) commitment from all parties involved (including ARM Ltd) to treat
> the ILP32 ABI as a (nearly) first class citizen
>
> It is pretty clear from private discussions that there are potential
> users but at the moment I can't tell if those would turn into real
> deployments of production systems. As for (2), the long term plans are
> not convincing (or I haven't spotted them yet), so I'd like to see the
> interested parties putting a plan together (something along the lines of
> kernelci.org + LTP, glibc buildbot).
>
> What I'd like to propose is that Will and I (as arm64 maintainers, maybe
> with with the help of others including this series' authors) take over
> the series and push it to a staging branch under the arm64 kernel on
> git.kernel.org. This is aimed as a commitment to keep the ABI *stable*
> and will be rebased with every kernel release (starting with 4.13). The
> decision to merge upstream will be revisited every 6 months, assessing
> the progress on the points I mentioned above, with a time limit of 2
> years when, if still not upstream, we will stop maintaining such branch.
>
> I am aware that the above proposal has an impact on the glibc patches
> since they will not merge a new ABI upstream until officially supported
> by the kernel. I cc'ed some of the glibc developers and they will follow
> up on the libc-alpha list.
Thanks for the email. I appreciate your concern about long-term
support load for a new ABI. I also think that stabilizing the ABI
is a good idea.
At this point, most people expect the ABI to not change unless
critical issues are uncovered. IMO, if there is a good technical reason
to change the ABI -- the change will happen even on the "staging" branch.
And vise-versa, if there is no need for a change, the ABI will be stable
on my local branch, just like on staging branch you propose. I think it
will be that way until there will appear strong community of users who
will resist the changing of ABI. From this point of view, I don't see
major difference for ILP32 where to host the patchset.
Is my understanding correct that you, Will and me will be responsible
for rebasing and maintainance of patches? To be clear, this it not an
automatic task - sometimes simple rebase take the whole day of my time,
and I rebase almost every week. The rebase in 2-month timeframe may become
unpredictable task, by time and amount of work. I think you understand what
I mean, as once before you already told that the series is too intrusive.
To make it more easy for maintainance, I would suggest to split the series
to 3 parts:
- arch and generic patches that not related to ilp32 or arm64 (already
done);
- arm64 patches that do cleanup and refactoring in aim to apply
ilp32 patches smoothly, but not ilp32-specific;
- ilp32-specific patches.
I suggest that we push 1st and 2nd groups to linux-next as there is no
ilp32-specific code, and these changes don't add to the maintenance
overhead of the port. On the other hand, having these patches in linux
master will significantly reduce the effort to maintain ILP32 staging
branch, making rebases much less painful.
If we'll follow your suggestion, does it mean that you expect the 4.12-based
branch from me soon to put on staging?
> The decision to merge upstream will be revisited every 6 months,
> assessing
> the progress on the points I mentioned above, with a time limit of 2
> years
IIUC, this is your personal decision based on responses and comments
from community? If so, I would like to ask you to do the first
ILP32 community poll now, not in 6 months. So we'll collect opinions
and requests from people interested in ILP32, and in 6 month will be
able to check the progress. I would like to see this thread public
because if we are not taking ILP32 to official sources right now,
this is the only way to inform people that the project exists and is
ready to use.
Thanks for kind words on the work,
Yury
^ permalink raw reply [flat|nested] 37+ messages in thread
* [PATCH v8 00/20] ILP32 for ARM64
2017-07-06 21:59 ` Yury Norov
@ 2017-07-07 17:11 ` Catalin Marinas
2017-07-24 11:26 ` Yury Norov
0 siblings, 1 reply; 37+ messages in thread
From: Catalin Marinas @ 2017-07-07 17:11 UTC (permalink / raw)
To: linux-arm-kernel
Hi Yury,
Just a quick reply as I'm about to go on holiday for the next two weeks.
On Fri, Jul 07, 2017 at 12:59:02AM +0300, Yury Norov wrote:
> On Thu, Jun 29, 2017 at 05:10:36PM +0100, Catalin Marinas wrote:
> > On Mon, Jun 19, 2017 at 06:49:43PM +0300, Yury Norov wrote:
> > > This series enables aarch64 with ilp32 mode.
> >
> > What I'd like to propose is that Will and I (as arm64 maintainers, maybe
> > with with the help of others including this series' authors) take over
> > the series and push it to a staging branch under the arm64 kernel on
> > git.kernel.org. This is aimed as a commitment to keep the ABI *stable*
> > and will be rebased with every kernel release (starting with 4.13). The
> > decision to merge upstream will be revisited every 6 months, assessing
> > the progress on the points I mentioned above, with a time limit of 2
> > years when, if still not upstream, we will stop maintaining such branch.
>
> Thanks for the email. I appreciate your concern about long-term
> support load for a new ABI. I also think that stabilizing the ABI
> is a good idea.
>
> At this point, most people expect the ABI to not change unless
> critical issues are uncovered. IMO, if there is a good technical reason
> to change the ABI -- the change will happen even on the "staging" branch.
What I would like is that we change the ABI *only* if there is a serious
bug, otherwise we should try hard to keep it stable. The "good technical
reason" can be subjective (i.e. let's pass 64-bit arguments in a single
register because some benchmark is slightly faster; with a wider user
base, we may get more suggestions for ABI changes that we should
reject).
> And vise-versa, if there is no need for a change, the ABI will be stable
> on my local branch, just like on staging branch you propose. I think it
> will be that way until there will appear strong community of users who
> will resist the changing of ABI. From this point of view, I don't see
> major difference for ILP32 where to host the patchset.
If we don't treat the ABI as stable now, regardless of the number of
users, then it is not ready for upstream (we already have a user in the
openSUSE build).
The arm64 git.kernel.org suggestion was more of an endorsement from the
maintainers that the ABI is stable. If you want to maintain it in your
own tree, that's fine by me. If you want wider visibility, we could
mirror it to git.kernel.org (though given how many trees are there, it
may not mean much).
> Is my understanding correct that you, Will and me will be responsible
> for rebasing and maintainance of patches? To be clear, this it not an
> automatic task - sometimes simple rebase take the whole day of my time,
> and I rebase almost every week. The rebase in 2-month timeframe may become
> unpredictable task, by time and amount of work. I think you understand what
> I mean, as once before you already told that the series is too intrusive.
I am fully aware there is significant effort to rebase the series and if
you can help maintain such branch it would be great. I don't see the
point of rebasing weekly though and it's not just the git handling
process but doing the validation of such branch, regression testing etc.
If it's too time consuming, we could do it only for LTS releases.
> To make it more easy for maintainance, I would suggest to split the series
> to 3 parts:
> - arch and generic patches that not related to ilp32 or arm64 (already
> done);
That's fine.
> - arm64 patches that do cleanup and refactoring in aim to apply
> ilp32 patches smoothly, but not ilp32-specific;
If there are such changes, that's fine. However, I wouldn't merge the
AARCH32_EL0 #ifdef'ery since it's unnecessary if we never merge the
ILP32 patches.
> If we'll follow your suggestion, does it mean that you expect the 4.12-based
> branch from me soon to put on staging?
We can create one for 4.12 if you want (in about 2-3 weeks time when I'm
back). If there is no rush we could aim for 4.13 (there are some
non-trivial conflicts in the sigframe handling code as we are preparing
it for SVE support).
> > The decision to merge upstream will be revisited every 6 months,
> > assessing the progress on the points I mentioned above, with a time
> > limit of 2 years
>
> IIUC, this is your personal decision based on responses and comments
> from community?
Yes, as arm64 kernel maintainer.
> If so, I would like to ask you to do the first ILP32 community poll
> now, not in 6 months. So we'll collect opinions and requests from
> people interested in ILP32, and in 6 month will be able to check the
> progress. I would like to see this thread public because if we are not
> taking ILP32 to official sources right now, this is the only way to
> inform people that the project exists and is ready to use.
That's an ongoing process, I'm not going to ask for people's opinion
every 6 months. It's just that I will revisit periodically the progress
on automated testing, public availability of a cross-toolchain,
Tested/Acked/Reviewed-by tags on these patches from interested parties.
Since I haven't seen any of these now, I don't see any point in asking.
To be clear, I'm not really interested in "we need this too" opinions, I
get lots of these via the marketing channels. I'm looking for actual
users with a long-term view of making/keeping ILP32 a first class ABI.
--
Catalin
^ permalink raw reply [flat|nested] 37+ messages in thread
* [PATCH v8 00/20] ILP32 for ARM64
2017-07-07 17:11 ` Catalin Marinas
@ 2017-07-24 11:26 ` Yury Norov
2017-07-27 17:12 ` Catalin Marinas
2017-08-08 13:34 ` Catalin Marinas
0 siblings, 2 replies; 37+ messages in thread
From: Yury Norov @ 2017-07-24 11:26 UTC (permalink / raw)
To: linux-arm-kernel
Hi Catalin,
Hope you spent your vacation well.
On Fri, Jul 07, 2017 at 06:11:36PM +0100, Catalin Marinas wrote:
> Hi Yury,
>
> Just a quick reply as I'm about to go on holiday for the next two weeks.
>
> On Fri, Jul 07, 2017 at 12:59:02AM +0300, Yury Norov wrote:
> > On Thu, Jun 29, 2017 at 05:10:36PM +0100, Catalin Marinas wrote:
> > > On Mon, Jun 19, 2017 at 06:49:43PM +0300, Yury Norov wrote:
> > > > This series enables aarch64 with ilp32 mode.
> > >
> > > What I'd like to propose is that Will and I (as arm64 maintainers, maybe
> > > with with the help of others including this series' authors) take over
> > > the series and push it to a staging branch under the arm64 kernel on
> > > git.kernel.org. This is aimed as a commitment to keep the ABI *stable*
> > > and will be rebased with every kernel release (starting with 4.13). The
> > > decision to merge upstream will be revisited every 6 months, assessing
> > > the progress on the points I mentioned above, with a time limit of 2
> > > years when, if still not upstream, we will stop maintaining such branch.
> >
> > Thanks for the email. I appreciate your concern about long-term
> > support load for a new ABI. I also think that stabilizing the ABI
> > is a good idea.
> >
> > At this point, most people expect the ABI to not change unless
> > critical issues are uncovered. IMO, if there is a good technical reason
> > to change the ABI -- the change will happen even on the "staging" branch.
>
> What I would like is that we change the ABI *only* if there is a serious
> bug, otherwise we should try hard to keep it stable. The "good technical
> reason" can be subjective (i.e. let's pass 64-bit arguments in a single
> register because some benchmark is slightly faster; with a wider user
> base, we may get more suggestions for ABI changes that we should
> reject).
>
> > And vise-versa, if there is no need for a change, the ABI will be stable
> > on my local branch, just like on staging branch you propose. I think it
> > will be that way until there will appear strong community of users who
> > will resist the changing of ABI. From this point of view, I don't see
> > major difference for ILP32 where to host the patchset.
>
> If we don't treat the ABI as stable now, regardless of the number of
> users, then it is not ready for upstream (we already have a user in the
> openSUSE build).
>
> The arm64 git.kernel.org suggestion was more of an endorsement from the
> maintainers that the ABI is stable. If you want to maintain it in your
> own tree, that's fine by me. If you want wider visibility, we could
> mirror it to git.kernel.org (though given how many trees are there, it
> may not mean much).
I fully agree with your suggestion and think that it will be the big
support for the project. I only want to clarity some details. But it
doesn't mean I'm skeptic with it.
> > Is my understanding correct that you, Will and me will be responsible
> > for rebasing and maintainance of patches? To be clear, this it not an
> > automatic task - sometimes simple rebase take the whole day of my time,
> > and I rebase almost every week. The rebase in 2-month timeframe may become
> > unpredictable task, by time and amount of work. I think you understand what
> > I mean, as once before you already told that the series is too intrusive.
>
> I am fully aware there is significant effort to rebase the series and if
> you can help maintain such branch it would be great. I don't see the
> point of rebasing weekly though and it's not just the git handling
> process but doing the validation of such branch, regression testing etc.
>
> If it's too time consuming, we could do it only for LTS releases.
>
> > To make it more easy for maintainance, I would suggest to split the series
> > to 3 parts:
> > - arch and generic patches that not related to ilp32 or arm64 (already
> > done);
>
> That's fine.
>
> > - arm64 patches that do cleanup and refactoring in aim to apply
> > ilp32 patches smoothly, but not ilp32-specific;
>
> If there are such changes, that's fine. However, I wouldn't merge the
> AARCH32_EL0 #ifdef'ery since it's unnecessary if we never merge the
> ILP32 patches.
>
> > If we'll follow your suggestion, does it mean that you expect the 4.12-based
> > branch from me soon to put on staging?
>
> We can create one for 4.12 if you want (in about 2-3 weeks time when I'm
> back). If there is no rush we could aim for 4.13 (there are some
> non-trivial conflicts in the sigframe handling code as we are preparing
> it for SVE support).
>
> > > The decision to merge upstream will be revisited every 6 months,
> > > assessing the progress on the points I mentioned above, with a time
> > > limit of 2 years
> >
> > IIUC, this is your personal decision based on responses and comments
> > from community?
>
> Yes, as arm64 kernel maintainer.
>
> > If so, I would like to ask you to do the first ILP32 community poll
> > now, not in 6 months. So we'll collect opinions and requests from
> > people interested in ILP32, and in 6 month will be able to check the
> > progress. I would like to see this thread public because if we are not
> > taking ILP32 to official sources right now, this is the only way to
> > inform people that the project exists and is ready to use.
>
> That's an ongoing process, I'm not going to ask for people's opinion
> every 6 months. It's just that I will revisit periodically the progress
> on automated testing, public availability of a cross-toolchain,
> Tested/Acked/Reviewed-by tags on these patches from interested parties.
> Since I haven't seen any of these now, I don't see any point in asking.
>
> To be clear, I'm not really interested in "we need this too" opinions, I
> get lots of these via the marketing channels. I'm looking for actual
> users with a long-term view of making/keeping ILP32 a first class ABI.
>From my side, there are people who ask me for help with ilo32, and who
write from big companies mailservers. But they don't want to ask
their questions publicly for some reason. From my point of view, there
is not so big but stable interest in ILP32.
Nevertheless.
This is the 4.12 and linux-next - based kernel patches:
https://github.com/norov/linux/tree/ilp32-4.12
https://github.com/norov/linux/tree/ilp32-20170724
And this is the glibc series I've created based on Steve's patches in
glibc-alpha mail list (for reference only):
https://github.com/norov/glibc/tree/ilp32-2.26
I hope I didn't miss any reviewer's comments. But if that happened i
kindly ask to excuse me. Should I resend kernel patches to LKML, or
links above are enough for you?
Yury
^ permalink raw reply [flat|nested] 37+ messages in thread
* [PATCH v8 00/20] ILP32 for ARM64
2017-07-24 11:26 ` Yury Norov
@ 2017-07-27 17:12 ` Catalin Marinas
2017-07-31 12:37 ` Yury Norov
2017-08-08 13:34 ` Catalin Marinas
1 sibling, 1 reply; 37+ messages in thread
From: Catalin Marinas @ 2017-07-27 17:12 UTC (permalink / raw)
To: linux-arm-kernel
Hi Yury,
On Mon, Jul 24, 2017 at 02:26:24PM +0300, Yury Norov wrote:
> On Fri, Jul 07, 2017 at 06:11:36PM +0100, Catalin Marinas wrote:
> > On Fri, Jul 07, 2017 at 12:59:02AM +0300, Yury Norov wrote:
> > > If so, I would like to ask you to do the first ILP32 community poll
> > > now, not in 6 months. So we'll collect opinions and requests from
> > > people interested in ILP32, and in 6 month will be able to check the
> > > progress. I would like to see this thread public because if we are not
> > > taking ILP32 to official sources right now, this is the only way to
> > > inform people that the project exists and is ready to use.
> >
> > That's an ongoing process, I'm not going to ask for people's opinion
> > every 6 months. It's just that I will revisit periodically the progress
> > on automated testing, public availability of a cross-toolchain,
> > Tested/Acked/Reviewed-by tags on these patches from interested parties.
> > Since I haven't seen any of these now, I don't see any point in asking.
> >
> > To be clear, I'm not really interested in "we need this too" opinions, I
> > get lots of these via the marketing channels. I'm looking for actual
> > users with a long-term view of making/keeping ILP32 a first class ABI.
>
> From my side, there are people who ask me for help with ilo32, and who
> write from big companies mailservers. But they don't want to ask
> their questions publicly for some reason. From my point of view, there
> is not so big but stable interest in ILP32.
It would be nice if they were more open about what they need/use.
> This is the 4.12 and linux-next - based kernel patches:
> https://github.com/norov/linux/tree/ilp32-4.12
> https://github.com/norov/linux/tree/ilp32-20170724
Thanks. I'll publish the 4.12-based branch sometime next week.
At this stage I don't see much value in a linux-next based ILP32. I
would rather like to see a 4.13-rc3 based one, in preparation for a 4.13
branch once released.
> Should I resend kernel patches to LKML, or links above are enough for
> you?
The 4.12 link is ok. However, could you please post a 4.13-rcX based
series, maybe split in two so that a few generic patches can be merged
in 4.14? Given the reworking of the sigcontext code in 4.13, it would be
good to review the ILP32 changes in this area again.
Thanks.
--
Catalin
^ permalink raw reply [flat|nested] 37+ messages in thread
* [PATCH v8 00/20] ILP32 for ARM64
2017-07-27 17:12 ` Catalin Marinas
@ 2017-07-31 12:37 ` Yury Norov
0 siblings, 0 replies; 37+ messages in thread
From: Yury Norov @ 2017-07-31 12:37 UTC (permalink / raw)
To: linux-arm-kernel
Hi Catalin,
On Thu, Jul 27, 2017 at 06:12:22PM +0100, Catalin Marinas wrote:
> Hi Yury,
>
> On Mon, Jul 24, 2017 at 02:26:24PM +0300, Yury Norov wrote:
[...]
> > This is the 4.12 and linux-next - based kernel patches:
> > https://github.com/norov/linux/tree/ilp32-4.12
> > https://github.com/norov/linux/tree/ilp32-20170724
>
> Thanks. I'll publish the 4.12-based branch sometime next week.
>
> At this stage I don't see much value in a linux-next based ILP32. I
> would rather like to see a 4.13-rc3 based one, in preparation for a 4.13
> branch once released.
>
> > Should I resend kernel patches to LKML, or links above are enough for
> > you?
>
> The 4.12 link is ok. However, could you please post a 4.13-rcX based
> series, maybe split in two so that a few generic patches can be merged
> in 4.14?
This is the 4.13-rc3 - based branch:
https://github.com/norov/linux/tree/ilp32-4.13-rc3
Patches prior to 52315bc30f4967 ("arm64: ilp32: add documentation on
the ILP32 ABI for ARM64") are looking like generic.
Note that this series includes the patch "ptrace: Add compat
PTRACE_{G,S}ETSIGMASK handlers":
https://patchwork.kernel.org/patch/9817343/
It is still under discussion in maillist. If it will be rejected, we'd
rework arm64 ptrace accordingly.
> Given the reworking of the sigcontext code in 4.13, it would be
> good to review the ILP32 changes in this area again.
Thanks, I forgot to mention it in previous email. Changes are mostly located in
patches d87e8ed73d59 ("arm64: signal: share lp64 signal structures and routines
to ilp32") and 99c30e5df3f4 ("arm64: ilp32: introduce ilp32-specific handlers
for sigframe and ucontext"). All reviews are appreciated.
Yury
^ permalink raw reply [flat|nested] 37+ messages in thread
* [PATCH v8 00/20] ILP32 for ARM64
2017-07-24 11:26 ` Yury Norov
2017-07-27 17:12 ` Catalin Marinas
@ 2017-08-08 13:34 ` Catalin Marinas
2017-08-21 10:21 ` Yury Norov
1 sibling, 1 reply; 37+ messages in thread
From: Catalin Marinas @ 2017-08-08 13:34 UTC (permalink / raw)
To: linux-arm-kernel
On Mon, Jul 24, 2017 at 02:26:24PM +0300, Yury Norov wrote:
> This is the 4.12 and linux-next - based kernel patches:
> https://github.com/norov/linux/tree/ilp32-4.12
> https://github.com/norov/linux/tree/ilp32-20170724
I published the 4.12 branch here:
https://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux.git/log/?h=staging/ilp32-4.12
(or git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux.git staging/ilp32-4.12)
There are two patches on top, one to fix SET_PERSONALITY and the other
to make ILP32 default y since you'd expect people using this branch to
need such option enabled.
I'll publish a 4.13-based branch when the corresponding kernel version
is released.
Thanks.
--
Catalin
^ permalink raw reply [flat|nested] 37+ messages in thread
* [PATCH v8 00/20] ILP32 for ARM64
2017-08-08 13:34 ` Catalin Marinas
@ 2017-08-21 10:21 ` Yury Norov
2017-09-04 11:54 ` Yury Norov
0 siblings, 1 reply; 37+ messages in thread
From: Yury Norov @ 2017-08-21 10:21 UTC (permalink / raw)
To: linux-arm-kernel
On Tue, Aug 08, 2017 at 02:34:11PM +0100, Catalin Marinas wrote:
> On Mon, Jul 24, 2017 at 02:26:24PM +0300, Yury Norov wrote:
> > This is the 4.12 and linux-next - based kernel patches:
> > https://github.com/norov/linux/tree/ilp32-4.12
> > https://github.com/norov/linux/tree/ilp32-20170724
>
> I published the 4.12 branch here:
>
> https://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux.git/log/?h=staging/ilp32-4.12
>
> (or git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux.git staging/ilp32-4.12)
>
> There are two patches on top, one to fix SET_PERSONALITY and the other
> to make ILP32 default y since you'd expect people using this branch to
> need such option enabled.
>
> I'll publish a 4.13-based branch when the corresponding kernel version
> is released.
Hi Catalin,
This is the rc-6 based ilp32 series:
https://github.com/norov/linux/tree/ilp32-4.13-rc6
It includes latest version of SET_PERSONALITY() rework:
https://www.spinics.net/lists/arm-kernel/msg602005.html
All patches prior to 3fc85ee96eb8 ("arm64: ilp32: add documentation on
the ILP32 ABI for ARM64") are looking not ilp32-specific and may be
applied independently.
It also includes your patch "arm64: ilp32: Make the Kconfig option
default y" on the top of series.
Yury
^ permalink raw reply [flat|nested] 37+ messages in thread* [PATCH v8 00/20] ILP32 for ARM64
2017-08-21 10:21 ` Yury Norov
@ 2017-09-04 11:54 ` Yury Norov
2017-09-18 10:06 ` Catalin Marinas
0 siblings, 1 reply; 37+ messages in thread
From: Yury Norov @ 2017-09-04 11:54 UTC (permalink / raw)
To: linux-arm-kernel
On Mon, Aug 21, 2017 at 01:21:24PM +0300, Yury Norov wrote:
> On Tue, Aug 08, 2017 at 02:34:11PM +0100, Catalin Marinas wrote:
> > On Mon, Jul 24, 2017 at 02:26:24PM +0300, Yury Norov wrote:
> > > This is the 4.12 and linux-next - based kernel patches:
> > > https://github.com/norov/linux/tree/ilp32-4.12
> > > https://github.com/norov/linux/tree/ilp32-20170724
> >
> > I published the 4.12 branch here:
> >
> > https://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux.git/log/?h=staging/ilp32-4.12
> >
> > (or git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux.git staging/ilp32-4.12)
> >
> > There are two patches on top, one to fix SET_PERSONALITY and the other
> > to make ILP32 default y since you'd expect people using this branch to
> > need such option enabled.
> >
> > I'll publish a 4.13-based branch when the corresponding kernel version
> > is released.
>
> Hi Catalin,
>
> This is the rc-6 based ilp32 series:
> https://github.com/norov/linux/tree/ilp32-4.13-rc6
>
> It includes latest version of SET_PERSONALITY() rework:
> https://www.spinics.net/lists/arm-kernel/msg602005.html
>
> All patches prior to 3fc85ee96eb8 ("arm64: ilp32: add documentation on
> the ILP32 ABI for ARM64") are looking not ilp32-specific and may be
> applied independently.
>
> It also includes your patch "arm64: ilp32: Make the Kconfig option
> default y" on the top of series.
>
> Yury
Hi Catalin, all,
This is 4.13-based and next-20170901-based ilp32 patches.
https://github.com/norov/linux/tree/ilp32-4.13
https://github.com/norov/linux/tree/ilp32-20170901
Next-based series includes the patch that moves TASK_* definitions to
<asm/processor.h>
Also, Szabolcs has created arm/ilp32 branch for glibc.
https://sourceware.org/glibc/wiki/GlibcGit/arm_namespace
Yury
^ permalink raw reply [flat|nested] 37+ messages in thread
* [PATCH v8 00/20] ILP32 for ARM64
2017-06-19 15:49 [PATCH v8 00/20] ILP32 for ARM64 Yury Norov
` (19 preceding siblings ...)
2017-06-29 16:10 ` [PATCH v8 00/20] ILP32 for ARM64 Catalin Marinas
@ 2017-09-15 11:29 ` Yury Norov
2017-11-16 11:11 ` Yury Norov
2018-02-02 8:16 ` Yury Norov
22 siblings, 0 replies; 37+ messages in thread
From: Yury Norov @ 2017-09-15 11:29 UTC (permalink / raw)
To: linux-arm-kernel
Hi all,
Linaro has announced the support for ILP32-enabled cross-toolchain:
https://lists.linaro.org/pipermail/linaro-toolchain/2017-September/006247.html
Files:
http://snapshots.linaro.org/components/toolchain/binaries/7.1-2017.08-rc1/aarch64-linux-gnu_ilp32/
Yury
On Mon, Jun 19, 2017 at 06:49:43PM +0300, Yury Norov wrote:
> This series enables aarch64 with ilp32 mode.
>
> As supporting work, it introduces ARCH_32BIT_OFF_T configuration
> option that is enabled for existing 32-bit architectures but disabled
> for new arches (so 64-bit off_t userspace type is used by new userspace).
> Also it deprecates getrlimit and setrlimit syscalls prior to prlimit64.
>
> This version is based on linux-next from 2017-06-16. It works with
> glibc-2.25, and tested with LTP, glibc testsuite, trinity, lmbench,
> CPUSpec.
>
> Patches 1, 2, 3 and 8 are general, and may be applied separately.
>
> Kernel, GLIBC and OpenSUSE-based distro:
> https://github.com/norov/linux/tree/ilp32-20170616.0
> https://github.com/norov/glibc/tree/dev9
> https://build.opensuse.org/project/show/devel:ARM:Factory:Contrib:ILP32
^ permalink raw reply [flat|nested] 37+ messages in thread* [PATCH v8 00/20] ILP32 for ARM64
2017-06-19 15:49 [PATCH v8 00/20] ILP32 for ARM64 Yury Norov
` (20 preceding siblings ...)
2017-09-15 11:29 ` Yury Norov
@ 2017-11-16 11:11 ` Yury Norov
2017-12-11 10:32 ` Catalin Marinas
2018-02-02 8:16 ` Yury Norov
22 siblings, 1 reply; 37+ messages in thread
From: Yury Norov @ 2017-11-16 11:11 UTC (permalink / raw)
To: linux-arm-kernel
Hi Catalin, Arnd, all,
This is ILP32 patches on top of 4.14 kernel:
https://github.com/norov/linux/commits/ilp32-4.14
I tested the series with LTP lite built by Linaro toolchain, and no
regressions found.
By the way, do you have plans to upstream arch subseries?
https://lkml.org/lkml/2017/9/25/574
Yury
^ permalink raw reply [flat|nested] 37+ messages in thread* [PATCH v8 00/20] ILP32 for ARM64
2017-11-16 11:11 ` Yury Norov
@ 2017-12-11 10:32 ` Catalin Marinas
2017-12-11 13:13 ` Yury Norov
0 siblings, 1 reply; 37+ messages in thread
From: Catalin Marinas @ 2017-12-11 10:32 UTC (permalink / raw)
To: linux-arm-kernel
Hi Yury,
On Thu, Nov 16, 2017 at 02:11:30PM +0300, Yury Norov wrote:
> This is ILP32 patches on top of 4.14 kernel:
> https://github.com/norov/linux/commits/ilp32-4.14
>
> I tested the series with LTP lite built by Linaro toolchain, and no
> regressions found.
Thanks. I gave it a try as well with LTP and pushed a staging/ilp32-4.14
branch to the arm64 tree on git.kernel.org. BTW, you've added two random
patches on top of this branch (which I removed).
> By the way, do you have plans to upstream arch subseries?
> https://lkml.org/lkml/2017/9/25/574
I was hoping Arnd would pick them up since they are rather UAPI specific
than arm64.
BTW, I wonder whether the nds32 patches actually follow the proposed
defaults in your patches like force_o_largefile() and get/setrlimit:
https://lkml.org/lkml/2017/11/27/474
(I haven't reviewed the nds32 patches in detail though)
--
Catalin
^ permalink raw reply [flat|nested] 37+ messages in thread
* [PATCH v8 00/20] ILP32 for ARM64
2017-12-11 10:32 ` Catalin Marinas
@ 2017-12-11 13:13 ` Yury Norov
0 siblings, 0 replies; 37+ messages in thread
From: Yury Norov @ 2017-12-11 13:13 UTC (permalink / raw)
To: linux-arm-kernel
On Mon, Dec 11, 2017 at 10:32:30AM +0000, Catalin Marinas wrote:
> Hi Yury,
>
> On Thu, Nov 16, 2017 at 02:11:30PM +0300, Yury Norov wrote:
> > This is ILP32 patches on top of 4.14 kernel:
> > https://github.com/norov/linux/commits/ilp32-4.14
> >
> > I tested the series with LTP lite built by Linaro toolchain, and no
> > regressions found.
>
> Thanks. I gave it a try as well with LTP and pushed a staging/ilp32-4.14
> branch to the arm64 tree on git.kernel.org. BTW, you've added two random
> patches on top of this branch (which I removed).
Ah, it was accidentally. Removed them and force-updated the repo.
Thanks for pointing that.
> > By the way, do you have plans to upstream arch subseries?
> > https://lkml.org/lkml/2017/9/25/574
>
> I was hoping Arnd would pick them up since they are rather UAPI specific
> than arm64.
>
> BTW, I wonder whether the nds32 patches actually follow the proposed
> defaults in your patches like force_o_largefile() and get/setrlimit:
>
> https://lkml.org/lkml/2017/11/27/474
>
> (I haven't reviewed the nds32 patches in detail though)
I pulled that patches, and there's no my series.
Arnd, could you pick that? Or if you see any problems, let me know
and I'll fix them.
Yury
^ permalink raw reply [flat|nested] 37+ messages in thread
* [PATCH v8 00/20] ILP32 for ARM64
2017-06-19 15:49 [PATCH v8 00/20] ILP32 for ARM64 Yury Norov
` (21 preceding siblings ...)
2017-11-16 11:11 ` Yury Norov
@ 2018-02-02 8:16 ` Yury Norov
2018-02-02 8:58 ` Bamvor Zhang
22 siblings, 1 reply; 37+ messages in thread
From: Yury Norov @ 2018-02-02 8:16 UTC (permalink / raw)
To: linux-arm-kernel
Hi Catalin, all
(Exclude Bamvor as his email became invalid)
This is 4.15-based kernel.
https://github.com/norov/linux/commits/ilp32-4.15
I tested it with LTP, no regressions found.
Kernel v4.15 incorporates SVE series from Dave Martin, so I updated ILP32
patches to agree with it. SVE-related changes are mostly in patches:
arm64: ilp32: introduce ilp32-specific handlers for sigframe and ucontext
arm64: signal32: move ilp32 and aarch32 common code to separated file
arm64: signal: share lp64 signal structures and routines to ilp32
arm64: ilp32: add sys_ilp32.c and a separate table (in entry.S) to use it
Dave kindly reviewed that patches and proposed improvements:
https://www.spinics.net/lists/arm-kernel/msg629221.html
There's no ABI-related changes proposed, or urgent fixes; so I'll rework
signal subsystem during 4.16 cycle.
Are there any news with upstreaming this series?
Thanks,
Yury
On Mon, Jun 19, 2017 at 06:49:43PM +0300, Yury Norov wrote:
> This series enables aarch64 with ilp32 mode.
>
> As supporting work, it introduces ARCH_32BIT_OFF_T configuration
> option that is enabled for existing 32-bit architectures but disabled
> for new arches (so 64-bit off_t userspace type is used by new userspace).
> Also it deprecates getrlimit and setrlimit syscalls prior to prlimit64.
>
> This version is based on linux-next from 2017-06-16. It works with
> glibc-2.25, and tested with LTP, glibc testsuite, trinity, lmbench,
> CPUSpec.
>
> Patches 1, 2, 3 and 8 are general, and may be applied separately.
>
> Kernel, GLIBC and OpenSUSE-based distro:
> https://github.com/norov/linux/tree/ilp32-20170616.0
> https://github.com/norov/glibc/tree/dev9
> https://build.opensuse.org/project/show/devel:ARM:Factory:Contrib:ILP32
>
> (GLIBC patches are managed by Steve Ellcey, so my tree is only for
> reference.)
>
> Changes:
> v3: https://lkml.org/lkml/2014/9/3/704
> v4: https://lkml.org/lkml/2015/4/13/691
> v5: https://lkml.org/lkml/2015/9/29/911
> v6: https://lkml.org/lkml/2016/5/23/661
> v7: https://lkml.org/lkml/2017/1/9/213
> v8: - off_t referred in patches 2 and 13 stands for userspace type which is
> underlined in corresponding patch comments and ARCH_32BIT_OFF_T config
> option description;
> - __IGNORE_getrlimit and __IGNORE_setrlimit are added to
> scripts/checksyscalls.sh (patch 3);
> - for CONFIG_COMPAT, bool changed to def_bool y and 'select COMPAT' is
> dropped for AARCH32_EL0 and ARM64_ILP32 optiond (patches 5 and 20);
> - x19 register is used to load TSK_TI_FLAGS in svc path in
> arch/arm64/kernel/entry.S to avoid register clobbering (patch 14).
> - ilp32 vdso-related files are syncronized wirh lp64 ones, mostly Makefiles
> (patch 19);
> - in arch/arm64/mm/mmap.c, arch_mmap_rnd() swithed to use is_compat_task()
> (patch 9);
> - rebased on next-20170616.
>
> Andrew Pinski (6):
> arm64: rename COMPAT to AARCH32_EL0 in Kconfig
> arm64: ensure the kernel is compiled for LP64
> arm64:uapi: set __BITS_PER_LONG correctly for ILP32 and LP64
> arm64: ilp32: add sys_ilp32.c and a separate table (in entry.S) to use
> it
> arm64: ilp32: introduce ilp32-specific handlers for sigframe and
> ucontext
> arm64:ilp32: add ARM64_ILP32 to Kconfig
>
> Philipp Tomsich (1):
> arm64:ilp32: add vdso-ilp32 and use for signal return
>
> Yury Norov (13):
> compat ABI: use non-compat openat and open_by_handle_at variants
> 32-bit userspace ABI: introduce ARCH_32BIT_OFF_T config option
> asm-generic: Drop getrlimit and setrlimit syscalls from default list
> arm64: ilp32: add documentation on the ILP32 ABI for ARM64
> thread: move thread bits accessors to separated file
> arm64: introduce is_a32_task and is_a32_thread (for AArch32 compat)
> arm64: ilp32: add is_ilp32_compat_{task,thread} and TIF_32BIT_AARCH64
> arm64: introduce binfmt_elf32.c
> arm64: ilp32: introduce binfmt_ilp32.c
> arm64: ilp32: share aarch32 syscall handlers
> arm64: signal: share lp64 signal routines to ilp32
> arm64: signal32: move ilp32 and aarch32 common code to separated file
> arm64: ptrace: handle ptrace_request differently for aarch32 and ilp32
>
> Documentation/arm64/ilp32.txt | 45 +++++++
> arch/Kconfig | 15 +++
> arch/arc/Kconfig | 1 +
> arch/arc/include/uapi/asm/unistd.h | 1 +
> arch/arm/Kconfig | 1 +
> arch/arm64/Kconfig | 17 ++-
> arch/arm64/Makefile | 8 ++
> arch/arm64/include/asm/compat.h | 19 +--
> arch/arm64/include/asm/elf.h | 40 ++----
> arch/arm64/include/asm/fpsimd.h | 2 +-
> arch/arm64/include/asm/ftrace.h | 2 +-
> arch/arm64/include/asm/hwcap.h | 6 +-
> arch/arm64/include/asm/is_compat.h | 90 ++++++++++++++
> arch/arm64/include/asm/memory.h | 5 +-
> arch/arm64/include/asm/processor.h | 11 +-
> arch/arm64/include/asm/ptrace.h | 2 +-
> arch/arm64/include/asm/seccomp.h | 2 +-
> arch/arm64/include/asm/signal32.h | 9 +-
> arch/arm64/include/asm/signal32_common.h | 27 ++++
> arch/arm64/include/asm/signal_common.h | 33 +++++
> arch/arm64/include/asm/signal_ilp32.h | 38 ++++++
> arch/arm64/include/asm/syscall.h | 2 +-
> arch/arm64/include/asm/thread_info.h | 4 +-
> arch/arm64/include/asm/unistd.h | 6 +-
> arch/arm64/include/asm/vdso.h | 6 +
> arch/arm64/include/uapi/asm/bitsperlong.h | 9 +-
> arch/arm64/include/uapi/asm/unistd.h | 13 ++
> arch/arm64/kernel/Makefile | 8 +-
> arch/arm64/kernel/asm-offsets.c | 9 +-
> arch/arm64/kernel/binfmt_elf32.c | 37 ++++++
> arch/arm64/kernel/binfmt_ilp32.c | 85 +++++++++++++
> arch/arm64/kernel/cpufeature.c | 8 +-
> arch/arm64/kernel/cpuinfo.c | 8 +-
> arch/arm64/kernel/entry.S | 34 +++++-
> arch/arm64/kernel/entry32.S | 80 ------------
> arch/arm64/kernel/entry32_common.S | 107 ++++++++++++++++
> arch/arm64/kernel/entry_ilp32.S | 22 ++++
> arch/arm64/kernel/head.S | 2 +-
> arch/arm64/kernel/hw_breakpoint.c | 8 +-
> arch/arm64/kernel/perf_regs.c | 2 +-
> arch/arm64/kernel/process.c | 7 +-
> arch/arm64/kernel/ptrace.c | 80 ++++++++++--
> arch/arm64/kernel/signal.c | 102 ++++++++++------
> arch/arm64/kernel/signal32.c | 107 ----------------
> arch/arm64/kernel/signal32_common.c | 135 ++++++++++++++++++++
> arch/arm64/kernel/signal_ilp32.c | 170 ++++++++++++++++++++++++++
> arch/arm64/kernel/sys_ilp32.c | 100 +++++++++++++++
> arch/arm64/kernel/traps.c | 5 +-
> arch/arm64/kernel/vdso-ilp32/.gitignore | 2 +
> arch/arm64/kernel/vdso-ilp32/Makefile | 80 ++++++++++++
> arch/arm64/kernel/vdso-ilp32/vdso-ilp32.S | 33 +++++
> arch/arm64/kernel/vdso-ilp32/vdso-ilp32.lds.S | 95 ++++++++++++++
> arch/arm64/kernel/vdso.c | 63 ++++++++--
> arch/arm64/kernel/vdso/gettimeofday.S | 20 ++-
> arch/arm64/kernel/vdso/vdso.S | 6 +-
> arch/arm64/mm/mmap.c | 2 +-
> arch/blackfin/Kconfig | 1 +
> arch/c6x/include/uapi/asm/unistd.h | 1 +
> arch/cris/Kconfig | 1 +
> arch/frv/Kconfig | 1 +
> arch/h8300/Kconfig | 1 +
> arch/h8300/include/uapi/asm/unistd.h | 1 +
> arch/hexagon/Kconfig | 1 +
> arch/hexagon/include/uapi/asm/unistd.h | 1 +
> arch/m32r/Kconfig | 1 +
> arch/m68k/Kconfig | 1 +
> arch/metag/Kconfig | 1 +
> arch/metag/include/uapi/asm/unistd.h | 1 +
> arch/microblaze/Kconfig | 1 +
> arch/mips/Kconfig | 1 +
> arch/mn10300/Kconfig | 1 +
> arch/nios2/Kconfig | 1 +
> arch/nios2/include/uapi/asm/unistd.h | 1 +
> arch/openrisc/Kconfig | 1 +
> arch/openrisc/include/uapi/asm/unistd.h | 1 +
> arch/parisc/Kconfig | 1 +
> arch/powerpc/Kconfig | 1 +
> arch/score/Kconfig | 1 +
> arch/score/include/uapi/asm/unistd.h | 1 +
> arch/sh/Kconfig | 1 +
> arch/sparc/Kconfig | 1 +
> arch/tile/Kconfig | 1 +
> arch/tile/include/uapi/asm/unistd.h | 1 +
> arch/tile/kernel/compat.c | 3 +
> arch/unicore32/Kconfig | 1 +
> arch/unicore32/include/uapi/asm/unistd.h | 1 +
> arch/x86/Kconfig | 1 +
> arch/x86/um/Kconfig | 1 +
> arch/xtensa/Kconfig | 1 +
> drivers/clocksource/arm_arch_timer.c | 2 +-
> include/linux/fcntl.h | 2 +-
> include/linux/thread_bits.h | 63 ++++++++++
> include/linux/thread_info.h | 65 ++--------
> include/uapi/asm-generic/unistd.h | 10 +-
> scripts/checksyscalls.sh | 5 +
> 95 files changed, 1606 insertions(+), 407 deletions(-)
> create mode 100644 Documentation/arm64/ilp32.txt
> create mode 100644 arch/arm64/include/asm/is_compat.h
> create mode 100644 arch/arm64/include/asm/signal32_common.h
> create mode 100644 arch/arm64/include/asm/signal_common.h
> create mode 100644 arch/arm64/include/asm/signal_ilp32.h
> create mode 100644 arch/arm64/kernel/binfmt_elf32.c
> create mode 100644 arch/arm64/kernel/binfmt_ilp32.c
> create mode 100644 arch/arm64/kernel/entry32_common.S
> create mode 100644 arch/arm64/kernel/entry_ilp32.S
> create mode 100644 arch/arm64/kernel/signal32_common.c
> create mode 100644 arch/arm64/kernel/signal_ilp32.c
> create mode 100644 arch/arm64/kernel/sys_ilp32.c
> create mode 100644 arch/arm64/kernel/vdso-ilp32/.gitignore
> create mode 100644 arch/arm64/kernel/vdso-ilp32/Makefile
> create mode 100644 arch/arm64/kernel/vdso-ilp32/vdso-ilp32.S
> create mode 100644 arch/arm64/kernel/vdso-ilp32/vdso-ilp32.lds.S
> create mode 100644 include/linux/thread_bits.h
>
> --
> 2.11.0
^ permalink raw reply [flat|nested] 37+ messages in thread* [PATCH v8 00/20] ILP32 for ARM64
2018-02-02 8:16 ` Yury Norov
@ 2018-02-02 8:58 ` Bamvor Zhang
0 siblings, 0 replies; 37+ messages in thread
From: Bamvor Zhang @ 2018-02-02 8:58 UTC (permalink / raw)
To: linux-arm-kernel
Hi, Yury
As I left huawei few month ago. My account of linaro is invalid. You
could send to my personal email(bamv2005 at gmail.com).
Sorry for inconvenience.
Regards
Bamvor
On Fri, Feb 2, 2018 at 4:16 PM, Yury Norov <ynorov@caviumnetworks.com> wrote:
> Hi Catalin, all
>
> (Exclude Bamvor as his email became invalid)
>
> This is 4.15-based kernel.
> https://github.com/norov/linux/commits/ilp32-4.15
>
> I tested it with LTP, no regressions found.
>
> Kernel v4.15 incorporates SVE series from Dave Martin, so I updated ILP32
> patches to agree with it. SVE-related changes are mostly in patches:
> arm64: ilp32: introduce ilp32-specific handlers for sigframe and ucontext
> arm64: signal32: move ilp32 and aarch32 common code to separated file
> arm64: signal: share lp64 signal structures and routines to ilp32
> arm64: ilp32: add sys_ilp32.c and a separate table (in entry.S) to use it
>
> Dave kindly reviewed that patches and proposed improvements:
> https://www.spinics.net/lists/arm-kernel/msg629221.html
>
> There's no ABI-related changes proposed, or urgent fixes; so I'll rework
> signal subsystem during 4.16 cycle.
>
> Are there any news with upstreaming this series?
>
> Thanks,
> Yury
>
> On Mon, Jun 19, 2017 at 06:49:43PM +0300, Yury Norov wrote:
>> This series enables aarch64 with ilp32 mode.
>>
>> As supporting work, it introduces ARCH_32BIT_OFF_T configuration
>> option that is enabled for existing 32-bit architectures but disabled
>> for new arches (so 64-bit off_t userspace type is used by new userspace).
>> Also it deprecates getrlimit and setrlimit syscalls prior to prlimit64.
>>
>> This version is based on linux-next from 2017-06-16. It works with
>> glibc-2.25, and tested with LTP, glibc testsuite, trinity, lmbench,
>> CPUSpec.
>>
>> Patches 1, 2, 3 and 8 are general, and may be applied separately.
>>
>> Kernel, GLIBC and OpenSUSE-based distro:
>> https://github.com/norov/linux/tree/ilp32-20170616.0
>> https://github.com/norov/glibc/tree/dev9
>> https://build.opensuse.org/project/show/devel:ARM:Factory:Contrib:ILP32
>>
>> (GLIBC patches are managed by Steve Ellcey, so my tree is only for
>> reference.)
>>
>> Changes:
>> v3: https://lkml.org/lkml/2014/9/3/704
>> v4: https://lkml.org/lkml/2015/4/13/691
>> v5: https://lkml.org/lkml/2015/9/29/911
>> v6: https://lkml.org/lkml/2016/5/23/661
>> v7: https://lkml.org/lkml/2017/1/9/213
>> v8: - off_t referred in patches 2 and 13 stands for userspace type which is
>> underlined in corresponding patch comments and ARCH_32BIT_OFF_T config
>> option description;
>> - __IGNORE_getrlimit and __IGNORE_setrlimit are added to
>> scripts/checksyscalls.sh (patch 3);
>> - for CONFIG_COMPAT, bool changed to def_bool y and 'select COMPAT' is
>> dropped for AARCH32_EL0 and ARM64_ILP32 optiond (patches 5 and 20);
>> - x19 register is used to load TSK_TI_FLAGS in svc path in
>> arch/arm64/kernel/entry.S to avoid register clobbering (patch 14).
>> - ilp32 vdso-related files are syncronized wirh lp64 ones, mostly Makefiles
>> (patch 19);
>> - in arch/arm64/mm/mmap.c, arch_mmap_rnd() swithed to use is_compat_task()
>> (patch 9);
>> - rebased on next-20170616.
>>
>> Andrew Pinski (6):
>> arm64: rename COMPAT to AARCH32_EL0 in Kconfig
>> arm64: ensure the kernel is compiled for LP64
>> arm64:uapi: set __BITS_PER_LONG correctly for ILP32 and LP64
>> arm64: ilp32: add sys_ilp32.c and a separate table (in entry.S) to use
>> it
>> arm64: ilp32: introduce ilp32-specific handlers for sigframe and
>> ucontext
>> arm64:ilp32: add ARM64_ILP32 to Kconfig
>>
>> Philipp Tomsich (1):
>> arm64:ilp32: add vdso-ilp32 and use for signal return
>>
>> Yury Norov (13):
>> compat ABI: use non-compat openat and open_by_handle_at variants
>> 32-bit userspace ABI: introduce ARCH_32BIT_OFF_T config option
>> asm-generic: Drop getrlimit and setrlimit syscalls from default list
>> arm64: ilp32: add documentation on the ILP32 ABI for ARM64
>> thread: move thread bits accessors to separated file
>> arm64: introduce is_a32_task and is_a32_thread (for AArch32 compat)
>> arm64: ilp32: add is_ilp32_compat_{task,thread} and TIF_32BIT_AARCH64
>> arm64: introduce binfmt_elf32.c
>> arm64: ilp32: introduce binfmt_ilp32.c
>> arm64: ilp32: share aarch32 syscall handlers
>> arm64: signal: share lp64 signal routines to ilp32
>> arm64: signal32: move ilp32 and aarch32 common code to separated file
>> arm64: ptrace: handle ptrace_request differently for aarch32 and ilp32
>>
>> Documentation/arm64/ilp32.txt | 45 +++++++
>> arch/Kconfig | 15 +++
>> arch/arc/Kconfig | 1 +
>> arch/arc/include/uapi/asm/unistd.h | 1 +
>> arch/arm/Kconfig | 1 +
>> arch/arm64/Kconfig | 17 ++-
>> arch/arm64/Makefile | 8 ++
>> arch/arm64/include/asm/compat.h | 19 +--
>> arch/arm64/include/asm/elf.h | 40 ++----
>> arch/arm64/include/asm/fpsimd.h | 2 +-
>> arch/arm64/include/asm/ftrace.h | 2 +-
>> arch/arm64/include/asm/hwcap.h | 6 +-
>> arch/arm64/include/asm/is_compat.h | 90 ++++++++++++++
>> arch/arm64/include/asm/memory.h | 5 +-
>> arch/arm64/include/asm/processor.h | 11 +-
>> arch/arm64/include/asm/ptrace.h | 2 +-
>> arch/arm64/include/asm/seccomp.h | 2 +-
>> arch/arm64/include/asm/signal32.h | 9 +-
>> arch/arm64/include/asm/signal32_common.h | 27 ++++
>> arch/arm64/include/asm/signal_common.h | 33 +++++
>> arch/arm64/include/asm/signal_ilp32.h | 38 ++++++
>> arch/arm64/include/asm/syscall.h | 2 +-
>> arch/arm64/include/asm/thread_info.h | 4 +-
>> arch/arm64/include/asm/unistd.h | 6 +-
>> arch/arm64/include/asm/vdso.h | 6 +
>> arch/arm64/include/uapi/asm/bitsperlong.h | 9 +-
>> arch/arm64/include/uapi/asm/unistd.h | 13 ++
>> arch/arm64/kernel/Makefile | 8 +-
>> arch/arm64/kernel/asm-offsets.c | 9 +-
>> arch/arm64/kernel/binfmt_elf32.c | 37 ++++++
>> arch/arm64/kernel/binfmt_ilp32.c | 85 +++++++++++++
>> arch/arm64/kernel/cpufeature.c | 8 +-
>> arch/arm64/kernel/cpuinfo.c | 8 +-
>> arch/arm64/kernel/entry.S | 34 +++++-
>> arch/arm64/kernel/entry32.S | 80 ------------
>> arch/arm64/kernel/entry32_common.S | 107 ++++++++++++++++
>> arch/arm64/kernel/entry_ilp32.S | 22 ++++
>> arch/arm64/kernel/head.S | 2 +-
>> arch/arm64/kernel/hw_breakpoint.c | 8 +-
>> arch/arm64/kernel/perf_regs.c | 2 +-
>> arch/arm64/kernel/process.c | 7 +-
>> arch/arm64/kernel/ptrace.c | 80 ++++++++++--
>> arch/arm64/kernel/signal.c | 102 ++++++++++------
>> arch/arm64/kernel/signal32.c | 107 ----------------
>> arch/arm64/kernel/signal32_common.c | 135 ++++++++++++++++++++
>> arch/arm64/kernel/signal_ilp32.c | 170 ++++++++++++++++++++++++++
>> arch/arm64/kernel/sys_ilp32.c | 100 +++++++++++++++
>> arch/arm64/kernel/traps.c | 5 +-
>> arch/arm64/kernel/vdso-ilp32/.gitignore | 2 +
>> arch/arm64/kernel/vdso-ilp32/Makefile | 80 ++++++++++++
>> arch/arm64/kernel/vdso-ilp32/vdso-ilp32.S | 33 +++++
>> arch/arm64/kernel/vdso-ilp32/vdso-ilp32.lds.S | 95 ++++++++++++++
>> arch/arm64/kernel/vdso.c | 63 ++++++++--
>> arch/arm64/kernel/vdso/gettimeofday.S | 20 ++-
>> arch/arm64/kernel/vdso/vdso.S | 6 +-
>> arch/arm64/mm/mmap.c | 2 +-
>> arch/blackfin/Kconfig | 1 +
>> arch/c6x/include/uapi/asm/unistd.h | 1 +
>> arch/cris/Kconfig | 1 +
>> arch/frv/Kconfig | 1 +
>> arch/h8300/Kconfig | 1 +
>> arch/h8300/include/uapi/asm/unistd.h | 1 +
>> arch/hexagon/Kconfig | 1 +
>> arch/hexagon/include/uapi/asm/unistd.h | 1 +
>> arch/m32r/Kconfig | 1 +
>> arch/m68k/Kconfig | 1 +
>> arch/metag/Kconfig | 1 +
>> arch/metag/include/uapi/asm/unistd.h | 1 +
>> arch/microblaze/Kconfig | 1 +
>> arch/mips/Kconfig | 1 +
>> arch/mn10300/Kconfig | 1 +
>> arch/nios2/Kconfig | 1 +
>> arch/nios2/include/uapi/asm/unistd.h | 1 +
>> arch/openrisc/Kconfig | 1 +
>> arch/openrisc/include/uapi/asm/unistd.h | 1 +
>> arch/parisc/Kconfig | 1 +
>> arch/powerpc/Kconfig | 1 +
>> arch/score/Kconfig | 1 +
>> arch/score/include/uapi/asm/unistd.h | 1 +
>> arch/sh/Kconfig | 1 +
>> arch/sparc/Kconfig | 1 +
>> arch/tile/Kconfig | 1 +
>> arch/tile/include/uapi/asm/unistd.h | 1 +
>> arch/tile/kernel/compat.c | 3 +
>> arch/unicore32/Kconfig | 1 +
>> arch/unicore32/include/uapi/asm/unistd.h | 1 +
>> arch/x86/Kconfig | 1 +
>> arch/x86/um/Kconfig | 1 +
>> arch/xtensa/Kconfig | 1 +
>> drivers/clocksource/arm_arch_timer.c | 2 +-
>> include/linux/fcntl.h | 2 +-
>> include/linux/thread_bits.h | 63 ++++++++++
>> include/linux/thread_info.h | 65 ++--------
>> include/uapi/asm-generic/unistd.h | 10 +-
>> scripts/checksyscalls.sh | 5 +
>> 95 files changed, 1606 insertions(+), 407 deletions(-)
>> create mode 100644 Documentation/arm64/ilp32.txt
>> create mode 100644 arch/arm64/include/asm/is_compat.h
>> create mode 100644 arch/arm64/include/asm/signal32_common.h
>> create mode 100644 arch/arm64/include/asm/signal_common.h
>> create mode 100644 arch/arm64/include/asm/signal_ilp32.h
>> create mode 100644 arch/arm64/kernel/binfmt_elf32.c
>> create mode 100644 arch/arm64/kernel/binfmt_ilp32.c
>> create mode 100644 arch/arm64/kernel/entry32_common.S
>> create mode 100644 arch/arm64/kernel/entry_ilp32.S
>> create mode 100644 arch/arm64/kernel/signal32_common.c
>> create mode 100644 arch/arm64/kernel/signal_ilp32.c
>> create mode 100644 arch/arm64/kernel/sys_ilp32.c
>> create mode 100644 arch/arm64/kernel/vdso-ilp32/.gitignore
>> create mode 100644 arch/arm64/kernel/vdso-ilp32/Makefile
>> create mode 100644 arch/arm64/kernel/vdso-ilp32/vdso-ilp32.S
>> create mode 100644 arch/arm64/kernel/vdso-ilp32/vdso-ilp32.lds.S
>> create mode 100644 include/linux/thread_bits.h
>>
>> --
>> 2.11.0
--
-----------------------------------------
arm64, kernel. opensuse
blog: http://aarch64.me
-----------------------------------------
^ permalink raw reply [flat|nested] 37+ messages in thread