From: andre.przywara@arm.com (Andre Przywara)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 5/8] arm64: dts: allwinner: a64: add SCPI DVFS nodes
Date: Fri, 30 Jun 2017 10:56:05 +0100 [thread overview]
Message-ID: <20170630095608.24943-6-andre.przywara@arm.com> (raw)
In-Reply-To: <20170630095608.24943-1-andre.przywara@arm.com>
One functionality provided by the SCPI handler is frequency scaling,
which allows to switch the one CPU cluster between several operating
points, each specifying a matching frequency and CPU voltage.
The actual table is specified in firmware and can be queried by Linux
using standardised SCPI calls.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
index ef6f10e..58c3675 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
@@ -61,6 +61,7 @@
device_type = "cpu";
reg = <0>;
enable-method = "psci";
+ clocks = <&scpi_dvfs 0>;
};
cpu1: cpu at 1 {
@@ -68,6 +69,7 @@
device_type = "cpu";
reg = <1>;
enable-method = "psci";
+ clocks = <&scpi_dvfs 0>;
};
cpu2: cpu at 2 {
@@ -75,6 +77,7 @@
device_type = "cpu";
reg = <2>;
enable-method = "psci";
+ clocks = <&scpi_dvfs 0>;
};
cpu3: cpu at 3 {
@@ -82,6 +85,7 @@
device_type = "cpu";
reg = <3>;
enable-method = "psci";
+ clocks = <&scpi_dvfs 0>;
};
};
@@ -148,6 +152,17 @@
compatible = "arm,scpi";
mboxes = <&mailbox 0>;
shmem = <&cpu_scp_mem>;
+
+ scpi-clocks {
+ compatible = "arm,scpi-clocks";
+
+ scpi_dvfs: scpi_dvfs_clocks {
+ compatible = "arm,scpi-dvfs-clocks";
+ #clock-cells = <1>;
+ clock-indices = <0>;
+ clock-output-names = "cpu_clk";
+ };
+ };
};
soc {
--
2.9.0
next prev parent reply other threads:[~2017-06-30 9:56 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-06-30 9:56 [PATCH 0/8] mailbox: arm/arm64: introduce smc triggered mailbox Andre Przywara
2017-06-30 9:56 ` [PATCH 1/8] mailbox: introduce ARM SMC based mailbox Andre Przywara
2017-07-02 5:55 ` Jassi Brar
2017-07-23 23:20 ` André Przywara
2017-07-24 17:20 ` Jassi Brar
2017-07-24 17:38 ` Sudeep Holla
2017-07-24 17:52 ` Jassi Brar
2017-06-30 9:56 ` [PATCH 2/8] dt-bindings: mailbox: add binding doc for the ARM SMC mailbox Andre Przywara
2017-07-07 13:53 ` Rob Herring
2017-07-07 14:35 ` Mark Rutland
2017-07-07 16:06 ` Andre Przywara
2017-06-30 9:56 ` [PATCH 3/8] mailbox: Kconfig: enable ARM SMC mailbox on 64-bit Allwinner SoCs Andre Przywara
2017-06-30 9:56 ` [PATCH 4/8] arm64: dts: allwinner: a64: add SCPI support Andre Przywara
2017-06-30 9:56 ` Andre Przywara [this message]
2017-06-30 9:56 ` [PATCH 6/8] arm64: dts: allwinner: a64: add SCPI sensors support Andre Przywara
2017-06-30 9:56 ` [PATCH 7/8] arm64: dts: allwinner: a64: add SCPI power domain support Andre Przywara
2017-06-30 9:56 ` [PATCH 8/8] arm64: dts: allwinner: a64: add (unused) MMC clock node Andre Przywara
2017-06-30 12:25 ` [PATCH 0/8] mailbox: arm/arm64: introduce smc triggered mailbox Maxime Ripard
2017-06-30 12:56 ` Andre Przywara
2017-07-05 6:55 ` Maxime Ripard
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