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From: sboyd@codeaurora.org (Stephen Boyd)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 4/9] clk: imx: add pllv4 support
Date: Fri, 30 Jun 2017 17:36:42 -0700	[thread overview]
Message-ID: <20170701003642.GS22780@codeaurora.org> (raw)
In-Reply-To: <20170620093143.GD6805@b29396-OptiPlex-7040>

On 06/20, Dong Aisheng wrote:
> On Mon, Jun 19, 2017 at 06:59:17PM -0700, Stephen Boyd wrote:
> > On 05/15, Dong Aisheng wrote:
> > > +
> > > +	if (clk_pllv4_is_enabled(hw)) {
> > > +		WARN(1, "clk_pllv4: can't change rate when pll is enabled");
> > > +		return -EINVAL;
> > 
> > Sad, CLK_SET_RATE_GATE isn't working for you I suppose?
> > 
> 
> CLK_SET_RATE_GATE can't work in early stage before running clk_disable_unused.
> At that point, the clock tree state is still not consistent with HW.
> e.g. prepare/enable count is still zero but it's actually enabled due to
> reset state or bootloader.
> 
> The code here is adding a double check in case user sets rate in early stage.
> 
> However, probably it could also be moved into clock core as it's not platform
> dependant behavior?
> 

Ok. It would be good to fix the core framework to synchronize the
prepared/enabled state at registration time so we don't need this
check in the driver.

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

  reply	other threads:[~2017-07-01  0:36 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-05-15 13:59 [PATCH 0/9] clk: add imx7ulp clk support Dong Aisheng
2017-05-15 13:59 ` [PATCH 1/9] clk: clk-divider: add CLK_DIVIDER_ZERO_GATE " Dong Aisheng
2017-06-20  1:45   ` Stephen Boyd
2017-06-20  9:08     ` Dong Aisheng
2017-06-26  3:07       ` A.s. Dong
2017-07-01  0:55       ` Stephen Boyd
2017-07-03  3:46         ` A.s. Dong
2017-05-15 13:59 ` [PATCH 2/9] clk: reparent orphans after critical clocks enabled Dong Aisheng
2017-06-20  1:51   ` Stephen Boyd
2017-06-20  9:25     ` Dong Aisheng
2017-05-15 13:59 ` [PATCH 3/9] clk: fractional-divider: add CLK_FRAC_DIVIDER_ZERO_BASED flag support Dong Aisheng
2017-06-20  1:55   ` Stephen Boyd
2017-06-20  9:26     ` Dong Aisheng
2017-05-15 13:59 ` [PATCH 4/9] clk: imx: add pllv4 support Dong Aisheng
2017-06-20  1:59   ` Stephen Boyd
2017-06-20  9:31     ` Dong Aisheng
2017-07-01  0:36       ` Stephen Boyd [this message]
2017-07-03  3:21         ` A.s. Dong
2017-05-15 13:59 ` [PATCH 5/9] clk: imx: add pfdv2 support Dong Aisheng
2017-05-15 13:59 ` [PATCH 6/9] clk: imx: add composite clk support Dong Aisheng
2017-06-20  2:00   ` Stephen Boyd
2017-06-20  9:32     ` Dong Aisheng
2017-05-15 13:59 ` [PATCH 7/9] dt-bindings: clock: add imx7ulp clock binding doc Dong Aisheng
2017-05-15 13:59 ` [PATCH 8/9] clk: imx: make mux parent strings const Dong Aisheng
2017-06-20  2:01   ` Stephen Boyd
2017-05-15 13:59 ` [PATCH 9/9] clk: imx: add imx7ulp clk driver Dong Aisheng
2017-06-20  2:01   ` Stephen Boyd
2017-06-20  9:42     ` Dong Aisheng
2017-06-20 20:41       ` Stephen Boyd
2017-06-21  7:13         ` A.s. Dong
2017-07-01  0:35           ` Stephen Boyd
2017-07-03  3:18             ` A.s. Dong
2017-06-13  6:42 ` [PATCH 0/9] clk: add imx7ulp clk support Dong Aisheng

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