linux-arm-kernel.lists.infradead.org archive mirror
 help / color / mirror / Atom feed
* [PATCH] PCI: dwc: designware: test PCIE_ATU_ENABLE bit to check enabled or not
@ 2017-07-13 10:35 Jisheng Zhang
  2017-07-17  9:27 ` Joao Pinto
  0 siblings, 1 reply; 3+ messages in thread
From: Jisheng Zhang @ 2017-07-13 10:35 UTC (permalink / raw)
  To: linux-arm-kernel

The ATU CTRL2 register is 32 bit, besides the enable bit, other bits
may also be set. To check whether the ATU is enabled or not, we should
test the enable it.

Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
---
 drivers/pci/dwc/pcie-designware.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/pci/dwc/pcie-designware.c b/drivers/pci/dwc/pcie-designware.c
index 0e03af279259..6bf0b409050a 100644
--- a/drivers/pci/dwc/pcie-designware.c
+++ b/drivers/pci/dwc/pcie-designware.c
@@ -177,7 +177,7 @@ void dw_pcie_prog_outbound_atu(struct dw_pcie *pci, int index, int type,
 	 */
 	for (retries = 0; retries < LINK_WAIT_MAX_IATU_RETRIES; retries++) {
 		val = dw_pcie_readl_dbi(pci, PCIE_ATU_CR2);
-		if (val == PCIE_ATU_ENABLE)
+		if (val & PCIE_ATU_ENABLE)
 			return;
 
 		usleep_range(LINK_WAIT_IATU_MIN, LINK_WAIT_IATU_MAX);
-- 
2.13.2

^ permalink raw reply related	[flat|nested] 3+ messages in thread

end of thread, other threads:[~2017-07-17 19:32 UTC | newest]

Thread overview: 3+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2017-07-13 10:35 [PATCH] PCI: dwc: designware: test PCIE_ATU_ENABLE bit to check enabled or not Jisheng Zhang
2017-07-17  9:27 ` Joao Pinto
2017-07-17 19:32   ` Jingoo Han

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).