From: lorenzo.pieralisi@arm.com (Lorenzo Pieralisi)
To: linux-arm-kernel@lists.infradead.org
Subject: APM smmu implementation
Date: Thu, 13 Jul 2017 17:52:12 +0100 [thread overview]
Message-ID: <20170713165212.GA4228@red-moon> (raw)
In-Reply-To: <CAL85gmBwZ1RGa8my3L1psD0xn2CiJvgDy1SniY27BkJHVD8B1Q@mail.gmail.com>
On Thu, Jul 13, 2017 at 09:08:38AM -0700, Feng Kan wrote:
[...]
> > Cavium are not using MMU-500 - the ThunderX SMMU is their own in-house
> > microarchitecture (with its own bugs and foibles), hence it rightly gets
> > its own implementation identifier. I think Lorenzo has plans to wire up
> > support for the IORT "Device memory address size limit" field, which is
> > the correct way for ACPI to describe the upstream bus width of your
> > MMU-500 integration (and all the other IOMMU integrations facing the
> > same issue).
> This is great, thanks.
>
> Lorenzo, May I ask when will this be ready. We would very much like
> this change to push out into the latest CentOS release.
I should be able to post a patch at v4.13-rc1 aiming for v4.14.
Lorenzo
prev parent reply other threads:[~2017-07-13 16:52 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-01-06 23:21 APM smmu implementation Feng Kan
2017-01-09 10:54 ` Will Deacon
2017-01-09 17:37 ` Feng Kan
2017-01-09 11:34 ` Robin Murphy
2017-01-09 12:03 ` Will Deacon
2017-01-09 17:49 ` Feng Kan
2017-01-09 17:55 ` Robin Murphy
2017-07-12 21:07 ` Feng Kan
2017-07-12 23:28 ` Al Stone
2017-07-12 23:31 ` Feng Kan
2017-07-13 10:03 ` Robin Murphy
2017-07-13 16:08 ` Feng Kan
2017-07-13 16:41 ` Edward Gasiorowski
2017-07-13 16:52 ` Lorenzo Pieralisi [this message]
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