linux-arm-kernel.lists.infradead.org archive mirror
 help / color / mirror / Atom feed
* [PATCH v7 5/8] PCI: xilinx-nwl: Translate INTx range to hwirqs 0-3
       [not found] <20170815190223.18807-1-paul.burton@imgtec.com>
@ 2017-08-15 19:02 ` Paul Burton
  2017-08-15 19:02 ` [PATCH v7 6/8] PCI: aardvark: Use PCI_NUM_INTX Paul Burton
  2017-08-15 19:02 ` [PATCH v7 8/8] PCI: rockchip: " Paul Burton
  2 siblings, 0 replies; 4+ messages in thread
From: Paul Burton @ 2017-08-15 19:02 UTC (permalink / raw)
  To: linux-arm-kernel

The devicetree binding documentation for the Xilinx NWL PCIe root port
bridge shows an example which uses an interrupt-map property to map PCI
INTx interrupts to hardware IRQ numbers 1-4. The driver creates an IRQ
domain with size 4, which therefore covers the hwirq range 0-3.

This means that if we attempt to make use of the INTD interrupt then
we're likely to hit a WARN() in irq_domain_associate() because INTD, or
hwirw=4, is outside of the range covered by the IRQ domain.
irq_domain_associate() will then return -EINVAL and we'll be unable to
make use of INTD.

Fix this by making use of the pci_irqd_intx_xlate() helper function to
translate the 1-4 range used in the DT to a 0-3 range used within the
driver, and stop adding 1 to decoded hwirq numbers.

Whilst cleaning up INTx handling we make use of the new PCI_NUM_INTX
macro & drop the custom INTX definitions.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: "S?ren Brinkmann" <soren.brinkmann@xilinx.com>
Cc: linux-arm-kernel at lists.infradead.org
Cc: linux-pci at vger.kernel.org

---
I have only build tested this. The problem is identical to that in the
pcie-xilinx driver, which is fixed similarly in an earlier patch.

Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None

 drivers/pci/host/pcie-xilinx-nwl.c | 9 ++++-----
 1 file changed, 4 insertions(+), 5 deletions(-)

diff --git a/drivers/pci/host/pcie-xilinx-nwl.c b/drivers/pci/host/pcie-xilinx-nwl.c
index eec641a34fc5..573847f4b9bc 100644
--- a/drivers/pci/host/pcie-xilinx-nwl.c
+++ b/drivers/pci/host/pcie-xilinx-nwl.c
@@ -133,7 +133,6 @@
 #define CFG_DMA_REG_BAR			GENMASK(2, 0)
 
 #define INT_PCI_MSI_NR			(2 * 32)
-#define INTX_NUM			4
 
 /* Readin the PS_LINKUP */
 #define PS_LINKUP_OFFSET		0x00000238
@@ -334,9 +333,8 @@ static void nwl_pcie_leg_handler(struct irq_desc *desc)
 
 	while ((status = nwl_bridge_readl(pcie, MSGF_LEG_STATUS) &
 				MSGF_LEG_SR_MASKALL) != 0) {
-		for_each_set_bit(bit, &status, INTX_NUM) {
-			virq = irq_find_mapping(pcie->legacy_irq_domain,
-						bit + 1);
+		for_each_set_bit(bit, &status, PCI_NUM_INTX) {
+			virq = irq_find_mapping(pcie->legacy_irq_domain, bit);
 			if (virq)
 				generic_handle_irq(virq);
 		}
@@ -436,6 +434,7 @@ static int nwl_legacy_map(struct irq_domain *domain, unsigned int irq,
 
 static const struct irq_domain_ops legacy_domain_ops = {
 	.map = nwl_legacy_map,
+	.xlate = pci_irqd_intx_xlate,
 };
 
 #ifdef CONFIG_PCI_MSI
@@ -559,7 +558,7 @@ static int nwl_pcie_init_irq_domain(struct nwl_pcie *pcie)
 	}
 
 	pcie->legacy_irq_domain = irq_domain_add_linear(legacy_intc_node,
-							INTX_NUM,
+							PCI_NUM_INTX,
 							&legacy_domain_ops,
 							pcie);
 
-- 
2.14.1

^ permalink raw reply related	[flat|nested] 4+ messages in thread

* [PATCH v7 6/8] PCI: aardvark: Use PCI_NUM_INTX
       [not found] <20170815190223.18807-1-paul.burton@imgtec.com>
  2017-08-15 19:02 ` [PATCH v7 5/8] PCI: xilinx-nwl: Translate INTx range to hwirqs 0-3 Paul Burton
@ 2017-08-15 19:02 ` Paul Burton
  2017-08-15 19:46   ` Thomas Petazzoni
  2017-08-15 19:02 ` [PATCH v7 8/8] PCI: rockchip: " Paul Burton
  2 siblings, 1 reply; 4+ messages in thread
From: Paul Burton @ 2017-08-15 19:02 UTC (permalink / raw)
  To: linux-arm-kernel

Switch from using a custom LEGACY_IRQ_NUM macro to the generic
PCI_NUM_INTX definition for the number of INTx interrupts.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: linux-arm-kernel at lists.infradead.org
Cc: linux-pci at vger.kernel.org

---
I have only build tested this.

Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None

 drivers/pci/host/pci-aardvark.c | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/drivers/pci/host/pci-aardvark.c b/drivers/pci/host/pci-aardvark.c
index 5fb9b620ac78..89f4e3d072d7 100644
--- a/drivers/pci/host/pci-aardvark.c
+++ b/drivers/pci/host/pci-aardvark.c
@@ -191,7 +191,6 @@
 #define LINK_WAIT_USLEEP_MIN		90000
 #define LINK_WAIT_USLEEP_MAX		100000
 
-#define LEGACY_IRQ_NUM			4
 #define MSI_IRQ_NUM			32
 
 struct advk_pcie {
@@ -729,7 +728,7 @@ static int advk_pcie_init_irq_domain(struct advk_pcie *pcie)
 	irq_chip->irq_unmask = advk_pcie_irq_unmask;
 
 	pcie->irq_domain =
-		irq_domain_add_linear(pcie_intc_node, LEGACY_IRQ_NUM,
+		irq_domain_add_linear(pcie_intc_node, PCI_NUM_INTX,
 				      &advk_pcie_irq_domain_ops, pcie);
 	if (!pcie->irq_domain) {
 		dev_err(dev, "Failed to get a INTx IRQ domain\n");
@@ -786,7 +785,7 @@ static void advk_pcie_handle_int(struct advk_pcie *pcie)
 		advk_pcie_handle_msi(pcie);
 
 	/* Process legacy interrupts */
-	for (i = 0; i < LEGACY_IRQ_NUM; i++) {
+	for (i = 0; i < PCI_NUM_INTX; i++) {
 		if (!(status & PCIE_ISR0_INTX_ASSERT(i)))
 			continue;
 
-- 
2.14.1

^ permalink raw reply related	[flat|nested] 4+ messages in thread

* [PATCH v7 8/8] PCI: rockchip: Use PCI_NUM_INTX
       [not found] <20170815190223.18807-1-paul.burton@imgtec.com>
  2017-08-15 19:02 ` [PATCH v7 5/8] PCI: xilinx-nwl: Translate INTx range to hwirqs 0-3 Paul Burton
  2017-08-15 19:02 ` [PATCH v7 6/8] PCI: aardvark: Use PCI_NUM_INTX Paul Burton
@ 2017-08-15 19:02 ` Paul Burton
  2 siblings, 0 replies; 4+ messages in thread
From: Paul Burton @ 2017-08-15 19:02 UTC (permalink / raw)
  To: linux-arm-kernel

Use the PCI_NUM_INTX macro to indicate the number of PCI INTx interrupts
rather than the magic number 4. This makes it clearer where the number
comes from & what it relates to.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Heiko Stuebner <heiko@sntech.de>
Cc: Shawn Lin <shawn.lin@rock-chips.com>
Cc: linux-arm-kernel at lists.infradead.org
Cc: linux-pci at vger.kernel.org
Cc: linux-rockchip at lists.infradead.org

---
I have only build tested this.

Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None

 drivers/pci/host/pcie-rockchip.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/pci/host/pcie-rockchip.c b/drivers/pci/host/pcie-rockchip.c
index 7bb9870f6d8c..eae195ca06ab 100644
--- a/drivers/pci/host/pcie-rockchip.c
+++ b/drivers/pci/host/pcie-rockchip.c
@@ -1116,7 +1116,7 @@ static int rockchip_pcie_init_irq_domain(struct rockchip_pcie *rockchip)
 		return -EINVAL;
 	}
 
-	rockchip->irq_domain = irq_domain_add_linear(intc, 4,
+	rockchip->irq_domain = irq_domain_add_linear(intc, PCI_NUM_INTX,
 						    &intx_domain_ops, rockchip);
 	if (!rockchip->irq_domain) {
 		dev_err(dev, "failed to get a INTx IRQ domain\n");
-- 
2.14.1

^ permalink raw reply related	[flat|nested] 4+ messages in thread

* [PATCH v7 6/8] PCI: aardvark: Use PCI_NUM_INTX
  2017-08-15 19:02 ` [PATCH v7 6/8] PCI: aardvark: Use PCI_NUM_INTX Paul Burton
@ 2017-08-15 19:46   ` Thomas Petazzoni
  0 siblings, 0 replies; 4+ messages in thread
From: Thomas Petazzoni @ 2017-08-15 19:46 UTC (permalink / raw)
  To: linux-arm-kernel

Hello,

On Tue, 15 Aug 2017 12:02:21 -0700, Paul Burton wrote:
> Switch from using a custom LEGACY_IRQ_NUM macro to the generic
> PCI_NUM_INTX definition for the number of INTx interrupts.
> 
> Signed-off-by: Paul Burton <paul.burton@imgtec.com>
> Cc: Bjorn Helgaas <bhelgaas@google.com>
> Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
> Cc: linux-arm-kernel at lists.infradead.org
> Cc: linux-pci at vger.kernel.org

Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>

Thomas
-- 
Thomas Petazzoni, CTO, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

^ permalink raw reply	[flat|nested] 4+ messages in thread

end of thread, other threads:[~2017-08-15 19:46 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
     [not found] <20170815190223.18807-1-paul.burton@imgtec.com>
2017-08-15 19:02 ` [PATCH v7 5/8] PCI: xilinx-nwl: Translate INTx range to hwirqs 0-3 Paul Burton
2017-08-15 19:02 ` [PATCH v7 6/8] PCI: aardvark: Use PCI_NUM_INTX Paul Burton
2017-08-15 19:46   ` Thomas Petazzoni
2017-08-15 19:02 ` [PATCH v7 8/8] PCI: rockchip: " Paul Burton

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).